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fix(pm): cancel cache_safe_assertion when using ext0 & ext1
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@ -1220,8 +1220,21 @@ esp_err_t esp_light_sleep_start(void)
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#if CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION && CONFIG_PM_SLP_IRAM_OPT
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/* Cache Suspend 0: if CONFIG_PM_SLP_IRAM_OPT is enabled, suspend cache here so that the access to flash
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during the sleep process can be explicitly exposed. */
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suspend_cache();
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* during the sleep process can be explicitly exposed.
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*
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* If we use EXTx wakeup, we must put related codes in IRAM, but The `rtc_io_desc` table
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* consumes a significant amount of memory. For example, on the ESP32, its size is 1008
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* bytes. Therefore, when EXTx wakeup is enabled, we do not perform cache access checks here */
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uint32_t ignore_check_wakeup_triggers = 0;
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#if SOC_PM_SUPPORT_EXT0_WAKEUP
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ignore_check_wakeup_triggers |= RTC_EXT0_TRIG_EN;
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#endif
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#if SOC_PM_SUPPORT_EXT1_WAKEUP
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ignore_check_wakeup_triggers |= RTC_EXT1_TRIG_EN;
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#endif
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if (!(s_config.wakeup_triggers & ignore_check_wakeup_triggers)) {
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suspend_cache();
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}
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#endif
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// Decide which power domains can be powered down
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@ -1356,7 +1369,9 @@ esp_err_t esp_light_sleep_start(void)
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#if CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION && CONFIG_PM_SLP_IRAM_OPT
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/* Cache Resume 0: sleep process done, resume cache for continue running */
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resume_cache();
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if (!(s_config.wakeup_triggers & ignore_check_wakeup_triggers)) {
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resume_cache();
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}
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#endif
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esp_ipc_isr_release_other_cpu();
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