mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
esp-system: move uncessary IRAM functions to flash
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0fb6316888
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b07a534984
@ -5,6 +5,8 @@ entries:
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panic (noflash)
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panic_handler (noflash)
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panic_arch (noflash)
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cache_err_int:esp_cache_err_get_cpuid (noflash)
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reset_reason:esp_reset_reason_get_hint (noflash)
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esp_err (noflash)
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esp_system_chip:esp_system_abort (noflash)
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@ -67,7 +67,7 @@ void esp_cache_err_int_init(void)
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ESP_INTR_ENABLE(ETS_MEMACCESS_ERR_INUM);
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}
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int IRAM_ATTR esp_cache_err_get_cpuid(void)
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int esp_cache_err_get_cpuid(void)
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{
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const uint32_t pro_mask =
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DPORT_PRO_CPU_DISABLED_CACHE_IA_DRAM1 |
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@ -1,16 +1,8 @@
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// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "esp_system.h"
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#include "esp_rom_sys.h"
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@ -103,7 +95,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint)
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}
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/* in IRAM, can be called from panic handler */
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esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void)
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esp_reset_reason_t esp_reset_reason_get_hint(void)
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{
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uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG);
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uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK;
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@ -72,7 +72,7 @@ void esp_cache_err_int_init(void)
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ESP_INTR_ENABLE(ETS_CACHEERR_INUM);
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}
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int IRAM_ATTR esp_cache_err_get_cpuid(void)
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int esp_cache_err_get_cpuid(void)
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{
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return 0;
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}
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@ -84,7 +84,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint)
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}
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/* in IRAM, can be called from panic handler */
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esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void)
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esp_reset_reason_t esp_reset_reason_get_hint(void)
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{
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uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG);
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uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK;
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@ -72,7 +72,7 @@ void esp_cache_err_int_init(void)
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ESP_INTR_ENABLE(ETS_CACHEERR_INUM);
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}
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int IRAM_ATTR esp_cache_err_get_cpuid(void)
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int esp_cache_err_get_cpuid(void)
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{
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return 0;
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}
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@ -97,7 +97,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint)
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}
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/* in IRAM, can be called from panic handler */
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esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void)
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esp_reset_reason_t esp_reset_reason_get_hint(void)
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{
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uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG);
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uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK;
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@ -52,7 +52,7 @@ void esp_cache_err_int_init(void)
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ESP_INTR_ENABLE(ETS_CACHEERR_INUM);
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}
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int IRAM_ATTR esp_cache_err_get_cpuid(void)
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int esp_cache_err_get_cpuid(void)
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{
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return 0;
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}
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -94,7 +94,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint)
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}
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/* in IRAM, can be called from panic handler */
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esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void)
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esp_reset_reason_t esp_reset_reason_get_hint(void)
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{
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uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG);
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uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK;
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@ -52,7 +52,7 @@ void esp_cache_err_int_init(void)
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ESP_INTR_ENABLE(ETS_CACHEERR_INUM);
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}
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int IRAM_ATTR esp_cache_err_get_cpuid(void)
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int esp_cache_err_get_cpuid(void)
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{
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return 0;
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}
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@ -94,7 +94,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint)
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}
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/* in IRAM, can be called from panic handler */
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esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void)
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esp_reset_reason_t esp_reset_reason_get_hint(void)
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{
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uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG);
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uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK;
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@ -72,7 +72,7 @@ void esp_cache_err_int_init(void)
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ESP_INTR_ENABLE(ETS_CACHEERR_INUM);
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}
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int IRAM_ATTR esp_cache_err_get_cpuid(void)
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int esp_cache_err_get_cpuid(void)
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{
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return 0;
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}
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@ -94,7 +94,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint)
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}
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/* in IRAM, can be called from panic handler */
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esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void)
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esp_reset_reason_t esp_reset_reason_get_hint(void)
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{
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uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG);
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uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK;
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@ -67,7 +67,7 @@ void esp_cache_err_int_init(void)
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ESP_INTR_ENABLE(ETS_MEMACCESS_ERR_INUM);
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}
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int IRAM_ATTR esp_cache_err_get_cpuid(void)
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int esp_cache_err_get_cpuid(void)
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{
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if (REG_READ(EXTMEM_CACHE_DBG_STATUS0_REG) != 0 ||
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REG_READ(EXTMEM_CACHE_DBG_STATUS1_REG) != 0) {
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@ -1,16 +1,8 @@
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// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "esp_system.h"
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#include "esp_rom_sys.h"
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@ -102,7 +94,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint)
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}
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/* in IRAM, can be called from panic handler */
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esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void)
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esp_reset_reason_t esp_reset_reason_get_hint(void)
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{
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uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG);
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uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK;
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@ -70,7 +70,7 @@ void esp_cache_err_int_init(void)
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ESP_INTR_ENABLE(ETS_CACHEERR_INUM);
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}
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int IRAM_ATTR esp_cache_err_get_cpuid(void)
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int esp_cache_err_get_cpuid(void)
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{
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if (cache_ll_l1_get_access_error_intr_status(0, CACHE_LL_L1_ACCESS_EVENT_MASK)) {
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return PRO_CPU_NUM;
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@ -1,16 +1,8 @@
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// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/*
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* SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "esp_system.h"
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#include "esp_rom_sys.h"
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@ -100,7 +92,7 @@ void IRAM_ATTR esp_reset_reason_set_hint(esp_reset_reason_t hint)
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}
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/* in IRAM, can be called from panic handler */
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esp_reset_reason_t IRAM_ATTR esp_reset_reason_get_hint(void)
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esp_reset_reason_t esp_reset_reason_get_hint(void)
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{
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uint32_t reset_reason_hint = REG_READ(RTC_RESET_CAUSE_REG);
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uint32_t high = (reset_reason_hint >> RST_REASON_SHIFT) & RST_REASON_MASK;
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@ -561,13 +561,10 @@ components/esp_system/port/public_compat/cache_err_int.h
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components/esp_system/port/public_compat/trax.h
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components/esp_system/port/soc/esp32/cache_err_int.h
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components/esp_system/port/soc/esp32/intr.c
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components/esp_system/port/soc/esp32/reset_reason.c
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components/esp_system/port/soc/esp32c3/apb_backup_dma.c
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components/esp_system/port/soc/esp32c3/cache_err_int.h
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components/esp_system/port/soc/esp32s2/cache_err_int.h
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components/esp_system/port/soc/esp32s2/reset_reason.c
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components/esp_system/port/soc/esp32s3/cache_err_int.h
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components/esp_system/port/soc/esp32s3/reset_reason.c
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components/esp_system/test/test_delay.c
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components/esp_system/test/test_reset_reason.c
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components/esp_system/test/test_stack_check.c
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