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Merge branch 'bugfix/ulp_fixes' into 'master'
Minor fixes for ULP See merge request !800
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af1bec4625
@ -651,21 +651,21 @@ Similar considerations apply to ``LD`` and ``ST`` instructions. Consider the fol
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---------------------------------
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**Syntax**
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**ADC** *Rdst, Sar_sel, Mux, Cycles*
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- **ADC** *Rdst, Sar_sel, Mux*
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- **ADC** *Rdst, Sar_sel, Mux, 0* — deprecated form
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**Operands**
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- *Rdst* – Destination Register R[0..3], result will be stored to this register
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- *Sar_sel* – selected ADC : 0=SARADC0, 1=SARADC1
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- *Rdst* – Destination Register R[0..3], result will be stored to this register
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- *Sar_sel* – Select ADC: 0 = SARADC1, 1 = SARADC2
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- *Mux* - selected PAD, SARADC Pad[Mux+1] is enabled
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- *Cycle* – number of cycles used to perform measurement
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**Description**
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The instruction makes measurements from ADC.
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**Examples**::
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1: ADC R1, 0, 1, 100 // Measure value using ADC1 pad 2,
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// for 100 cycles and move result to R1
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1: ADC R1, 0, 1 // Measure value using ADC1 pad 2 and store result into R1
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**REG_RD** – read from peripheral register
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@ -740,7 +740,7 @@ READ_RTC_FIELD(rtc_reg, field)
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#include "soc/sens_reg.h"
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/* Read 8-bit SENS_TSENS_OUT field of SENS_SAR_SLAVE_ADDR3_REG into R0 */
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READ_RTC_REG(SENS_SAR_SLAVE_ADDR3_REG, SENS_TSENS_OUT)
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READ_RTC_FIELD(SENS_SAR_SLAVE_ADDR3_REG, SENS_TSENS_OUT)
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WRITE_RTC_REG(rtc_reg, low_bit, bit_width, value)
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Write immediate value into rtc_reg[low_bit + bit_width - 1 : low_bit], bit_width <= 8. For example::
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@ -759,7 +759,7 @@ WRITE_RTC_FIELD(rtc_reg, field, value)
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#include "soc/rtc_cntl_reg.h"
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/* Set RTC_CNTL_ULP_CP_SLP_TIMER_EN field of RTC_CNTL_STATE0_REG to 0 */
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READ_RTC_REG(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN, 0)
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WRITE_RTC_FIELD(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN, 0)
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@ -72,7 +72,7 @@ entry:
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stage_rst
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measure:
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/* measure and add value to accumulator */
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adc r1, 0, adc_channel + 1, 0
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adc r1, 0, adc_channel + 1
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add r0, r0, r1
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/* increment loop counter and check exit condition */
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stage_inc 1
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