ci, config: re-arrange some C3 tests due to code size changes from 2022r1 toolchain

This commit is contained in:
Anton Maklakov 2022-06-01 13:27:49 +07:00
parent 30d0d7fe7f
commit ad4b3bc8b3
5 changed files with 12 additions and 4 deletions

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@ -1,3 +1,3 @@
# This config is split between targets since different component needs to be excluded (esp32, esp32s2)
# This config is split between targets since different component needs to be excluded
CONFIG_IDF_TARGET="esp32c3"
TEST_EXCLUDE_COMPONENTS=bt app_update freertos esp_hw_support esp_ipc esp_pm esp_system esp_timer driver heap pthread soc spi_flash vfs experimental_cpp_component ulp perfmon esp-tls test_utils
TEST_EXCLUDE_COMPONENTS=bt app_update esp_pm freertos esp_hw_support esp_ipc esp_system esp_timer driver heap pthread soc spi_flash vfs lwip spiffs experimental_cpp_component ulp perfmon esp-tls test_utils

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# This config is split between targets since different component needs to be included
CONFIG_IDF_TARGET="esp32c3"
TEST_COMPONENTS=soc spi_flash vfs lwip spiffs

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@ -1,3 +1,3 @@
# This config is split between targets since different component needs to be included
CONFIG_IDF_TARGET="esp32c3"
TEST_COMPONENTS=freertos esp_hw_support esp_ipc esp_system esp_timer driver heap pthread soc spi_flash vfs
TEST_COMPONENTS=freertos esp_hw_support esp_ipc esp_system esp_timer driver heap pthread

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@ -1,5 +1,5 @@
CONFIG_IDF_TARGET="esp32c3"
TEST_COMPONENTS=freertos esp_hw_support esp_system esp_ipc esp_timer driver heap pthread soc spi_flash vfs sdmmc
TEST_COMPONENTS=freertos esp_hw_support esp_ipc esp_system esp_timer driver heap pthread
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y

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CONFIG_IDF_TARGET="esp32c3"
TEST_COMPONENTS=soc spi_flash vfs sdmmc
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y