diff --git a/components/app_trace/port/xtensa/port.c b/components/app_trace/port/xtensa/port.c index b355b4ad36..1f9c97b539 100644 --- a/components/app_trace/port/xtensa/port.c +++ b/components/app_trace/port/xtensa/port.c @@ -148,7 +148,6 @@ // time exceeds specified timeout value operation is canceled and ESP_ERR_TIMEOUT code is returned. #include "sdkconfig.h" #include "soc/soc.h" -#include "soc/dport_access.h" #include "soc/dport_reg.h" #include "soc/tracemem_config.h" #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 diff --git a/components/esp_hw_support/include/dport_access.h b/components/esp_hw_support/include/dport_access.h new file mode 100644 index 0000000000..6f8aeab2ed --- /dev/null +++ b/components/esp_hw_support/include/dport_access.h @@ -0,0 +1,27 @@ +/* + * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include +#include "soc/dport_access.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !SOC_DPORT_WORKAROUND +#define DPORT_STALL_OTHER_CPU_START() +#define DPORT_STALL_OTHER_CPU_END() +#else +#include "esp_ipc_isr.h" +#define DPORT_STALL_OTHER_CPU_START() esp_ipc_isr_stall_other_cpu() +#define DPORT_STALL_OTHER_CPU_END() esp_ipc_isr_release_other_cpu() +#endif + +#ifdef __cplusplus +} +#endif diff --git a/components/esp_hw_support/include/soc/esp32/dport_access.h b/components/esp_hw_support/include/soc/esp32/dport_access.h deleted file mode 100644 index 8e04674951..0000000000 --- a/components/esp_hw_support/include/soc/esp32/dport_access.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include -#include -#include "xtensa/xtruntime.h" - -#ifdef __cplusplus -extern "C" { -#endif - -void esp_dport_access_stall_other_cpu_start(void) __attribute__ ((deprecated)); -void esp_dport_access_stall_other_cpu_end(void) __attribute__ ((deprecated)); -void esp_dport_access_int_init(void) __attribute__ ((deprecated)); -void esp_dport_access_int_pause(void) __attribute__ ((deprecated)); -void esp_dport_access_int_resume(void) __attribute__ ((deprecated)); -void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words); -uint32_t esp_dport_access_reg_read(uint32_t reg); -uint32_t esp_dport_access_sequence_reg_read(uint32_t reg); -//This routine does not stop the dport routines in any way that is recoverable. Please -//only call in case of panic(). -void esp_dport_access_int_abort(void) __attribute__ ((deprecated)); - -#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM) -#define DPORT_STALL_OTHER_CPU_START() -#define DPORT_STALL_OTHER_CPU_END() -#define DPORT_INTERRUPT_DISABLE() -#define DPORT_INTERRUPT_RESTORE() -#else -#include "esp_ipc_isr.h" -#define DPORT_STALL_OTHER_CPU_START() esp_ipc_isr_stall_other_cpu() -#define DPORT_STALL_OTHER_CPU_END() esp_ipc_isr_release_other_cpu() -#define DPORT_INTERRUPT_DISABLE() unsigned int intLvl = XTOS_SET_INTLEVEL(CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL) -#define DPORT_INTERRUPT_RESTORE() XTOS_RESTORE_JUST_INTLEVEL(intLvl) -#endif - -#ifdef __cplusplus -} -#endif diff --git a/components/esp_hw_support/include/soc/esp32c2/dport_access.h b/components/esp_hw_support/include/soc/esp32c2/dport_access.h deleted file mode 100644 index 72c7e26f59..0000000000 --- a/components/esp_hw_support/include/soc/esp32c2/dport_access.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#ifndef _ESP_DPORT_ACCESS_H_ -#define _ESP_DPORT_ACCESS_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Read a sequence of DPORT registers to the buffer. - * - * @param[out] buff_out Contains the read data. - * @param[in] address Initial address for reading registers. - * @param[in] num_words The number of words. - */ -void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words); - -#define DPORT_STALL_OTHER_CPU_START() -#define DPORT_STALL_OTHER_CPU_END() -#define DPORT_INTERRUPT_DISABLE() -#define DPORT_INTERRUPT_RESTORE() - -#ifdef __cplusplus -} -#endif - -#endif /* _ESP_DPORT_ACCESS_H_ */ diff --git a/components/esp_hw_support/include/soc/esp32c3/dport_access.h b/components/esp_hw_support/include/soc/esp32c3/dport_access.h deleted file mode 100644 index e5aedd2e1b..0000000000 --- a/components/esp_hw_support/include/soc/esp32c3/dport_access.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#ifndef _ESP_DPORT_ACCESS_H_ -#define _ESP_DPORT_ACCESS_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Read a sequence of DPORT registers to the buffer. - * - * @param[out] buff_out Contains the read data. - * @param[in] address Initial address for reading registers. - * @param[in] num_words The number of words. - */ -void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words); - -#define DPORT_STALL_OTHER_CPU_START() -#define DPORT_STALL_OTHER_CPU_END() -#define DPORT_INTERRUPT_DISABLE() -#define DPORT_INTERRUPT_RESTORE() - -#ifdef __cplusplus -} -#endif - -#endif /* _ESP_DPORT_ACCESS_H_ */ diff --git a/components/esp_hw_support/include/soc/esp32h2/dport_access.h b/components/esp_hw_support/include/soc/esp32h2/dport_access.h deleted file mode 100644 index e5aedd2e1b..0000000000 --- a/components/esp_hw_support/include/soc/esp32h2/dport_access.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#ifndef _ESP_DPORT_ACCESS_H_ -#define _ESP_DPORT_ACCESS_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Read a sequence of DPORT registers to the buffer. - * - * @param[out] buff_out Contains the read data. - * @param[in] address Initial address for reading registers. - * @param[in] num_words The number of words. - */ -void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words); - -#define DPORT_STALL_OTHER_CPU_START() -#define DPORT_STALL_OTHER_CPU_END() -#define DPORT_INTERRUPT_DISABLE() -#define DPORT_INTERRUPT_RESTORE() - -#ifdef __cplusplus -} -#endif - -#endif /* _ESP_DPORT_ACCESS_H_ */ diff --git a/components/esp_hw_support/include/soc/esp32s2/dport_access.h b/components/esp_hw_support/include/soc/esp32s2/dport_access.h deleted file mode 100644 index e5aedd2e1b..0000000000 --- a/components/esp_hw_support/include/soc/esp32s2/dport_access.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#ifndef _ESP_DPORT_ACCESS_H_ -#define _ESP_DPORT_ACCESS_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Read a sequence of DPORT registers to the buffer. - * - * @param[out] buff_out Contains the read data. - * @param[in] address Initial address for reading registers. - * @param[in] num_words The number of words. - */ -void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words); - -#define DPORT_STALL_OTHER_CPU_START() -#define DPORT_STALL_OTHER_CPU_END() -#define DPORT_INTERRUPT_DISABLE() -#define DPORT_INTERRUPT_RESTORE() - -#ifdef __cplusplus -} -#endif - -#endif /* _ESP_DPORT_ACCESS_H_ */ diff --git a/components/esp_hw_support/include/soc/esp32s3/dport_access.h b/components/esp_hw_support/include/soc/esp32s3/dport_access.h deleted file mode 100644 index e5aedd2e1b..0000000000 --- a/components/esp_hw_support/include/soc/esp32s3/dport_access.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#ifndef _ESP_DPORT_ACCESS_H_ -#define _ESP_DPORT_ACCESS_H_ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief Read a sequence of DPORT registers to the buffer. - * - * @param[out] buff_out Contains the read data. - * @param[in] address Initial address for reading registers. - * @param[in] num_words The number of words. - */ -void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words); - -#define DPORT_STALL_OTHER_CPU_START() -#define DPORT_STALL_OTHER_CPU_END() -#define DPORT_INTERRUPT_DISABLE() -#define DPORT_INTERRUPT_RESTORE() - -#ifdef __cplusplus -} -#endif - -#endif /* _ESP_DPORT_ACCESS_H_ */ diff --git a/components/esp_hw_support/port/esp32/CMakeLists.txt b/components/esp_hw_support/port/esp32/CMakeLists.txt index f06277097c..8de4a8725b 100644 --- a/components/esp_hw_support/port/esp32/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32/CMakeLists.txt @@ -12,7 +12,6 @@ set(srcs if(NOT BOOTLOADER_BUILD) list(APPEND srcs "cache_sram_mmu.c" - "dport_access.c" "esp_himem.c" "spiram.c" "spiram_psram.c") diff --git a/components/esp_hw_support/port/esp32/Kconfig.hw_support b/components/esp_hw_support/port/esp32/Kconfig.hw_support index e08fe92dbb..2ed4badd62 100644 --- a/components/esp_hw_support/port/esp32/Kconfig.hw_support +++ b/components/esp_hw_support/port/esp32/Kconfig.hw_support @@ -23,17 +23,6 @@ config ESP32_REV_MIN default 2 if ESP32_REV_MIN_2 default 3 if ESP32_REV_MIN_3 -config ESP32_DPORT_WORKAROUND - bool - default "y" if !FREERTOS_UNICORE && ESP32_REV_MIN < 2 - -config ESP32_DPORT_DIS_INTERRUPT_LVL - int "Disable the interrupt level for the DPORT workarounds" - default 5 - help - To prevent interrupting DPORT workarounds, - need to disable interrupt with a maximum used level in the system. - choice ESP32_XTAL_FREQ_SEL prompt "Main XTAL frequency" default ESP32_XTAL_FREQ_40 diff --git a/components/esp_hw_support/port/esp32/cache_sram_mmu.c b/components/esp_hw_support/port/esp32/cache_sram_mmu.c index 07f175d3df..b6d91cb453 100644 --- a/components/esp_hw_support/port/esp32/cache_sram_mmu.c +++ b/components/esp_hw_support/port/esp32/cache_sram_mmu.c @@ -7,6 +7,7 @@ #include #include "soc/soc.h" #include "soc/dport_reg.h" +#include "esp_attr.h" #include "string.h" #include "esp_spi_flash.h" diff --git a/components/esp_hw_support/port/esp32/dport_access.c b/components/esp_hw_support/port/esp32/dport_access.c deleted file mode 100644 index 6c5c6ad440..0000000000 --- a/components/esp_hw_support/port/esp32/dport_access.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include -#include "soc/dport_reg.h" -#include "xtensa/core-macros.h" - -/** - * @brief Read a sequence of DPORT registers to the buffer, SMP-safe version. - * - * This implementation uses a method of the pre-reading of the APB register - * before reading the register of the DPORT, without stall other CPU. - * There is disable/enable interrupt. - * - * @param[out] buff_out Contains the read data. - * @param[in] address Initial address for reading registers. - * @param[in] num_words The number of words. - */ -void IRAM_ATTR esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words) -{ - DPORT_INTERRUPT_DISABLE(); - for (uint32_t i = 0; i < num_words; ++i) { - buff_out[i] = DPORT_SEQUENCE_REG_READ(address + i * 4); - } - DPORT_INTERRUPT_RESTORE(); -} - -/** - * @brief Read value from register, SMP-safe version. - * - * This method uses the pre-reading of the APB register before reading the register of the DPORT. - * This implementation is useful for reading DORT registers for single reading without stall other CPU. - * There is disable/enable interrupt. - * - * @param reg Register address - * @return Value - */ -uint32_t IRAM_ATTR esp_dport_access_reg_read(uint32_t reg) -{ -#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM) - return _DPORT_REG_READ(reg); -#else - uint32_t apb; - unsigned int intLvl; - __asm__ __volatile__ (\ - "rsil %[LVL], "XTSTR(CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL)"\n"\ - "movi %[APB], "XTSTR(0x3ff40078)"\n"\ - "l32i %[APB], %[APB], 0\n"\ - "l32i %[REG], %[REG], 0\n"\ - "wsr %[LVL], "XTSTR(PS)"\n"\ - "rsync\n"\ - : [APB]"=a"(apb), [REG]"+a"(reg), [LVL]"=a"(intLvl)\ - : \ - : "memory" \ - ); - return reg; -#endif -} - -/** - * @brief Read value from register, NOT SMP-safe version. - * - * This method uses the pre-reading of the APB register before reading the register of the DPORT. - * There is not disable/enable interrupt. - * The difference from DPORT_REG_READ() is that the user himself must disable interrupts while DPORT reading. - * This implementation is useful for reading DORT registers in loop without stall other CPU. Note the usage example. - * The recommended way to read registers sequentially without stall other CPU - * is to use the method esp_dport_read_buffer(buff_out, address, num_words). It allows you to read registers in the buffer. - * - * \code{c} - * // This example shows how to use it. - * { // Use curly brackets to limit the visibility of variables in macros DPORT_INTERRUPT_DISABLE/RESTORE. - * DPORT_INTERRUPT_DISABLE(); // Disable interrupt only on current CPU. - * for (i = 0; i < max; ++i) { - * array[i] = esp_dport_access_sequence_reg_read(Address + i * 4); // reading DPORT registers - * } - * DPORT_INTERRUPT_RESTORE(); // restore the previous interrupt level - * } - * \endcode - * - * @param reg Register address - * @return Value - */ -uint32_t IRAM_ATTR esp_dport_access_sequence_reg_read(uint32_t reg) -{ -#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM) - return _DPORT_REG_READ(reg); -#else - uint32_t apb; - __asm__ __volatile__ (\ - "movi %[APB], "XTSTR(0x3ff40078)"\n"\ - "l32i %[APB], %[APB], 0\n"\ - "l32i %[REG], %[REG], 0\n"\ - : [APB]"=a"(apb), [REG]"+a"(reg)\ - : \ - : "memory" \ - ); - return reg; -#endif -} diff --git a/components/esp_hw_support/port/esp32c2/CMakeLists.txt b/components/esp_hw_support/port/esp32c2/CMakeLists.txt index f12789ce36..fe4a2d9b59 100644 --- a/components/esp_hw_support/port/esp32c2/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32c2/CMakeLists.txt @@ -9,8 +9,7 @@ set(srcs "cpu_util_esp32c2.c" ) if(NOT BOOTLOADER_BUILD) - list(APPEND srcs "../async_memcpy_impl_gdma.c" - "dport_access.c") + list(APPEND srcs "../async_memcpy_impl_gdma.c") endif() add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}") diff --git a/components/esp_hw_support/port/esp32c3/CMakeLists.txt b/components/esp_hw_support/port/esp32c3/CMakeLists.txt index dd45d93de1..6809b0567d 100644 --- a/components/esp_hw_support/port/esp32c3/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32c3/CMakeLists.txt @@ -13,7 +13,6 @@ if(NOT BOOTLOADER_BUILD) "esp_hmac.c" "esp_crypto_lock.c" "esp_ds.c" - "dport_access.c" "esp_memprot.c" "../esp_memprot_conv.c") endif() diff --git a/components/esp_hw_support/port/esp32c3/dport_access.c b/components/esp_hw_support/port/esp32c3/dport_access.c deleted file mode 100644 index 8364f5687e..0000000000 --- a/components/esp_hw_support/port/esp32c3/dport_access.c +++ /dev/null @@ -1,17 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include "soc/dport_access.h" - -// Read a sequence of DPORT registers to the buffer. -void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words) -{ - for (uint32_t i = 0; i < num_words; ++i) { - buff_out[i] = DPORT_SEQUENCE_REG_READ(address + i * 4); - } -} diff --git a/components/esp_hw_support/port/esp32h2/CMakeLists.txt b/components/esp_hw_support/port/esp32h2/CMakeLists.txt index 4ab5afcc24..63d425e4f3 100644 --- a/components/esp_hw_support/port/esp32h2/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32h2/CMakeLists.txt @@ -13,7 +13,6 @@ if(NOT BOOTLOADER_BUILD) "esp_hmac.c" "esp_crypto_lock.c" "esp_ds.c" - "dport_access.c" "esp_memprot.c" "../esp_memprot_conv.c") endif() diff --git a/components/esp_hw_support/port/esp32h2/dport_access.c b/components/esp_hw_support/port/esp32h2/dport_access.c deleted file mode 100644 index 8364f5687e..0000000000 --- a/components/esp_hw_support/port/esp32h2/dport_access.c +++ /dev/null @@ -1,17 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include "soc/dport_access.h" - -// Read a sequence of DPORT registers to the buffer. -void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words) -{ - for (uint32_t i = 0; i < num_words; ++i) { - buff_out[i] = DPORT_SEQUENCE_REG_READ(address + i * 4); - } -} diff --git a/components/esp_hw_support/port/esp32s2/CMakeLists.txt b/components/esp_hw_support/port/esp32s2/CMakeLists.txt index dad5721108..c1a80d112c 100644 --- a/components/esp_hw_support/port/esp32s2/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32s2/CMakeLists.txt @@ -16,8 +16,7 @@ if(NOT BOOTLOADER_BUILD) "memprot.c" "esp_hmac.c" "esp_crypto_lock.c" - "esp_ds.c" - "dport_access.c") + "esp_ds.c") if(CONFIG_SPIRAM) list(APPEND srcs "spiram.c" "mmu_psram.c" "spiram_psram.c") diff --git a/components/esp_hw_support/port/esp32s2/dport_access.c b/components/esp_hw_support/port/esp32s2/dport_access.c deleted file mode 100644 index ab24c510a5..0000000000 --- a/components/esp_hw_support/port/esp32s2/dport_access.c +++ /dev/null @@ -1,17 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include "soc/dport_access.h" - -// Read a sequence of DPORT registers to the buffer. -void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words) -{ - for (uint32_t i = 0; i < num_words; ++i) { - buff_out[i] = DPORT_SEQUENCE_REG_READ(address + i * 4); - } -} diff --git a/components/esp_hw_support/port/esp32s2/memprot.c b/components/esp_hw_support/port/esp32s2/memprot.c index 6e17fc938b..544c256228 100644 --- a/components/esp_hw_support/port/esp32s2/memprot.c +++ b/components/esp_hw_support/port/esp32s2/memprot.c @@ -11,7 +11,6 @@ #include #include "sdkconfig.h" #include "soc/sensitive_reg.h" -#include "soc/dport_access.h" #include "soc/periph_defs.h" #include "esp_intr_alloc.h" #include "hal/memprot_ll.h" diff --git a/components/esp_hw_support/port/esp32s3/CMakeLists.txt b/components/esp_hw_support/port/esp32s3/CMakeLists.txt index fd797ad315..226230e00c 100644 --- a/components/esp_hw_support/port/esp32s3/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32s3/CMakeLists.txt @@ -13,7 +13,6 @@ set(srcs if(NOT BOOTLOADER_BUILD) list(APPEND srcs "../async_memcpy_impl_gdma.c" - "dport_access.c" "esp_hmac.c" "esp_ds.c" "esp_crypto_lock.c") diff --git a/components/esp_hw_support/port/esp32s3/dport_access.c b/components/esp_hw_support/port/esp32s3/dport_access.c deleted file mode 100644 index ab24c510a5..0000000000 --- a/components/esp_hw_support/port/esp32s3/dport_access.c +++ /dev/null @@ -1,17 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include -#include -#include "soc/dport_access.h" - -// Read a sequence of DPORT registers to the buffer. -void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words) -{ - for (uint32_t i = 0; i < num_words; ++i) { - buff_out[i] = DPORT_SEQUENCE_REG_READ(address + i * 4); - } -} diff --git a/components/esp_hw_support/test/test_dport.c b/components/esp_hw_support/test/test_dport.c index e2fad32efa..8cad4f815d 100644 --- a/components/esp_hw_support/test/test_dport.c +++ b/components/esp_hw_support/test/test_dport.c @@ -23,6 +23,7 @@ #include "hal/uart_types.h" #include "hal/uart_ll.h" #include "soc/dport_reg.h" +#include "dport_access.h" #include "soc/rtc.h" #include "hal/cpu_hal.h" #include "esp_intr_alloc.h" @@ -444,7 +445,7 @@ which is critical for the DPORT pre-read workaround. To fix it we added addition */ static uint32_t IRAM_ATTR test_dport_access_reg_read(uint32_t reg) { -#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM) +#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !SOC_DPORT_WORKAROUND return _DPORT_REG_READ(reg); #else uint32_t apb; @@ -454,7 +455,7 @@ static uint32_t IRAM_ATTR test_dport_access_reg_read(uint32_t reg) /* "movi %[APB], "XTSTR(0x3ff40078)"\n" */ /* (1) uncomment for reproduce issue */ \ "bnez %[APB], kl1\n" /* this branch command helps get good reproducing */ \ "kl1:\n"\ - "rsil %[LVL], "XTSTR(CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL)"\n"\ + "rsil %[LVL], "XTSTR(SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL)"\n"\ "movi %[APB], "XTSTR(0x3ff40078)"\n" /* (2) comment for reproduce issue */ \ "l32i %[APB], %[APB], 0\n"\ "l32i %[REG], %[REG], 0\n"\ diff --git a/components/esp_rom/include/esp32/rom/cache.h b/components/esp_rom/include/esp32/rom/cache.h index 4b923e669d..fd28e9f1f0 100644 --- a/components/esp_rom/include/esp32/rom/cache.h +++ b/components/esp_rom/include/esp32/rom/cache.h @@ -1,21 +1,20 @@ -// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _ROM_CACHE_H_ #define _ROM_CACHE_H_ -#include "soc/dport_access.h" +#include "esp_attr.h" +#if __has_include("dport_access.h") + #include "dport_access.h" +#else + #pragma message("For ESP32 with ECO version < 2, you need to use a DPORT workaround that stalls the other CPU") + #define DPORT_STALL_OTHER_CPU_START() + #define DPORT_STALL_OTHER_CPU_END() +#endif #ifdef __cplusplus extern "C" { diff --git a/components/esp_system/port/arch/xtensa/esp_ipc_isr.c b/components/esp_system/port/arch/xtensa/esp_ipc_isr.c index 959f791646..c75f7690d1 100644 --- a/components/esp_system/port/arch/xtensa/esp_ipc_isr.c +++ b/components/esp_system/port/arch/xtensa/esp_ipc_isr.c @@ -11,10 +11,8 @@ #include "esp_err.h" #include "esp_attr.h" #include "soc/soc.h" -#include "soc/dport_access.h" -#ifdef CONFIG_IDF_TARGET_ESP32 #include "soc/dport_reg.h" -#else +#ifndef CONFIG_IDF_TARGET_ESP32 #include "soc/periph_defs.h" #include "soc/system_reg.h" #endif @@ -157,12 +155,6 @@ void IRAM_ATTR esp_ipc_isr_stall_resume(void) IPC_ISR_EXIT_CRITICAL(); } -void esp_dport_access_stall_other_cpu_start(void) __attribute__((alias("esp_ipc_isr_stall_other_cpu"))); -void esp_dport_access_stall_other_cpu_end(void) __attribute__((alias("esp_ipc_isr_release_other_cpu"))); -void esp_dport_access_int_pause(void) __attribute__((alias("esp_ipc_isr_stall_pause"))); -void esp_dport_access_int_abort(void) __attribute__((alias("esp_ipc_isr_stall_abort"))); -void esp_dport_access_int_resume(void) __attribute__((alias("esp_ipc_isr_stall_resume"))); - /* End public API functions */ diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c index 57cf190372..aa5ec0d2e7 100644 --- a/components/esp_system/port/cpu_start.c +++ b/components/esp_system/port/cpu_start.c @@ -32,13 +32,11 @@ #include "esp32s2/rtc.h" #include "esp32s2/rom/cache.h" #include "esp32s2/spiram.h" -#include "esp32s2/dport_access.h" #include "esp32s2/memprot.h" #elif CONFIG_IDF_TARGET_ESP32S3 #include "esp32s3/rtc.h" #include "esp32s3/rom/cache.h" #include "esp32s3/spiram.h" -#include "esp32s3/dport_access.h" #include "esp_memprot.h" #include "soc/assist_debug_reg.h" #include "soc/system_reg.h" diff --git a/components/esp_system/port/panic_handler.c b/components/esp_system/port/panic_handler.c index 1164d51abf..fdcfdc3196 100644 --- a/components/esp_system/port/panic_handler.c +++ b/components/esp_system/port/panic_handler.c @@ -23,10 +23,6 @@ #include "sdkconfig.h" #include "esp_rom_sys.h" -#if CONFIG_IDF_TARGET_ESP32 -#include "esp32/dport_access.h" -#endif - #if CONFIG_ESP_SYSTEM_MEMPROT_FEATURE #ifdef CONFIG_IDF_TARGET_ESP32S2 #include "esp32s2/memprot.h" diff --git a/components/esp_system/port/soc/esp32/cache_err_int.c b/components/esp_system/port/soc/esp32/cache_err_int.c index b5268c898a..d2ee4118af 100644 --- a/components/esp_system/port/soc/esp32/cache_err_int.c +++ b/components/esp_system/port/soc/esp32/cache_err_int.c @@ -23,7 +23,6 @@ #include "soc/dport_reg.h" #include "hal/cpu_hal.h" -#include "esp32/dport_access.h" #include "esp_rom_sys.h" #include "sdkconfig.h" diff --git a/components/esp_system/port/soc/esp32/clk.c b/components/esp_system/port/soc/esp32/clk.c index 2730646bfc..80f7e3acee 100644 --- a/components/esp_system/port/soc/esp32/clk.c +++ b/components/esp_system/port/soc/esp32/clk.c @@ -6,7 +6,6 @@ #include "soc/rtc.h" #include "soc/dport_reg.h" -#include "soc/dport_access.h" #include "soc/i2s_reg.h" #include "hal/cpu_hal.h" #include "esp_private/periph_ctrl.h" diff --git a/components/esp_system/port/soc/esp32/highint_hdl.S b/components/esp_system/port/soc/esp32/highint_hdl.S index a07850ae87..22209cb49d 100644 --- a/components/esp_system/port/soc/esp32/highint_hdl.S +++ b/components/esp_system/port/soc/esp32/highint_hdl.S @@ -13,6 +13,7 @@ #include "esp_private/panic_reason.h" #include "sdkconfig.h" #include "soc/soc.h" +#include "soc/soc_caps.h" #include "soc/dport_reg.h" #include "soc/timer_group_reg.h" @@ -380,7 +381,7 @@ xt_highintx: /* Here, we can use a0, a2, a3, a4, a5 registers */ getcoreid a5 - rsil a0, CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL /* disable nested interrupt */ + rsil a0, SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL /* disable nested interrupt */ beqz a5, 1f movi a2, _lx_intr_livelock_app diff --git a/components/esp_system/port/soc/esp32c2/clk.c b/components/esp_system/port/soc/esp32c2/clk.c index 1a03ccf65c..ad4d6d992f 100644 --- a/components/esp_system/port/soc/esp32c2/clk.c +++ b/components/esp_system/port/soc/esp32c2/clk.c @@ -17,7 +17,6 @@ #include "esp32c2/rom/uart.h" #include "esp32c2/rom/rtc.h" #include "soc/system_reg.h" -#include "soc/dport_access.h" #include "soc/soc.h" #include "soc/rtc.h" #include "soc/rtc_periph.h" diff --git a/components/esp_system/port/soc/esp32c3/clk.c b/components/esp_system/port/soc/esp32c3/clk.c index 19ab41fbe9..7d608c91c6 100644 --- a/components/esp_system/port/soc/esp32c3/clk.c +++ b/components/esp_system/port/soc/esp32c3/clk.c @@ -15,7 +15,6 @@ #include "esp32c3/rom/ets_sys.h" #include "esp32c3/rom/uart.h" #include "soc/system_reg.h" -#include "soc/dport_access.h" #include "soc/soc.h" #include "soc/rtc.h" #include "soc/rtc_periph.h" diff --git a/components/esp_system/port/soc/esp32h2/clk.c b/components/esp_system/port/soc/esp32h2/clk.c index a8fde2b0cc..91bb0628e2 100644 --- a/components/esp_system/port/soc/esp32h2/clk.c +++ b/components/esp_system/port/soc/esp32h2/clk.c @@ -16,7 +16,6 @@ #include "esp32h2/rom/uart.h" #include "esp32h2/rom/rtc.h" #include "soc/system_reg.h" -#include "soc/dport_access.h" #include "soc/soc.h" #include "soc/rtc.h" #include "soc/rtc_periph.h" diff --git a/components/esp_system/port/soc/esp32s2/cache_err_int.c b/components/esp_system/port/soc/esp32s2/cache_err_int.c index 4991feff36..374dbc05c6 100644 --- a/components/esp_system/port/soc/esp32s2/cache_err_int.c +++ b/components/esp_system/port/soc/esp32s2/cache_err_int.c @@ -26,7 +26,6 @@ #include "soc/periph_defs.h" #include "hal/cpu_hal.h" -#include "esp32s2/dport_access.h" #include "esp_rom_sys.h" #include "sdkconfig.h" diff --git a/components/esp_system/port/soc/esp32s2/clk.c b/components/esp_system/port/soc/esp32s2/clk.c index 482183b22c..98cffe9638 100644 --- a/components/esp_system/port/soc/esp32s2/clk.c +++ b/components/esp_system/port/soc/esp32s2/clk.c @@ -15,7 +15,7 @@ #include "esp_rom_uart.h" #include "esp_rom_sys.h" #include "soc/system_reg.h" -#include "soc/dport_access.h" +#include "soc/dport_reg.h" #include "soc/soc.h" #include "soc/rtc.h" #include "soc/rtc_periph.h" diff --git a/components/esp_system/port/soc/esp32s3/clk.c b/components/esp_system/port/soc/esp32s3/clk.c index 11abfe62c3..e5d1282e05 100644 --- a/components/esp_system/port/soc/esp32s3/clk.c +++ b/components/esp_system/port/soc/esp32s3/clk.c @@ -15,7 +15,6 @@ #include "esp_rom_uart.h" #include "esp_rom_sys.h" #include "soc/system_reg.h" -#include "soc/dport_access.h" #include "soc/soc.h" #include "soc/rtc.h" #include "soc/rtc_periph.h" diff --git a/components/esp_timer/test/test_esp_timer.c b/components/esp_timer/test/test_esp_timer.c index 29627e6fed..3a4e0471b6 100644 --- a/components/esp_timer/test/test_esp_timer.c +++ b/components/esp_timer/test/test_esp_timer.c @@ -667,9 +667,9 @@ TEST_CASE("Can start/stop timer from ISR context", "[esp_timer]") vSemaphoreDelete(sem); } -#if !defined(CONFIG_FREERTOS_UNICORE) && defined(CONFIG_ESP32_DPORT_WORKAROUND) +#if !defined(CONFIG_FREERTOS_UNICORE) && SOC_DPORT_WORKAROUND -#include "soc/dport_reg.h" +#include "dport_access.h" static bool task_stop; static bool time_jumped; @@ -795,7 +795,7 @@ TEST_CASE("esp_timer_impl_set_alarm and using start_once do not lead that the Sy TEST_ASSERT(time_jumped == false); } -#endif // !defined(CONFIG_FREERTOS_UNICORE) && defined(CONFIG_ESP32_DPORT_WORKAROUND) +#endif // !defined(CONFIG_FREERTOS_UNICORE) && SOC_DPORT_WORKAROUND TEST_CASE("Test case when esp_timer_impl_set_alarm needs set timer < now_time", "[esp_timer]") { diff --git a/components/esp_wifi/esp32/esp_adapter.c b/components/esp_wifi/esp32/esp_adapter.c index 7e3ad7cd79..c698409c14 100644 --- a/components/esp_wifi/esp32/esp_adapter.c +++ b/components/esp_wifi/esp32/esp_adapter.c @@ -41,7 +41,7 @@ #include "esp_smartconfig.h" #include "esp_coexist_internal.h" #include "esp_coexist_adapter.h" -#include "esp32/dport_access.h" +#include "dport_access.h" #include "esp_rom_sys.h" #include "esp32/rom/ets_sys.h" diff --git a/components/freertos/FreeRTOS-Kernel/portable/port_common.c b/components/freertos/FreeRTOS-Kernel/portable/port_common.c index b8bf1d4293..8ae7ae504d 100644 --- a/components/freertos/FreeRTOS-Kernel/portable/port_common.c +++ b/components/freertos/FreeRTOS-Kernel/portable/port_common.c @@ -18,7 +18,6 @@ #include "esp_log.h" #include "esp_memory_utils.h" #include "esp_freertos_hooks.h" -#include "soc/dport_access.h" #include "sdkconfig.h" #if CONFIG_IDF_TARGET_ESP32 diff --git a/components/hal/esp32/include/hal/clk_gate_ll.h b/components/hal/esp32/include/hal/clk_gate_ll.h index 43b9b07e5e..40d87288de 100644 --- a/components/hal/esp32/include/hal/clk_gate_ll.h +++ b/components/hal/esp32/include/hal/clk_gate_ll.h @@ -1,16 +1,8 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once @@ -23,7 +15,6 @@ extern "C" { #include "esp_attr.h" #include "soc/periph_defs.h" #include "soc/dport_reg.h" -#include "soc/dport_access.h" static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) { diff --git a/components/hal/esp32/include/hal/sha_ll.h b/components/hal/esp32/include/hal/sha_ll.h index eb96738785..5740d076e8 100644 --- a/components/hal/esp32/include/hal/sha_ll.h +++ b/components/hal/esp32/include/hal/sha_ll.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #include diff --git a/components/hal/esp32c2/include/hal/clk_gate_ll.h b/components/hal/esp32c2/include/hal/clk_gate_ll.h index 8a355d5fac..8bc09c3ca1 100644 --- a/components/hal/esp32c2/include/hal/clk_gate_ll.h +++ b/components/hal/esp32c2/include/hal/clk_gate_ll.h @@ -16,6 +16,7 @@ extern "C" { #include "soc/system_reg.h" #include "soc/syscon_reg.h" #include "soc/dport_access.h" +#include "esp_attr.h" static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) { diff --git a/components/hal/esp32c3/include/hal/clk_gate_ll.h b/components/hal/esp32c3/include/hal/clk_gate_ll.h index 20377e24d4..88f98de90a 100644 --- a/components/hal/esp32c3/include/hal/clk_gate_ll.h +++ b/components/hal/esp32c3/include/hal/clk_gate_ll.h @@ -16,6 +16,7 @@ extern "C" { #include "soc/system_reg.h" #include "soc/syscon_reg.h" #include "soc/dport_access.h" +#include "esp_attr.h" static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) { diff --git a/components/hal/esp32h2/include/hal/clk_gate_ll.h b/components/hal/esp32h2/include/hal/clk_gate_ll.h index 5ec24db196..c9dd6971b8 100644 --- a/components/hal/esp32h2/include/hal/clk_gate_ll.h +++ b/components/hal/esp32h2/include/hal/clk_gate_ll.h @@ -16,6 +16,7 @@ extern "C" { #include "soc/system_reg.h" #include "soc/syscon_reg.h" #include "soc/dport_access.h" +#include "esp_attr.h" static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) { diff --git a/components/hal/esp32s2/include/hal/memprot_ll.h b/components/hal/esp32s2/include/hal/memprot_ll.h index fa77e2f3ab..ac4becdaca 100644 --- a/components/hal/esp32s2/include/hal/memprot_ll.h +++ b/components/hal/esp32s2/include/hal/memprot_ll.h @@ -1,22 +1,15 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #include #include "soc/memprot_defs.h" #include "hal/memprot_types.h" +#include "soc/dport_reg.h" #ifdef __cplusplus extern "C" { diff --git a/components/soc/CMakeLists.txt b/components/soc/CMakeLists.txt index cd7e118e51..9dacce5335 100644 --- a/components/soc/CMakeLists.txt +++ b/components/soc/CMakeLists.txt @@ -1,4 +1,5 @@ idf_component_register(SRCS "lldesc.c" + "dport_access_common.c" INCLUDE_DIRS include LDFRAGMENTS "linker.lf") diff --git a/components/esp_hw_support/port/esp32c2/dport_access.c b/components/soc/dport_access_common.c similarity index 78% rename from components/esp_hw_support/port/esp32c2/dport_access.c rename to components/soc/dport_access_common.c index 3476bbe72d..9cc09f21aa 100644 --- a/components/esp_hw_support/port/esp32c2/dport_access.c +++ b/components/soc/dport_access_common.c @@ -5,13 +5,14 @@ */ #include -#include #include "soc/dport_access.h" // Read a sequence of DPORT registers to the buffer. void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words) { - for (uint32_t i = 0; i < num_words; ++i) { + DPORT_INTERRUPT_DISABLE(); + for (uint32_t i = 0; i < num_words; ++i) { buff_out[i] = DPORT_SEQUENCE_REG_READ(address + i * 4); } + DPORT_INTERRUPT_RESTORE(); } diff --git a/components/soc/esp32/CMakeLists.txt b/components/soc/esp32/CMakeLists.txt index 1d3cb61c9e..8363f7307c 100644 --- a/components/soc/esp32/CMakeLists.txt +++ b/components/soc/esp32/CMakeLists.txt @@ -1,6 +1,7 @@ set(srcs "adc_periph.c" "dac_periph.c" + "dport_access.c" "gpio_periph.c" "i2c_periph.c" "i2s_periph.c" @@ -23,3 +24,7 @@ add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" "${srcs}") target_sources(${COMPONENT_LIB} PRIVATE "${srcs}") target_include_directories(${COMPONENT_LIB} PUBLIC . include) + +#esp_dport_access_reg_read is added as an undefined symbol because otherwise +#the linker can ignore dport_access.c as it would no other files depending on any symbols in it. +set_property(TARGET ${COMPONENT_LIB} APPEND PROPERTY INTERFACE_LINK_LIBRARIES "-u esp_dport_access_reg_read") diff --git a/components/soc/esp32/dport_access.c b/components/soc/esp32/dport_access.c new file mode 100644 index 0000000000..d37190ab50 --- /dev/null +++ b/components/soc/esp32/dport_access.c @@ -0,0 +1,51 @@ +/* + * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include "soc/soc_caps.h" +#include "soc/dport_access.h" +#include "esp_attr.h" + +IRAM_ATTR uint32_t esp_dport_access_reg_read(uint32_t reg) +{ +#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !SOC_DPORT_WORKAROUND + return _DPORT_REG_READ(reg); +#else + uint32_t apb; + unsigned int intLvl; + __asm__ __volatile__ (\ + "rsil %[LVL], "XTSTR(SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL)"\n"\ + "movi %[APB], "XTSTR(0x3ff40078)"\n"\ + "l32i %[APB], %[APB], 0\n"\ + "l32i %[REG], %[REG], 0\n"\ + "wsr %[LVL], "XTSTR(PS)"\n"\ + "rsync\n"\ + : [APB]"=a"(apb), [REG]"+a"(reg), [LVL]"=a"(intLvl)\ + : \ + : "memory" \ + ); + return reg; +#endif +} + +IRAM_ATTR uint32_t esp_dport_access_sequence_reg_read(uint32_t reg) +{ +#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !SOC_DPORT_WORKAROUND + return _DPORT_REG_READ(reg); +#else + uint32_t apb; + __asm__ __volatile__ (\ + "movi %[APB], "XTSTR(0x3ff40078)"\n"\ + "l32i %[APB], %[APB], 0\n"\ + "l32i %[REG], %[REG], 0\n"\ + : [APB]"=a"(apb), [REG]"+a"(reg)\ + : \ + : "memory" \ + ); + return reg; +#endif +} diff --git a/components/soc/esp32/include/soc/Kconfig.soc_caps.in b/components/soc/esp32/include/soc/Kconfig.soc_caps.in index 4e845dd0a3..33161ac474 100644 --- a/components/soc/esp32/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32/include/soc/Kconfig.soc_caps.in @@ -11,6 +11,10 @@ config SOC_TWAI_BRP_DIV_SUPPORTED string default "Not determined" +config SOC_DPORT_WORKAROUND + string + default "Not determined" + config SOC_CAPS_ECO_VER_MAX int default 3 @@ -119,6 +123,10 @@ config SOC_SECURE_BOOT_SUPPORTED bool default y +config SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL + int + default 5 + config SOC_ADC_RTC_CTRL_SUPPORTED bool default y diff --git a/components/soc/esp32/include/soc/dport_access.h b/components/soc/esp32/include/soc/dport_access.h index 7ce525dcda..823246aa6b 100644 --- a/components/soc/esp32/include/soc/dport_access.h +++ b/components/soc/esp32/include/soc/dport_access.h @@ -1,25 +1,14 @@ -// Copyright 2010-2017 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _DPORT_ACCESS_H_ #define _DPORT_ACCESS_H_ #include - -#include "esp_attr.h" -#include "esp32/dport_access.h" - +#include "soc/soc_caps.h" #include "sdkconfig.h" #ifdef __cplusplus @@ -36,11 +25,11 @@ extern "C" { // This method uses the pre-read APB implementation(*) without stall other CPU. // This is beneficial for single readings. // 2) If you want to make a sequence of DPORT reads to buffer, -// use dport_read_buffer(buff_out, address, num_words), +// use esp_dport_access_read_buffer(buff_out, address, num_words), // it is the faster method and it doesn't stop other CPU. // 3) If you want to make a sequence of DPORT reads, but you don't want to stop other CPU // and you want to do it faster then you need use DPORT_SEQUENCE_REG_READ(). -// The difference from the first is that the user himself must disable interrupts while DPORT reading. +// The difference from (2) is that the user himself must disable interrupts while DPORT reading. // Note that disable interrupt need only if the chip has two cores. // 4) If you want to make a sequence of DPORT reads, // use DPORT_STALL_OTHER_CPU_START() macro explicitly @@ -68,17 +57,12 @@ extern "C" { * This implementation is useful for reading DORT registers for single reading without stall other CPU. * There is disable/enable interrupt. * + * @note Should be placed in IRAM. + * * @param reg Register address * @return Value */ -static inline uint32_t IRAM_ATTR DPORT_REG_READ(uint32_t reg) -{ -#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM) - return _DPORT_REG_READ(reg); -#else - return esp_dport_access_reg_read(reg); -#endif -} +uint32_t esp_dport_access_reg_read(uint32_t reg); /** * @brief Read value from register, NOT SMP-safe version. @@ -90,12 +74,14 @@ static inline uint32_t IRAM_ATTR DPORT_REG_READ(uint32_t reg) * The recommended way to read registers sequentially without stall other CPU * is to use the method esp_dport_read_buffer(buff_out, address, num_words). It allows you to read registers in the buffer. * + * @note Should be placed in IRAM. + * * \code{c} * // This example shows how to use it. * { // Use curly brackets to limit the visibility of variables in macros DPORT_INTERRUPT_DISABLE/RESTORE. * DPORT_INTERRUPT_DISABLE(); // Disable interrupt only on current CPU. * for (i = 0; i < max; ++i) { - * array[i] = DPORT_SEQUENCE_REG_READ(Address + i * 4); // reading DPORT registers + * array[i] = esp_dport_access_sequence_reg_read(Address + i * 4); // reading DPORT registers * } * DPORT_INTERRUPT_RESTORE(); // restore the previous interrupt level * } @@ -104,14 +90,45 @@ static inline uint32_t IRAM_ATTR DPORT_REG_READ(uint32_t reg) * @param reg Register address * @return Value */ -static inline uint32_t IRAM_ATTR DPORT_SEQUENCE_REG_READ(uint32_t reg) -{ -#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM) - return _DPORT_REG_READ(reg); +uint32_t esp_dport_access_sequence_reg_read(uint32_t reg); + +/** + * @brief Read a sequence of DPORT registers to the buffer, SMP-safe version. + * + * This implementation uses a method of the pre-reading of the APB register + * before reading the register of the DPORT, without stall other CPU. + * There is disable/enable interrupt. + * + * @note Should be placed in IRAM. + * + * @param[out] buff_out Contains the read data. + * @param[in] address Initial address for reading registers. + * @param[in] num_words The number of words. + */ +void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words); + +#if defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !SOC_DPORT_WORKAROUND + #define DPORT_INTERRUPT_DISABLE() + #define DPORT_INTERRUPT_RESTORE() + #define DPORT_REG_READ(reg) _DPORT_REG_READ(reg) + #define DPORT_SEQUENCE_REG_READ(reg) _DPORT_REG_READ(reg) #else - return esp_dport_access_sequence_reg_read(reg); -#endif -} + #define DPORT_REG_READ(reg) esp_dport_access_reg_read(reg) + #define DPORT_SEQUENCE_REG_READ(reg) esp_dport_access_sequence_reg_read(reg) + #ifndef XTSTR + #define _XTSTR(x) # x + #define XTSTR(x) _XTSTR(x) + #endif + + #define DPORT_INTERRUPT_DISABLE() unsigned intLvl = __extension__({ unsigned __tmp; \ + __asm__ __volatile__("rsil %0, " XTSTR(SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL) "\n" \ + : "=a" (__tmp) : : "memory" ); \ + __tmp;}) + #define DPORT_INTERRUPT_RESTORE() do{ unsigned __tmp = (intLvl); \ + __asm__ __volatile__("wsr.ps %0 ; rsync\n" \ + : : "a" (__tmp) : "memory" ); \ + }while(0) +#endif // defined(BOOTLOADER_BUILD) || defined(CONFIG_FREERTOS_UNICORE) || !SOC_DPORT_WORKAROUND //get bit or get bits from register #define DPORT_REG_GET_BIT(_r, _b) (DPORT_REG_READ(_r) & (_b)) @@ -155,23 +172,7 @@ static inline uint32_t IRAM_ATTR DPORT_SEQUENCE_REG_READ(uint32_t reg) #define _DPORT_REG_SET_BIT(_r, _b) _DPORT_REG_WRITE((_r), (_DPORT_REG_READ(_r)|(_b))) #define _DPORT_REG_CLR_BIT(_r, _b) _DPORT_REG_WRITE((_r), (_DPORT_REG_READ(_r) & (~(_b)))) -/** - * @brief Read value from register, SMP-safe version. - * - * This method uses the pre-reading of the APB register before reading the register of the DPORT. - * This implementation is useful for reading DORT registers for single reading without stall other CPU. - * - * @param reg Register address - * @return Value - */ -static inline uint32_t IRAM_ATTR DPORT_READ_PERI_REG(uint32_t reg) -{ -#if defined(BOOTLOADER_BUILD) || !defined(CONFIG_ESP32_DPORT_WORKAROUND) || !defined(ESP_PLATFORM) - return _DPORT_REG_READ(reg); -#else - return esp_dport_access_reg_read(reg); -#endif -} +#define DPORT_READ_PERI_REG(reg) DPORT_REG_READ(reg) //write value to register #define DPORT_WRITE_PERI_REG(addr, val) _DPORT_WRITE_PERI_REG((addr), (val)) diff --git a/components/soc/esp32/include/soc/soc.h b/components/soc/esp32/include/soc/soc.h index b53d02fcbd..92f4cb7a4e 100644 --- a/components/soc/esp32/include/soc/soc.h +++ b/components/soc/esp32/include/soc/soc.h @@ -9,6 +9,7 @@ #ifndef __ASSEMBLER__ #include #include "esp_assert.h" +#include "soc/soc_caps.h" #endif #include "esp_bit_defs.h" @@ -29,7 +30,7 @@ #define IS_DPORT_REG(_r) (((_r) >= DR_REG_DPORT_BASE) && (_r) <= DR_REG_DPORT_END) -#if !defined( BOOTLOADER_BUILD ) && defined( CONFIG_ESP32_DPORT_WORKAROUND ) && defined( ESP_PLATFORM ) +#if !defined( BOOTLOADER_BUILD ) && !defined( CONFIG_FREERTOS_UNICORE ) && SOC_DPORT_WORKAROUND #define ASSERT_IF_DPORT_REG(_r, OP) TRY_STATIC_ASSERT(!IS_DPORT_REG(_r), (Cannot use OP for DPORT registers use DPORT_##OP)); #else #define ASSERT_IF_DPORT_REG(_r, OP) diff --git a/components/soc/esp32/include/soc/soc_caps.h b/components/soc/esp32/include/soc/soc_caps.h index d5c7949bfd..38cbe76484 100644 --- a/components/soc/esp32/include/soc/soc_caps.h +++ b/components/soc/esp32/include/soc/soc_caps.h @@ -58,6 +58,7 @@ // defined correctly #define SOC_BROWNOUT_RESET_SUPPORTED "Not determined" #define SOC_TWAI_BRP_DIV_SUPPORTED "Not determined" +#define SOC_DPORT_WORKAROUND "Not determined" #endif /*-------------------------- COMMON CAPS ---------------------------------------*/ @@ -90,6 +91,11 @@ #define SOC_FLASH_ENC_SUPPORTED 1 #define SOC_SECURE_BOOT_SUPPORTED 1 +#if SOC_CAPS_ECO_VER < 2 +#define SOC_DPORT_WORKAROUND 1 +#define SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL (5U) +#endif // SOC_CAPS_ECO_VER < 2 + /*-------------------------- ADC CAPS ----------------------------------------*/ /** * TO BE REMOVED diff --git a/components/soc/esp32c2/include/soc/dport_access.h b/components/soc/esp32c2/include/soc/dport_access.h index e09a9e477e..5a847ca484 100644 --- a/components/soc/esp32c2/include/soc/dport_access.h +++ b/components/soc/esp32c2/include/soc/dport_access.h @@ -8,9 +8,6 @@ #define _DPORT_ACCESS_H_ #include -#include "esp_attr.h" -#include "esp_attr.h" -#include "esp32c2/dport_access.h" #include "soc.h" #include "uart_reg.h" @@ -20,6 +17,18 @@ extern "C" { // Target does not have DPORT bus, so these macros are all same as the non-DPORT versions +#define DPORT_INTERRUPT_DISABLE() +#define DPORT_INTERRUPT_RESTORE() + +/** + * @brief Read a sequence of DPORT registers to the buffer. + * + * @param[out] buff_out Contains the read data. + * @param[in] address Initial address for reading registers. + * @param[in] num_words The number of words. + */ +void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words); + // _DPORT_REG_WRITE & DPORT_REG_WRITE are equivalent. #define _DPORT_REG_READ(_r) (*(volatile uint32_t *)(_r)) #define _DPORT_REG_WRITE(_r, _v) (*(volatile uint32_t *)(_r)) = (_v) diff --git a/components/soc/esp32c2/include/soc/dport_reg.h b/components/soc/esp32c2/include/soc/dport_reg.h new file mode 100644 index 0000000000..1fcf518d3d --- /dev/null +++ b/components/soc/esp32c2/include/soc/dport_reg.h @@ -0,0 +1,23 @@ +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef _SOC_DPORT_REG_H_ +#define _SOC_DPORT_REG_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "soc.h" + +#ifndef __ASSEMBLER__ +#include "dport_access.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif /*_SOC_DPORT_REG_H_ */ diff --git a/components/soc/esp32c3/include/soc/dport_access.h b/components/soc/esp32c3/include/soc/dport_access.h index e6dfa2bec0..5a847ca484 100644 --- a/components/soc/esp32c3/include/soc/dport_access.h +++ b/components/soc/esp32c3/include/soc/dport_access.h @@ -1,24 +1,13 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _DPORT_ACCESS_H_ #define _DPORT_ACCESS_H_ #include -#include "esp_attr.h" -#include "esp_attr.h" -#include "esp32c3/dport_access.h" #include "soc.h" #include "uart_reg.h" @@ -28,6 +17,18 @@ extern "C" { // Target does not have DPORT bus, so these macros are all same as the non-DPORT versions +#define DPORT_INTERRUPT_DISABLE() +#define DPORT_INTERRUPT_RESTORE() + +/** + * @brief Read a sequence of DPORT registers to the buffer. + * + * @param[out] buff_out Contains the read data. + * @param[in] address Initial address for reading registers. + * @param[in] num_words The number of words. + */ +void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words); + // _DPORT_REG_WRITE & DPORT_REG_WRITE are equivalent. #define _DPORT_REG_READ(_r) (*(volatile uint32_t *)(_r)) #define _DPORT_REG_WRITE(_r, _v) (*(volatile uint32_t *)(_r)) = (_v) diff --git a/components/soc/esp32h2/include/soc/dport_access.h b/components/soc/esp32h2/include/soc/dport_access.h index 6d5704ecf1..d8bc730478 100644 --- a/components/soc/esp32h2/include/soc/dport_access.h +++ b/components/soc/esp32h2/include/soc/dport_access.h @@ -8,9 +8,6 @@ #define _DPORT_ACCESS_H_ #include -#include "esp_attr.h" -#include "esp_attr.h" -#include "esp32h2/dport_access.h" #include "soc.h" #include "soc/uart_reg.h" @@ -20,6 +17,18 @@ extern "C" { // Target does not have DPORT bus, so these macros are all same as the non-DPORT versions +#define DPORT_INTERRUPT_DISABLE() +#define DPORT_INTERRUPT_RESTORE() + +/** + * @brief Read a sequence of DPORT registers to the buffer. + * + * @param[out] buff_out Contains the read data. + * @param[in] address Initial address for reading registers. + * @param[in] num_words The number of words. + */ +void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words); + // _DPORT_REG_WRITE & DPORT_REG_WRITE are equivalent. #define _DPORT_REG_READ(_r) (*(volatile uint32_t *)(_r)) #define _DPORT_REG_WRITE(_r, _v) (*(volatile uint32_t *)(_r)) = (_v) diff --git a/components/soc/esp32h2/include/soc/dport_reg.h b/components/soc/esp32h2/include/soc/dport_reg.h new file mode 100644 index 0000000000..1fcf518d3d --- /dev/null +++ b/components/soc/esp32h2/include/soc/dport_reg.h @@ -0,0 +1,23 @@ +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef _SOC_DPORT_REG_H_ +#define _SOC_DPORT_REG_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "soc.h" + +#ifndef __ASSEMBLER__ +#include "dport_access.h" +#endif + +#ifdef __cplusplus +} +#endif + +#endif /*_SOC_DPORT_REG_H_ */ diff --git a/components/soc/esp32s2/include/soc/dport_access.h b/components/soc/esp32s2/include/soc/dport_access.h index d6d9bfffb6..93a3bdfbf1 100644 --- a/components/soc/esp32s2/include/soc/dport_access.h +++ b/components/soc/esp32s2/include/soc/dport_access.h @@ -1,29 +1,31 @@ -// Copyright 2010-2017 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _DPORT_ACCESS_H_ #define _DPORT_ACCESS_H_ #include -#include "esp32s2/dport_access.h" - #ifdef __cplusplus extern "C" { #endif -// ESP32C is single core and does not have DPORT bug, so these macros are all same as the non-DPORT versions +// ESP32S2 is single core and does not have DPORT bug, so these macros are all same as the non-DPORT versions + +#define DPORT_INTERRUPT_DISABLE() +#define DPORT_INTERRUPT_RESTORE() + +/** + * @brief Read a sequence of DPORT registers to the buffer. + * + * @param[out] buff_out Contains the read data. + * @param[in] address Initial address for reading registers. + * @param[in] num_words The number of words. + */ +void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words); // _DPORT_REG_WRITE & DPORT_REG_WRITE are equivalent. #define _DPORT_REG_READ(_r) (*(volatile uint32_t *)(_r)) diff --git a/components/soc/esp32s3/include/soc/dport_access.h b/components/soc/esp32s3/include/soc/dport_access.h index 1223fb8b3a..862d4d0e0a 100644 --- a/components/soc/esp32s3/include/soc/dport_access.h +++ b/components/soc/esp32s3/include/soc/dport_access.h @@ -1,29 +1,31 @@ -// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #include -#include "esp32s3/dport_access.h" - #ifdef __cplusplus extern "C" { #endif // ESP32S3 does not have DPORT bus, so these macros are all same as the non-DPORT versions +#define DPORT_INTERRUPT_DISABLE() +#define DPORT_INTERRUPT_RESTORE() + +/** + * @brief Read a sequence of DPORT registers to the buffer. + * + * @param[out] buff_out Contains the read data. + * @param[in] address Initial address for reading registers. + * @param[in] num_words The number of words. + */ +void esp_dport_access_read_buffer(uint32_t *buff_out, uint32_t address, uint32_t num_words); + // _DPORT_REG_WRITE & DPORT_REG_WRITE are equivalent. #define _DPORT_REG_READ(_r) (*(volatile uint32_t *)(_r)) #define _DPORT_REG_WRITE(_r, _v) (*(volatile uint32_t *)(_r)) = (_v) diff --git a/components/soc/include/soc/hwcrypto_periph.h b/components/soc/include/soc/hwcrypto_periph.h index 3c517879b1..f33ede4318 100644 --- a/components/soc/include/soc/hwcrypto_periph.h +++ b/components/soc/include/soc/hwcrypto_periph.h @@ -1,16 +1,8 @@ -// Copyright 2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once @@ -19,7 +11,6 @@ #if CONFIG_IDF_TARGET_ESP32 /* included here for ESP-IDF v4.x compatibility */ #include "soc/dport_reg.h" -#include "soc/dport_access.h" #endif #include "soc/hwcrypto_reg.h" diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt index f55137a5e0..01d5f74b45 100644 --- a/tools/ci/check_copyright_ignore.txt +++ b/tools/ci/check_copyright_ignore.txt @@ -532,7 +532,6 @@ components/esp_rom/esp32s3/ld/esp32s3.rom.version.ld components/esp_rom/host_test/rom_test/main/rom_test.cpp components/esp_rom/include/esp32/rom/aes.h components/esp_rom/include/esp32/rom/bigint.h -components/esp_rom/include/esp32/rom/cache.h components/esp_rom/include/esp32/rom/crc.h components/esp_rom/include/esp32/rom/efuse.h components/esp_rom/include/esp32/rom/libc_stubs.h @@ -781,12 +780,10 @@ components/hal/esp32/gpio_hal_workaround.c components/hal/esp32/include/hal/aes_ll.h components/hal/esp32/include/hal/can_hal.h components/hal/esp32/include/hal/can_types.h -components/hal/esp32/include/hal/clk_gate_ll.h components/hal/esp32/include/hal/interrupt_controller_ll.h components/hal/esp32/include/hal/mpu_ll.h components/hal/esp32/include/hal/rtc_io_ll.h components/hal/esp32/include/hal/rwdt_ll.h -components/hal/esp32/include/hal/sha_ll.h components/hal/esp32/include/hal/sigmadelta_ll.h components/hal/esp32/include/hal/soc_ll.h components/hal/esp32/include/hal/spi_flash_encrypted_ll.h @@ -834,7 +831,6 @@ components/hal/esp32s2/include/hal/dac_hal.h components/hal/esp32s2/include/hal/dedic_gpio_ll.h components/hal/esp32s2/include/hal/i2c_ll.h components/hal/esp32s2/include/hal/interrupt_controller_ll.h -components/hal/esp32s2/include/hal/memprot_ll.h components/hal/esp32s2/include/hal/memprot_peri_ll.h components/hal/esp32s2/include/hal/mpu_ll.h components/hal/esp32s2/include/hal/rtc_io_ll.h @@ -1173,7 +1169,6 @@ components/soc/esp32/include/soc/can_periph.h components/soc/esp32/include/soc/can_struct.h components/soc/esp32/include/soc/clkout_channel.h components/soc/esp32/include/soc/dac_channel.h -components/soc/esp32/include/soc/dport_access.h components/soc/esp32/include/soc/dport_reg.h components/soc/esp32/include/soc/emac_dma_struct.h components/soc/esp32/include/soc/emac_ext_struct.h @@ -1247,7 +1242,6 @@ components/soc/esp32c3/include/soc/assist_debug_reg.h components/soc/esp32c3/include/soc/bb_reg.h components/soc/esp32c3/include/soc/boot_mode.h components/soc/esp32c3/include/soc/clkout_channel.h -components/soc/esp32c3/include/soc/dport_access.h components/soc/esp32c3/include/soc/extmem_reg.h components/soc/esp32c3/include/soc/fe_reg.h components/soc/esp32c3/include/soc/gpio_pins.h @@ -1355,7 +1349,6 @@ components/soc/esp32s2/include/soc/crypto_dma_reg.h components/soc/esp32s2/include/soc/dac_channel.h components/soc/esp32s2/include/soc/dedic_gpio_reg.h components/soc/esp32s2/include/soc/dedic_gpio_struct.h -components/soc/esp32s2/include/soc/dport_access.h components/soc/esp32s2/include/soc/extmem_reg.h components/soc/esp32s2/include/soc/fe_reg.h components/soc/esp32s2/include/soc/gpio_pins.h @@ -1434,7 +1427,6 @@ components/soc/esp32s3/include/soc/brownout_caps.h components/soc/esp32s3/include/soc/clkout_channel.h components/soc/esp32s3/include/soc/cpu.h components/soc/esp32s3/include/soc/cpu_caps.h -components/soc/esp32s3/include/soc/dport_access.h components/soc/esp32s3/include/soc/extmem_reg.h components/soc/esp32s3/include/soc/extmem_struct.h components/soc/esp32s3/include/soc/fe_reg.h @@ -1524,7 +1516,6 @@ components/soc/include/soc/dac_periph.h components/soc/include/soc/dedic_gpio_periph.h components/soc/include/soc/emac_periph.h components/soc/include/soc/gpio_periph.h -components/soc/include/soc/hwcrypto_periph.h components/soc/include/soc/i2c_periph.h components/soc/include/soc/interrupts.h components/soc/include/soc/ledc_periph.h