refactor(i2c): Make i2c driver as a seperate component

This commit is contained in:
Cao Sen Miao 2023-12-12 16:46:27 +08:00
parent 02cc74a676
commit aa10770323
42 changed files with 111 additions and 93 deletions

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@ -47,15 +47,7 @@ endif()
# I2C related source files
if(CONFIG_SOC_I2C_SUPPORTED)
list(APPEND srcs "i2c/i2c.c"
"i2c/i2c_master.c"
"i2c/i2c_common.c"
)
if(CONFIG_SOC_I2C_SUPPORT_SLAVE)
list(APPEND srcs "i2c/i2c_slave.c")
endif()
list(APPEND ldfragments "i2c/linker.lf")
list(APPEND srcs "i2c/i2c.c")
endif()
# I2S related source files
@ -142,7 +134,7 @@ else()
# have a public dependency on other "esp_driver_foo" components
esp_driver_gpio esp_driver_pcnt esp_driver_gptimer esp_driver_spi esp_driver_mcpwm
esp_driver_ana_cmpr esp_driver_i2s esp_driver_sdmmc esp_driver_sdspi esp_driver_sdio
esp_driver_dac esp_driver_rmt esp_driver_tsens esp_driver_sdm
esp_driver_dac esp_driver_rmt esp_driver_tsens esp_driver_sdm esp_driver_i2c
LDFRAGMENTS ${ldfragments}
)
endif()

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@ -105,24 +105,4 @@ menu "Driver Configurations"
orsource "./ledc/Kconfig.ledc"
menu "I2C Configuration"
config I2C_ISR_IRAM_SAFE
bool "I2C ISR IRAM-Safe"
default n
help
Ensure the I2C interrupt is IRAM-Safe by allowing the interrupt handler to be
executable when the cache is disabled (e.g. SPI Flash write).
note: This cannot be used in the I2C legacy driver.
config I2C_ENABLE_DEBUG_LOG
bool "Enable I2C debug log"
default n
help
Wether to enable the debug log message for I2C driver.
Note that this option only controls the I2C driver log, will not affect other drivers.
note: This cannot be used in the I2C legacy driver.
endmenu # I2C Configurations
endmenu # Driver configurations

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@ -6,10 +6,6 @@ components/driver/test_apps/dac_test_apps/legacy_dac_driver:
depends_components:
- esp_adc
components/driver/test_apps/i2c_test_apps:
disable:
- if: SOC_I2C_SUPPORTED != 1 # TODO: IDF-8070
components/driver/test_apps/i2s_test_apps/legacy_i2s_adc_dac:
disable:
- if: SOC_I2S_SUPPORTS_ADC_DAC != 1
@ -31,10 +27,12 @@ components/driver/test_apps/legacy_adc_driver:
- if: SOC_ADC_SUPPORTED != 1
components/driver/test_apps/legacy_i2c_driver:
disable:
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: not supported yet # TODO: IDF-8070
reason: lack of runner
depends_filepatterns:
- components/driver/i2c/**
components/driver/test_apps/legacy_mcpwm_driver:
disable:

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@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |

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@ -20,6 +20,7 @@
#include "hal/gpio_hal.h"
#include "hal/uart_ll.h"
#include "hal/i2c_types.h"
#include "soc/uart_periph.h"
#include "test_utils.h"
#define DATA_LENGTH 512 /*!<Data buffer length for test buffer*/
@ -682,8 +683,8 @@ static void uart_aut_baud_det_init(int rxd_io_num)
{
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[rxd_io_num], PIN_FUNC_GPIO);
gpio_set_direction(rxd_io_num, GPIO_MODE_INPUT_OUTPUT);
esp_rom_gpio_connect_out_signal(rxd_io_num, I2CEXT0_SCL_OUT_IDX, 0, 0);
esp_rom_gpio_connect_in_signal(rxd_io_num, U1RXD_IN_IDX, 0);
esp_rom_gpio_connect_out_signal(rxd_io_num, i2c_periph_signal[0].scl_out_sig, 0, 0);
esp_rom_gpio_connect_in_signal(rxd_io_num, UART_PERIPH_SIGNAL(1, SOC_UART_RX_PIN_IDX), 0);
periph_module_enable(PERIPH_UART1_MODULE);
/* Reset all the bits */
uart_ll_disable_intr_mask(&UART1, ~0);

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@ -0,0 +1,20 @@
set(srcs)
set(include "include")
# I2C related source files
if(CONFIG_SOC_I2C_SUPPORTED)
list(APPEND srcs
"i2c_master.c"
"i2c_common.c"
)
if(CONFIG_SOC_I2C_SUPPORT_SLAVE)
list(APPEND srcs "i2c_slave.c")
endif()
endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${include}
PRIV_REQUIRES esp_driver_gpio esp_pm esp_ringbuf
LDFRAGMENTS "linker.lf"
)

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@ -0,0 +1,20 @@
menu "ESP-Driver:I2C Configurations"
depends on SOC_I2C_SUPPORTED
config I2C_ISR_IRAM_SAFE
bool "I2C ISR IRAM-Safe"
default n
help
Ensure the I2C interrupt is IRAM-Safe by allowing the interrupt handler to be
executable when the cache is disabled (e.g. SPI Flash write).
note: This cannot be used in the I2C legacy driver.
config I2C_ENABLE_DEBUG_LOG
bool "Enable I2C debug log"
default n
help
Wether to enable the debug log message for I2C driver.
Note that this option only controls the I2C driver log, will not affect other drivers.
note: This cannot be used in the I2C legacy driver.
endmenu # I2C Configurations

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@ -218,7 +218,6 @@ esp_err_t i2c_select_periph_clock(i2c_bus_handle_t handle, i2c_clock_source_t cl
}
#endif // CONFIG_PM_ENABLE
ESP_LOGD(TAG, "bus clock source frequency: %"PRIu32"hz", periph_src_clk_hz);
return ret;
}
@ -243,7 +242,6 @@ esp_err_t i2c_common_set_pins(i2c_bus_handle_t handle)
esp_rom_gpio_connect_out_signal(handle->sda_num, i2c_periph_signal[port_id].sda_out_sig, 0, 0);
esp_rom_gpio_connect_in_signal(handle->sda_num, i2c_periph_signal[port_id].sda_in_sig, 0);
// SCL pin configurations
gpio_config_t scl_conf = {
.intr_type = GPIO_INTR_DISABLE,

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@ -444,7 +444,7 @@ static void s_i2c_send_command_async(i2c_master_bus_handle_t i2c_master, BaseTyp
i2c_master->sent_all = true;
return;
}
while(i2c_ll_is_bus_busy(hal->dev)){}
while (i2c_ll_is_bus_busy(hal->dev)) {}
while (i2c_master->i2c_trans.cmd_count && !needs_start) {
i2c_master->in_progress = true;
@ -514,13 +514,12 @@ static esp_err_t s_i2c_transaction_start(i2c_master_dev_handle_t i2c_dev, int xf
return ret;
}
///////////////////////////////I2C DRIVERS//////////////////////////////////////////////////////////////
IRAM_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_master)
{
i2c_hal_context_t *hal = &i2c_master->base->hal;
while(i2c_ll_is_bus_busy(hal->dev)){}
while (i2c_ll_is_bus_busy(hal->dev)) {}
if (i2c_master->status == I2C_STATUS_READ) {
i2c_operation_t *i2c_operation = &i2c_master->i2c_trans.ops[i2c_master->trans_idx];
portENTER_CRITICAL_ISR(&i2c_master->base->spinlock);
@ -656,7 +655,7 @@ static esp_err_t i2c_master_bus_destroy(i2c_master_bus_handle_t bus_handle)
{
ESP_RETURN_ON_FALSE(bus_handle, ESP_ERR_INVALID_ARG, TAG, "no memory for i2c master bus");
i2c_master_bus_handle_t i2c_master = bus_handle;
if(i2c_release_bus_handle(i2c_master->base) == ESP_OK) {
if (i2c_release_bus_handle(i2c_master->base) == ESP_OK) {
if (i2c_master) {
if (i2c_master->bus_lock_mux) {
vSemaphoreDeleteWithCaps(i2c_master->bus_lock_mux);
@ -717,7 +716,7 @@ static esp_err_t s_i2c_asynchronous_transaction(i2c_master_dev_handle_t i2c_dev,
i2c_dev->master_bus->queue_trans = false;
ESP_RETURN_ON_ERROR(s_i2c_transaction_start(i2c_dev, timeout_ms), TAG, "I2C transaction failed");
} else {
i2c_dev->master_bus->i2c_anyc_ops[i2c_dev->master_bus->index]=(i2c_operation_t(*))heap_caps_calloc(1, sizeof(i2c_operation_t) * 6, I2C_MEM_ALLOC_CAPS);
i2c_dev->master_bus->i2c_anyc_ops[i2c_dev->master_bus->index] = (i2c_operation_t(*))heap_caps_calloc(1, sizeof(i2c_operation_t) * 6, I2C_MEM_ALLOC_CAPS);
memcpy(i2c_dev->master_bus->i2c_anyc_ops[i2c_dev->master_bus->index], i2c_ops, sizeof(i2c_operation_t) * ops_dim);
i2c_transaction_t i2c_queue_pre;
if (i2c_dev->master_bus->num_trans_inflight < i2c_dev->master_bus->queue_size) {
@ -876,7 +875,7 @@ esp_err_t i2c_master_bus_add_device(i2c_master_bus_handle_t bus_handle, const i2
ESP_RETURN_ON_FALSE((bus_handle != NULL), ESP_ERR_INVALID_ARG, TAG, "this bus is not initialized, please call `i2c_new_master_bus`");
ESP_RETURN_ON_FALSE(dev_config, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
ESP_RETURN_ON_FALSE(dev_config->scl_speed_hz > 0, ESP_ERR_INVALID_ARG, TAG, "invalid scl frequency");
if(bus_handle->base->bus_mode != I2C_BUS_MODE_MASTER) {
if (bus_handle->base->bus_mode != I2C_BUS_MODE_MASTER) {
ESP_LOGE(TAG, "This is not master bus!");
return ESP_ERR_INVALID_ARG;
}
@ -945,7 +944,6 @@ esp_err_t i2c_master_bus_reset(i2c_master_bus_handle_t bus_handle)
return ESP_OK;
}
esp_err_t i2c_master_transmit(i2c_master_dev_handle_t i2c_dev, const uint8_t *write_buffer, size_t write_size, int xfer_timeout_ms)
{
ESP_RETURN_ON_FALSE(i2c_dev != NULL, ESP_ERR_INVALID_ARG, TAG, "i2c handle not initialized");
@ -959,7 +957,7 @@ esp_err_t i2c_master_transmit(i2c_master_dev_handle_t i2c_dev, const uint8_t *wr
};
ESP_RETURN_ON_ERROR(s_i2c_synchronous_transaction(i2c_dev, i2c_ops, DIM(i2c_ops), xfer_timeout_ms), TAG, "I2C transaction failed");
} else {
i2c_dev->master_bus->anyc_write_buffer[i2c_dev->master_bus->index] = (uint8_t*)heap_caps_calloc(1, sizeof(uint8_t)*write_size, I2C_MEM_ALLOC_CAPS);
i2c_dev->master_bus->anyc_write_buffer[i2c_dev->master_bus->index] = (uint8_t*)heap_caps_calloc(1, sizeof(uint8_t) * write_size, I2C_MEM_ALLOC_CAPS);
memcpy(i2c_dev->master_bus->anyc_write_buffer[i2c_dev->master_bus->index], write_buffer, write_size);
i2c_operation_t i2c_ops[] = {
{.hw_cmd = I2C_TRANS_START_COMMAND},
@ -988,7 +986,7 @@ esp_err_t i2c_master_transmit_receive(i2c_master_dev_handle_t i2c_dev, const uin
};
ESP_RETURN_ON_ERROR(s_i2c_synchronous_transaction(i2c_dev, i2c_ops, DIM(i2c_ops), xfer_timeout_ms), TAG, "I2C transaction failed");
} else {
i2c_dev->master_bus->anyc_write_buffer[i2c_dev->master_bus->index] = (uint8_t*)heap_caps_calloc(1, sizeof(uint8_t)*write_size, I2C_MEM_ALLOC_CAPS);
i2c_dev->master_bus->anyc_write_buffer[i2c_dev->master_bus->index] = (uint8_t*)heap_caps_calloc(1, sizeof(uint8_t) * write_size, I2C_MEM_ALLOC_CAPS);
memcpy(i2c_dev->master_bus->anyc_write_buffer[i2c_dev->master_bus->index], write_buffer, write_size);
i2c_operation_t i2c_ops[] = {

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@ -27,7 +27,7 @@ typedef struct {
int intr_priority; /*!< I2C interrupt priority, if set to 0, driver will select the default priority (1,2,3). */
size_t trans_queue_depth; /*!< Depth of internal transfer queue, increase this value can support more transfers pending in the background, only valid in asynchronous transaction. (Typically max_device_num * per_transaction)*/
struct {
uint32_t enable_internal_pullup:1; /*!< Enable internal pullups. Note: This is not strong enough to pullup buses under high-speed frequency. Recommend proper external pull-up if possible */
uint32_t enable_internal_pullup: 1; /*!< Enable internal pullups. Note: This is not strong enough to pullup buses under high-speed frequency. Recommend proper external pull-up if possible */
} flags; /*!< I2C master config flags */
} i2c_master_bus_config_t;

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@ -29,16 +29,16 @@ typedef struct {
int intr_priority; /*!< I2C interrupt priority, if set to 0, driver will select the default priority (1,2,3). */
struct {
#if SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE
uint32_t stretch_en:1; /*!< Enable slave stretch */
uint32_t stretch_en: 1; /*!< Enable slave stretch */
#endif
#if SOC_I2C_SLAVE_SUPPORT_BROADCAST
uint32_t broadcast_en:1; /*!< I2C slave enable broadcast */
uint32_t broadcast_en: 1; /*!< I2C slave enable broadcast */
#endif
#if SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS
uint32_t access_ram_en:1; /*!< Can get access to I2C RAM directly */
uint32_t access_ram_en: 1; /*!< Can get access to I2C RAM directly */
#endif
#if SOC_I2C_SLAVE_SUPPORT_SLAVE_UNMATCH
uint32_t slave_unmatch_en:1; /*!< Can trigger unmatch interrupt when slave address does not match what master sends*/
uint32_t slave_unmatch_en: 1; /*!< Can trigger unmatch interrupt when slave address does not match what master sends*/
#endif
} flags; /*!< I2C slave config flags */
} i2c_slave_config_t;

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@ -34,7 +34,6 @@ typedef enum {
I2C_STATUS_TIMEOUT, /*!< I2C bus status error, and operation timeout */
} i2c_master_status_t;
typedef enum {
I2C_EVENT_ALIVE, /*!< i2c bus in alive status.*/
I2C_EVENT_DONE, /*!< i2c bus transaction done */

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@ -1,8 +1,14 @@
[mapping:i2c_driver]
archive: libdriver.a
archive: libesp_driver_i2c.a
entries:
if I2C_ISR_IRAM_SAFE = y:
i2c_master: s_i2c_send_command_async (noflash)
i2c_master: s_i2c_write_command (noflash)
i2c_master: s_i2c_read_command (noflash)
i2c_master: s_i2c_start_end_command (noflash)
[mapping:i2c_hal]
archive: libhal.a
entries:
if I2C_ISR_IRAM_SAFE = y:
i2c_hal: i2c_hal_master_trans_start (noflash)

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@ -0,0 +1,11 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/esp_driver_i2c/test_apps/i2c_test_apps:
disable:
- if: SOC_I2C_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: lack of runners
depends_components:
- esp_driver_i2c

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@ -14,7 +14,7 @@ project(i2c_test)
if(CONFIG_COMPILER_DUMP_RTL_FILES)
add_custom_target(check_test_app_sections ALL
COMMAND ${PYTHON} $ENV{IDF_PATH}/tools/ci/check_callgraph.py
--rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/driver/,${CMAKE_BINARY_DIR}/esp-idf/hal/
--rtl-dirs ${CMAKE_BINARY_DIR}/esp-idf/esp_driver_i2c/,${CMAKE_BINARY_DIR}/esp-idf/hal/
--elf-file ${CMAKE_BINARY_DIR}/i2c_test.elf
find-refs
--from-sections=.iram0.text

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@ -4,7 +4,6 @@
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
#include <stdio.h>
#include <string.h>
#include "sdkconfig.h"
@ -119,7 +118,6 @@ static void i2c_slave_read_test_10bit(void)
TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test 10 bit", "[i2c][test_env=generic_multi_device][timeout=150]", i2c_master_write_test_10bit, i2c_slave_read_test_10bit);
static void master_read_slave_test_10bit(void)
{
uint8_t data_rd[DATA_LENGTH] = {0};
@ -153,7 +151,7 @@ static void master_read_slave_test_10bit(void)
vTaskDelay(100 / portTICK_PERIOD_MS);
for (int i = 0; i < DATA_LENGTH; i++) {
printf("%d\n", data_rd[i]);
TEST_ASSERT(data_rd[i]==i);
TEST_ASSERT(data_rd[i] == i);
}
unity_send_signal("ready to delete 10bit");
@ -192,5 +190,4 @@ static void slave_write_buffer_test_10bit(void)
TEST_ESP_OK(i2c_del_slave_device(slave_handle));
}
TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test 10 bit", "[i2c][test_env=generic_multi_device][timeout=150]", master_read_slave_test_10bit, slave_write_buffer_test_10bit);

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@ -4,7 +4,6 @@
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
#include <stdio.h>
#include <string.h>
#include "sdkconfig.h"

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@ -101,21 +101,21 @@ TEST_CASE("I2C device add & remove check", "[i2c]")
TEST_ESP_OK(i2c_new_master_bus(&i2c_mst_config_1, &bus_handle));
i2c_device_config_t dev_cfg_1 = {
.scl_speed_hz = 100*1000,
.scl_speed_hz = 100 * 1000,
.device_address = 0x10,
};
i2c_master_dev_handle_t dev_1;
i2c_master_bus_add_device(bus_handle, &dev_cfg_1, &dev_1);
i2c_device_config_t dev_cfg_2 = {
.scl_speed_hz = 100*1000,
.scl_speed_hz = 100 * 1000,
.device_address = 0x20,
};
i2c_master_dev_handle_t dev_2;
i2c_master_bus_add_device(bus_handle, &dev_cfg_2, &dev_2);
i2c_device_config_t dev_cfg_3 = {
.scl_speed_hz = 100*1000,
.scl_speed_hz = 100 * 1000,
.device_address = 0x30,
};
i2c_master_dev_handle_t dev_3;

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@ -4,7 +4,6 @@
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
#include <stdio.h>
#include <string.h>
#include "sdkconfig.h"
@ -32,7 +31,7 @@ void disp_buf(uint8_t *buf, int len)
int i;
for (i = 0; i < len; i++) {
printf("%02x ", buf[i]);
if (( i + 1 ) % 16 == 0) {
if ((i + 1) % 16 == 0) {
printf("\n");
}
}
@ -132,7 +131,6 @@ static void i2c_slave_read_test(void)
TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test", "[i2c][test_env=generic_multi_device][timeout=150]", i2c_master_write_test, i2c_slave_read_test);
static void master_read_slave_test(void)
{
uint8_t data_rd[DATA_LENGTH] = {0};
@ -166,7 +164,7 @@ static void master_read_slave_test(void)
vTaskDelay(100 / portTICK_PERIOD_MS);
for (int i = 0; i < DATA_LENGTH; i++) {
printf("%d\n", data_rd[i]);
TEST_ASSERT(data_rd[i]==i);
TEST_ASSERT(data_rd[i] == i);
}
unity_send_signal("ready to delete master read test");
@ -205,7 +203,6 @@ static void slave_write_buffer_test(void)
TEST_ESP_OK(i2c_del_slave_device(slave_handle));
}
TEST_CASE_MULTIPLE_DEVICES("I2C master read slave test", "[i2c][test_env=generic_multi_device][timeout=150]", master_read_slave_test, slave_write_buffer_test);
static void i2c_master_write_read_test(void)
@ -313,7 +310,6 @@ static void i2c_slave_read_write_test(void)
TEST_CASE_MULTIPLE_DEVICES("I2C read and write test", "[i2c][test_env=generic_multi_device][timeout=150]", i2c_master_write_read_test, i2c_slave_read_write_test);
static void i2c_master_repeat_write(void)
{
uint8_t data_wr[DATA_LENGTH] = {0};

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@ -4,7 +4,6 @@
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
#include <stdio.h>
#include <string.h>
#include "sdkconfig.h"
@ -98,7 +97,6 @@ static void i2c_slave_read_from_ram_test(void)
i2c_slave_dev_handle_t slave_handle;
TEST_ESP_OK(i2c_new_slave_device(&i2c_slv_config, &slave_handle));
unity_send_signal("i2c slave init finish");
unity_wait_for_signal("master write");
@ -115,7 +113,6 @@ static void i2c_slave_read_from_ram_test(void)
TEST_CASE_MULTIPLE_DEVICES("I2C master write slave test - slave directly read from ram", "[i2c][test_env=generic_multi_device][timeout=150]", i2c_master_write_to_ram_test, i2c_slave_read_from_ram_test);
static void master_read_slave_from_ram_test(void)
{
uint8_t data_rd[DATA_LENGTH_RAM] = {0};
@ -151,7 +148,7 @@ static void master_read_slave_from_ram_test(void)
vTaskDelay(100 / portTICK_PERIOD_MS);
for (int i = 0; i < DATA_LENGTH_RAM; i++) {
printf("%d\n", data_rd[i]);
TEST_ASSERT(data_rd[i]==i);
TEST_ASSERT(data_rd[i] == i);
}
unity_send_signal("ready to delete ram test");
@ -191,7 +188,6 @@ static void slave_write_buffer_to_ram_test(void)
TEST_ESP_OK(i2c_del_slave_device(slave_handle));
}
TEST_CASE_MULTIPLE_DEVICES("I2C master read slave ram test", "[i2c][test_env=generic_multi_device][timeout=150]", master_read_slave_from_ram_test, slave_write_buffer_to_ram_test);
TEST_CASE("I2C slave init as ram but read by fifo", "[i2c]")

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@ -28,5 +28,5 @@ endif()
idf_component_register(SRCS ${srcs}
INCLUDE_DIRS ${includes}
PRIV_REQUIRES ${priv_requires}
REQUIRES driver esp_driver_gpio esp_driver_spi
REQUIRES driver esp_driver_gpio esp_driver_spi esp_driver_i2c
LDFRAGMENTS linker.lf)

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@ -5,8 +5,7 @@ components/esp_lcd/test_apps/i2c_lcd:
- if: SOC_I2C_SUPPORTED != 1
depends_components:
- esp_lcd
depends_filepatterns:
- components/driver/i2c/**/*
- esp_driver_i2c
disable_test:
- if: IDF_TARGET not in ["esp32c3"]
temporary: true

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@ -75,3 +75,9 @@ void i2c_hal_set_timing_config(i2c_hal_context_t *hal, i2c_hal_timing_config_t *
i2c_ll_set_sda_timing(hal->dev, timing_config->sda_sample, timing_config->sda_hold);
i2c_ll_set_tout(hal->dev, timing_config->timeout);
}
void i2c_hal_master_trans_start(i2c_hal_context_t *hal)
{
i2c_ll_update(hal->dev);
i2c_ll_master_trans_start(hal->dev);
}

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@ -1,17 +1,11 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/i2c_hal.h"
void i2c_hal_master_trans_start(i2c_hal_context_t *hal)
{
i2c_ll_update(hal->dev);
i2c_ll_master_trans_start(hal->dev);
}
//////////////////////////////////////////Deprecated Functions//////////////////////////////////////////////////////////
/////////////////////////////The following functions are only used by the legacy driver/////////////////////////////////
/////////////////////////////They might be removed in the next major release (ESP-IDF 6.0)//////////////////////////////

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@ -48,7 +48,7 @@
#define SOC_SDM_SUPPORTED 1
#define SOC_GPSPI_SUPPORTED 1
#define SOC_LEDC_SUPPORTED 1
#define SOC_I2C_SUPPORTED 1 //TODO: IDF-6507, TODO: IDF-7491
#define SOC_I2C_SUPPORTED 1
#define SOC_SYSTIMER_SUPPORTED 1
// #define SOC_AES_SUPPORTED 1 //TODO: IDF-6519
#define SOC_MPI_SUPPORTED 1

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@ -73,9 +73,6 @@ INPUT = \
$(PROJECT_PATH)/components/bt/host/bluedroid/api/include/api/esp_spp_api.h \
$(PROJECT_PATH)/components/bt/host/nimble/esp-hci/include/esp_nimble_hci.h \
$(PROJECT_PATH)/components/console/esp_console.h \
$(PROJECT_PATH)/components/driver/i2c/include/driver/i2c_master.h \
$(PROJECT_PATH)/components/driver/i2c/include/driver/i2c_slave.h \
$(PROJECT_PATH)/components/driver/i2c/include/driver/i2c_types.h \
$(PROJECT_PATH)/components/driver/ledc/include/driver/ledc.h \
$(PROJECT_PATH)/components/driver/parlio/include/driver/parlio_tx.h \
$(PROJECT_PATH)/components/driver/parlio/include/driver/parlio_types.h \
@ -121,6 +118,9 @@ INPUT = \
$(PROJECT_PATH)/components/esp_driver_mcpwm/include/driver/mcpwm_sync.h \
$(PROJECT_PATH)/components/esp_driver_mcpwm/include/driver/mcpwm_timer.h \
$(PROJECT_PATH)/components/esp_driver_mcpwm/include/driver/mcpwm_types.h \
$(PROJECT_PATH)/components/esp_driver_i2c/include/driver/i2c_master.h \
$(PROJECT_PATH)/components/esp_driver_i2c/include/driver/i2c_slave.h \
$(PROJECT_PATH)/components/esp_driver_i2c/include/driver/i2c_types.h \
$(PROJECT_PATH)/components/esp_driver_i2s/include/driver/i2s_common.h \
$(PROJECT_PATH)/components/esp_driver_i2s/include/driver/i2s_pdm.h \
$(PROJECT_PATH)/components/esp_driver_i2s/include/driver/i2s_std.h \

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@ -544,5 +544,5 @@ API Reference
.. include-build-file:: inc/i2c_slave.inc
.. include-build-file:: inc/components/driver/i2c/include/driver/i2c_types.inc
.. include-build-file:: inc/components/esp_driver_i2c/include/driver/i2c_types.inc
.. include-build-file:: inc/components/hal/include/hal/i2c_types.inc

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@ -19,6 +19,7 @@ In order to control the dependence of other components on drivers at a smaller g
- `esp_driver_rmt` - Driver for RMT
- `esp_driver_tsens` - Driver for Temperature Sensor
- `esp_driver_sdm` - Driver for Sigma-Delta Modulator
- `esp_driver_i2c` - Driver for I2C
For compatibility, the original `driver`` component is still treated as an all-in-one component by registering these `esp_driver_xyz`` components as its public dependencies. In other words, you do not need to modify the CMake file of an existing project, but you now have a way to specify the specific peripheral driver that your project depends on.

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@ -19,6 +19,7 @@
- `esp_driver_rmt` - RMT 驱动
- `esp_driver_tsens` - 温度传感器驱动
- `esp_driver_sdm` - Sigma-Delta 调制器驱动
- `esp_driver_i2c` - I2C 驱动
为了兼容性,原来的 `driver` 组件仍然存在,并作为一个 “all-in-one" 的组件,将以上这些 `esp_driver_xyz` 组件注册成自己的公共依赖。换句话说,你无需修改既有项目的 CMake 文件,但是你现在多了一个途径去指定你项目依赖的具体的外设驱动。

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@ -38,6 +38,12 @@ examples/peripherals/gpio/matrix_keyboard:
enable:
- if: IDF_TARGET == "esp32s2"
examples/peripherals/i2c/i2c_eeprom:
disable:
- if: SOC_I2C_SUPPORTED != 1
depends_components:
- esp_driver_i2c
examples/peripherals/i2c/i2c_self_test:
disable:
- if: SOC_I2C_SUPPORT_SLAVE != 1