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xtensa: fix swapped breakpoint and watchpoint numbers

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This commit is contained in:
Ivan Grokhotkov 2022-07-25 09:43:10 +02:00
parent f19dfd6afb
commit a97686f607
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GPG Key ID: 1E050E141B280628
1 changed files with 4 additions and 4 deletions
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8
components/xtensa/include/xt_utils.h
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@ -116,7 +116,7 @@ FORCE_INLINE_ATTR uint32_t xt_utils_intr_get_enabled_mask(void)
FORCE_INLINE_ATTR void xt_utils_set_breakpoint(int bp_num, uint32_t bp_addr) FORCE_INLINE_ATTR void xt_utils_set_breakpoint(int bp_num, uint32_t bp_addr)
{ {
//Set the breakpoint's address //Set the breakpoint's address
if (bp_num == 0) { if (bp_num == 1) {
WSR(IBREAKA_1, bp_addr); WSR(IBREAKA_1, bp_addr);
} else { } else {
WSR(IBREAKA_0, bp_addr); WSR(IBREAKA_0, bp_addr);
@ -137,7 +137,7 @@ FORCE_INLINE_ATTR void xt_utils_clear_breakpoint(int bp_num)
WSR(IBREAKENABLE, bp_en); WSR(IBREAKENABLE, bp_en);
// Zero the break address register // Zero the break address register
uint32_t bp_addr = 0; uint32_t bp_addr = 0;
if (bp_num == 0) { if (bp_num == 1) {
WSR(IBREAKA_1, bp_addr); WSR(IBREAKA_1, bp_addr);
} else { } else {
WSR(IBREAKA_0, bp_addr); WSR(IBREAKA_0, bp_addr);
@ -161,7 +161,7 @@ FORCE_INLINE_ATTR void xt_utils_set_watchpoint(int wp_num,
dbreakc_reg |= BIT(31); dbreakc_reg |= BIT(31);
} }
// Enable break address and break control register // Enable break address and break control register
if (wp_num == 0) { if (wp_num == 1) {
WSR(DBREAKA_1, (uint32_t) wp_addr); WSR(DBREAKA_1, (uint32_t) wp_addr);
WSR(DBREAKC_1, dbreakc_reg); WSR(DBREAKC_1, dbreakc_reg);
} else { } else {
@ -173,7 +173,7 @@ FORCE_INLINE_ATTR void xt_utils_set_watchpoint(int wp_num,
FORCE_INLINE_ATTR void xt_utils_clear_watchpoint(int wp_num) FORCE_INLINE_ATTR void xt_utils_clear_watchpoint(int wp_num)
{ {
// Clear both break control and break address register // Clear both break control and break address register
if (wp_num == 0) { if (wp_num == 1) {
WSR(DBREAKC_1, 0); WSR(DBREAKC_1, 0);
WSR(DBREAKA_1, 0); WSR(DBREAKA_1, 0);
} else { } else {