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i2s: fix mclk stop issue when setting clock

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This commit is contained in:
laokaiyao 2022-01-10 13:25:26 +08:00
parent b35a66e173
commit a8ab869a84
2 changed files with 19 additions and 13 deletions
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18
components/driver/i2s.c
View File

@ -1878,6 +1878,15 @@ esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config,
#endif #endif
/* Enable module clock */ /* Enable module clock */
i2s_hal_enable_module_clock(&p_i2s[i2s_num]->hal); i2s_hal_enable_module_clock(&p_i2s[i2s_num]->hal);
#if SOC_I2S_SUPPORTS_TDM
/* Enable tx/rx submodule clock */
if (i2s_config->mode & I2S_MODE_TX) {
i2s_ll_tx_enable_clock(p_i2s[i2s_num]->hal.dev);
}
if (i2s_config->mode & I2S_MODE_RX) {
i2s_ll_rx_enable_clock(p_i2s[i2s_num]->hal.dev);
}
#endif
/* Step 5: Initialize I2S configuration and set the configurations to register */ /* Step 5: Initialize I2S configuration and set the configurations to register */
i2s_hal_config_param(&(pre_alloc_i2s_obj->hal), &pre_alloc_i2s_obj->hal_cfg); i2s_hal_config_param(&(pre_alloc_i2s_obj->hal), &pre_alloc_i2s_obj->hal_cfg);
@ -1901,6 +1910,7 @@ esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config,
/* Step 7: Set I2S clocks and start. No need to give parameters since configurations has been set in 'i2s_driver_init' */ /* Step 7: Set I2S clocks and start. No need to give parameters since configurations has been set in 'i2s_driver_init' */
ESP_GOTO_ON_ERROR(i2s_set_clk(i2s_num, 0, 0, 0), err, TAG, "I2S set clock failed"); ESP_GOTO_ON_ERROR(i2s_set_clk(i2s_num, 0, 0, 0), err, TAG, "I2S set clock failed");
return ESP_OK; return ESP_OK;
err: err:
@ -1962,6 +1972,14 @@ esp_err_t i2s_driver_uninstall(i2s_port_t i2s_num)
esp_pm_lock_delete(p_i2s[i2s_num]->pm_lock); esp_pm_lock_delete(p_i2s[i2s_num]->pm_lock);
p_i2s[i2s_num]->pm_lock = NULL; p_i2s[i2s_num]->pm_lock = NULL;
} }
#endif
#if SOC_I2S_SUPPORTS_TDM
if (p_i2s[i2s_num]->hal_cfg.mode & I2S_MODE_TX) {
i2s_ll_tx_disable_clock(p_i2s[i2s_num]->hal.dev);
}
if (p_i2s[i2s_num]->hal_cfg.mode & I2S_MODE_RX) {
i2s_ll_rx_disable_clock(p_i2s[i2s_num]->hal.dev);
}
#endif #endif
/* Disable module clock */ /* Disable module clock */
i2s_hal_disable_module_clock(&p_i2s[i2s_num]->hal); i2s_hal_disable_module_clock(&p_i2s[i2s_num]->hal);

14
components/hal/i2s_hal.c
View File

@ -1,5 +1,5 @@
/* /*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
* *
* SPDX-License-Identifier: Apache-2.0 * SPDX-License-Identifier: Apache-2.0
*/ */
@ -344,32 +344,20 @@ void i2s_hal_config_param(i2s_hal_context_t *hal, const i2s_hal_config_t *hal_cf
void i2s_hal_start_tx(i2s_hal_context_t *hal) void i2s_hal_start_tx(i2s_hal_context_t *hal)
{ {
#if SOC_I2S_SUPPORTS_TDM
i2s_ll_tx_enable_clock(hal->dev);
#endif
i2s_ll_tx_start(hal->dev); i2s_ll_tx_start(hal->dev);
} }
void i2s_hal_start_rx(i2s_hal_context_t *hal) void i2s_hal_start_rx(i2s_hal_context_t *hal)
{ {
#if SOC_I2S_SUPPORTS_TDM
i2s_ll_rx_enable_clock(hal->dev);
#endif
i2s_ll_rx_start(hal->dev); i2s_ll_rx_start(hal->dev);
} }
void i2s_hal_stop_tx(i2s_hal_context_t *hal) void i2s_hal_stop_tx(i2s_hal_context_t *hal)
{ {
i2s_ll_tx_stop(hal->dev); i2s_ll_tx_stop(hal->dev);
#if SOC_I2S_SUPPORTS_TDM
i2s_ll_tx_disable_clock(hal->dev);
#endif
} }
void i2s_hal_stop_rx(i2s_hal_context_t *hal) void i2s_hal_stop_rx(i2s_hal_context_t *hal)
{ {
i2s_ll_rx_stop(hal->dev); i2s_ll_rx_stop(hal->dev);
#if SOC_I2S_SUPPORTS_TDM
i2s_ll_rx_disable_clock(hal->dev);
#endif
} }