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Merge branch 'bugfix/mbedtls_custom_cert_ut' into 'master'
ci: Fix `custom certificate bundle` UT failure for S3 See merge request espressif/esp-idf!18574
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commit
a75548bb1a
@ -16,6 +16,7 @@
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#include "soc/system_reg.h"
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#include "soc/periph_defs.h"
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#include <sys/param.h>
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#include "esp_crypto_lock.h"
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size_t esp_mpi_hardware_words(size_t words)
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{
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@ -24,6 +25,8 @@ size_t esp_mpi_hardware_words(size_t words)
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void esp_mpi_enable_hardware_hw_op( void )
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{
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esp_crypto_mpi_lock_acquire();
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/* Enable RSA hardware */
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periph_module_enable(PERIPH_RSA_MODULE);
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@ -43,6 +46,8 @@ void esp_mpi_disable_hardware_hw_op( void )
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/* Disable RSA hardware */
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periph_module_disable(PERIPH_RSA_MODULE);
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esp_crypto_mpi_lock_release();
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}
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void esp_mpi_interrupt_enable( bool enable )
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@ -73,9 +73,6 @@ typedef enum {
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int esp_crt_verify_callback(void *buf, mbedtls_x509_crt *crt, int data, uint32_t *flags);
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
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// TODO ESP32-S3 IDF-1878
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static const char *TAG = "cert_bundle_test";
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static volatile bool exit_flag;
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@ -294,6 +291,12 @@ int client_task(const uint8_t *bundle, size_t bundle_size, esp_crt_validate_res_
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*res = (ret == 0) ? ESP_CRT_VALIDATE_OK : ESP_CRT_VALIDATE_FAIL;
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if (*res == ESP_CRT_VALIDATE_OK) {
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ESP_LOGI(TAG, "Certificate verification passed!");
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} else {
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ESP_LOGE(TAG, "Certificate verification failed!");
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}
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// Reset session before new connection
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mbedtls_ssl_close_notify(&client.ssl);
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@ -345,8 +348,6 @@ TEST_CASE("custom certificate bundle", "[mbedtls]")
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vSemaphoreDelete(signal_sem);
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}
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
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TEST_CASE("custom certificate bundle - weak hash", "[mbedtls]")
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{
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/* A weak signature hash on the trusted certificate should not stop
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@ -423,7 +423,18 @@ static void print_rsa_details(mbedtls_rsa_context *rsa)
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}
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#endif
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TEST_CASE("test performance RSA key operations", "[bignum]")
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/** NOTE:
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* For ESP32-S3, CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG is enabled
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* by default; allocating a lock of 92 bytes, which is never freed.
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*
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* MR !18574 adds the MPI crypto lock for S3 increasing the leakage by
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* 92 bytes. This caused the RSA UT to fail with a leakage more than
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* 1024 bytes.
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*
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* The allocations made by ESP32-S2 (944 bytes) and ESP32-S3 are the same,
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* except for the JTAG lock (92 + 944 > 1024).
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*/
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TEST_CASE("test performance RSA key operations", "[bignum][leaks=1088]")
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{
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for (int keysize = 2048; keysize <= SOC_RSA_MAX_BIT_LEN; keysize += 1024) {
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rsa_key_operations(keysize, true, false);
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