feat(sdm): add support for esp32c5

components/driver/deprecated/sigma_delta_legacy.c

@@ -15,6 +15,7 @@
 #include "hal/sdm_ll.h"
 #include "hal/gpio_hal.h"
 #include "esp_rom_gpio.h"
+#include "esp_private/gpio.h"
 
 static const char *TAG = "sdm(legacy)";
 
@@ -51,7 +52,7 @@ static inline esp_err_t _sigmadelta_set_pin(sigmadelta_port_t sigmadelta_port, s
 {
     SIGMADELTA_OBJ_CHECK(sigmadelta_port);
 
-    gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_num], PIN_FUNC_GPIO);
+    gpio_func_sel(gpio_num, PIN_FUNC_GPIO);
     gpio_set_direction(gpio_num, GPIO_MODE_OUTPUT);
     esp_rom_gpio_connect_out_signal(gpio_num, sigma_delta_periph_signals.channels[channel].sd_sig, 0, 0);
     return ESP_OK;

components/driver/test_apps/legacy_sigma_delta_driver/README.md

@@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |

components/driver/test_apps/legacy_sigma_delta_driver/pytest_legacy_sigma_delta.py

@@ -1,12 +1,12 @@
 # SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
 # SPDX-License-Identifier: CC0-1.0
-
 import pytest
 from pytest_embedded_idf import IdfDut
 
 
 @pytest.mark.esp32
 @pytest.mark.esp32c3
+@pytest.mark.esp32c5
 @pytest.mark.esp32c6
 @pytest.mark.esp32h2
 @pytest.mark.esp32s2

components/esp_driver_sdm/test_apps/sigma_delta/README.md

@@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |

components/esp_driver_sdm/test_apps/sigma_delta/main/test_app_main.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -31,15 +31,15 @@ void tearDown(void)
 
 void app_main(void)
 {
-    //   ____ ____ ___ ___    _____      _     _____         _
-    //  / ___|  _ \_ _/ _ \  | ____|_  _| |_  |_   _|__  ___| |_
-    // | |  _| |_) | | | | | |  _| \ \/ / __|   | |/ _ \/ __| __|
-    // | |_| |  __/| | |_| | | |___ >  <| |_    | |  __/\__ \ |_
-    //  \____|_|  |___\___/  |_____/_/\_\\__|   |_|\___||___/\__|
-    printf("  ____ ____ ___ ___    _____      _     _____         _\r\n");
-    printf(" / ___|  _ \\_ _/ _ \\  | ____|_  _| |_  |_   _|__  ___| |_\r\n");
-    printf("| |  _| |_) | | | | | |  _| \\ \\/ / __|   | |/ _ \\/ __| __|\r\n");
-    printf("| |_| |  __/| | |_| | | |___ >  <| |_    | |  __/\\__ \\ |_\r\n");
-    printf(" \\____|_|  |___\\___/  |_____/_/\\_\\\\__|   |_|\\___||___/\\__|\r\n");
+    //  ____  ____  __  __   _____         _
+    // / ___||  _ \|  \/  | |_   _|__  ___| |_
+    // \___ \| | | | |\/| |   | |/ _ \/ __| __|
+    //  ___) | |_| | |  | |   | |  __/\__ \ |_
+    // |____/|____/|_|  |_|   |_|\___||___/\__|
+    printf("  ____  ____  __  __   _____         _   \r\n");
+    printf(" / ___||  _ \\|  \\/  | |_   _|__  ___| |_ \r\n");
+    printf(" \\___ \\| | | | |\\/| |   | |/ _ \\/ __| __|\r\n");
+    printf("  ___) | |_| | |  | |   | |  __/\\__ \\ |_ \r\n");
+    printf(" |____/|____/|_|  |_|   |_|\\___||___/\\__|\r\n");
     unity_run_menu();
 }

components/esp_driver_sdm/test_apps/sigma_delta/main/test_sdm.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */

components/esp_driver_sdm/test_apps/sigma_delta/pytest_sigma_delta.py

@@ -1,6 +1,5 @@
 # SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
 # SPDX-License-Identifier: CC0-1.0
-
 import pytest
 from pytest_embedded_idf import IdfDut
 
@@ -12,6 +11,7 @@ CONFIGS = [
 
 @pytest.mark.esp32
 @pytest.mark.esp32c3
+@pytest.mark.esp32c5
 @pytest.mark.esp32c6
 @pytest.mark.esp32h2
 @pytest.mark.esp32s2

components/hal/esp32c5/include/hal/sdm_ll.h

@@ -0,0 +1,58 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#pragma once
+
+#include <stdbool.h>
+#include "hal/misc.h"
+#include "hal/assert.h"
+#include "soc/gpio_ext_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Set Sigma-delta enable
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param en Sigma-delta enable value
+ */
+static inline void sdm_ll_enable_clock(gpio_sd_dev_t *hw, bool en)
+{
+    hw->misc.sigmadelta_clk_en = en;
+}
+
+/**
+ * @brief Set Sigma-delta channel duty.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param density Sigma-delta quantized density of one channel, the value ranges from -128 to 127, recommended range is -90 ~ 90.
+ *             The waveform is more like a random one in this range.
+ */
+__attribute__((always_inline))
+static inline void sdm_ll_set_pulse_density(gpio_sd_dev_t *hw, int channel, int8_t density)
+{
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], sdn_in, (uint32_t)density);
+}
+
+/**
+ * @brief Set Sigma-delta channel's clock pre-scale value.
+ *
+ * @param hw Peripheral SIGMADELTA hardware instance address.
+ * @param channel Sigma-delta channel number
+ * @param prescale The divider of source clock, ranges from 1 to 256
+ */
+static inline void sdm_ll_set_prescale(gpio_sd_dev_t *hw, int channel, uint32_t prescale)
+{
+    HAL_ASSERT(prescale && prescale <= 256);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(hw->channel[channel], sdn_prescale, prescale - 1);
+}
+
+#ifdef __cplusplus
+}
+#endif

components/soc/esp32c5/include/soc/Kconfig.soc_caps.in

@@ -75,6 +75,10 @@ config SOC_RMT_SUPPORTED
     bool
     default y
 
+config SOC_SDM_SUPPORTED
+    bool
+    default y
+
 config SOC_GPSPI_SUPPORTED
     bool
     default y
@@ -715,6 +719,22 @@ config SOC_ECDSA_SUPPORT_EXPORT_PUBKEY
     bool
     default y
 
+config SOC_SDM_GROUPS
+    int
+    default 1
+
+config SOC_SDM_CHANNELS_PER_GROUP
+    int
+    default 4
+
+config SOC_SDM_CLK_SUPPORT_PLL_F80M
+    bool
+    default y
+
+config SOC_SDM_CLK_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_SPI_PERIPH_NUM
     int
     default 2

components/soc/esp32c5/include/soc/clk_tree_defs.h

@@ -385,7 +385,7 @@ typedef enum {
 /**
  * @brief Sigma Delta Modulator clock source
  */
-typedef enum {  // TODO: [ESP32C5] IDF-8687 (inherit from C6)
+typedef enum {
     SDM_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,         /*!< Select XTAL clock as the source clock */
     SDM_CLK_SRC_PLL_F80M = SOC_MOD_CLK_PLL_F80M, /*!< Select PLL_F80M clock as the source clock */
     SDM_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F80M,  /*!< Select PLL_F80M clock as the default clock choice */

components/soc/esp32c5/include/soc/gpio_ext_reg.h

@@ -57,7 +57,7 @@ extern "C" {
 #define GPIO_EXT_SD0_PRESCALE_S  8
 
 /** GPIO_EXT_SIGMADELTA1_REG register
- *  Duty cycle configuration register for SDM channel 0
+ *  Duty cycle configuration register for SDM channel 1
  */
 #define GPIO_EXT_SIGMADELTA1_REG (DR_REG_GPIO_EXT_BASE + 0xc)
 /** GPIO_EXT_SD1_IN : R/W; bitpos: [7:0]; default: 0;
@@ -76,7 +76,7 @@ extern "C" {
 #define GPIO_EXT_SD1_PRESCALE_S  8
 
 /** GPIO_EXT_SIGMADELTA2_REG register
- *  Duty cycle configuration register for SDM channel 0
+ *  Duty cycle configuration register for SDM channel 2
  */
 #define GPIO_EXT_SIGMADELTA2_REG (DR_REG_GPIO_EXT_BASE + 0x10)
 /** GPIO_EXT_SD2_IN : R/W; bitpos: [7:0]; default: 0;
@@ -95,7 +95,7 @@ extern "C" {
 #define GPIO_EXT_SD2_PRESCALE_S  8
 
 /** GPIO_EXT_SIGMADELTA3_REG register
- *  Duty cycle configuration register for SDM channel 0
+ *  Duty cycle configuration register for SDM channel 3
  */
 #define GPIO_EXT_SIGMADELTA3_REG (DR_REG_GPIO_EXT_BASE + 0x14)
 /** GPIO_EXT_SD3_IN : R/W; bitpos: [7:0]; default: 0;

components/soc/esp32c5/include/soc/gpio_ext_struct.h

@@ -1067,11 +1067,14 @@ typedef union {
     uint32_t val;
 } gpio_ext_version_reg_t;
 
+typedef struct gpio_sd_dev_t {
+    volatile gpio_ext_clock_gate_reg_t clock_gate;
+    volatile gpio_ext_sigmadelta_misc_reg_t misc;
+    volatile gpio_ext_sigmadeltan_reg_t channel[4];
+} gpio_sd_dev_t;
 
 typedef struct {
-    volatile gpio_ext_clock_gate_reg_t clock_gate;
-    volatile gpio_ext_sigmadelta_misc_reg_t sigmadelta_misc;
-    volatile gpio_ext_sigmadeltan_reg_t sigmadeltan[4];
+    volatile gpio_sd_dev_t sigma_delta;
     uint32_t reserved_018[16];
     volatile gpio_ext_pad_comp_config_0_reg_t pad_comp_config_0;
     volatile gpio_ext_pad_comp_filter_0_reg_t pad_comp_filter_0;
@@ -1096,6 +1099,7 @@ typedef struct {
     volatile gpio_ext_version_reg_t version;
 } gpio_ext_dev_t;
 
+extern gpio_sd_dev_t SDM;
 extern gpio_ext_dev_t GPIO_EXT;
 
 #ifndef __cplusplus

components/soc/esp32c5/include/soc/reg_base.h

@@ -57,6 +57,7 @@
  */
 #define DR_REG_IO_MUX_BASE                        0x60090000
 #define DR_REG_GPIO_BASE                          0x60091000
+#define DR_REG_GPIO_EXT_BASE                      0x60091e00
 #define DR_REG_MEM_MONITOR_BASE                   0x60092000
 #define DR_REG_PAU_BASE                           0x60093000
 #define DR_REG_HP_SYSTEM_BASE                     0x60095000

components/soc/esp32c5/include/soc/soc_caps.h

@@ -41,7 +41,7 @@
 #define SOC_RTC_MEM_SUPPORTED           1
 #define SOC_I2S_SUPPORTED               1
 #define SOC_RMT_SUPPORTED               1
-// #define SOC_SDM_SUPPORTED               1  // TODO: [ESP32C5] IDF-8687
+#define SOC_SDM_SUPPORTED               1
 #define SOC_GPSPI_SUPPORTED             1
 #define SOC_LEDC_SUPPORTED              1
 #define SOC_I2C_SUPPORTED               1
@@ -388,10 +388,10 @@
 #define SOC_ECDSA_SUPPORT_EXPORT_PUBKEY     (1)
 
 /*-------------------------- Sigma Delta Modulator CAPS -----------------*/
-// #define SOC_SDM_GROUPS               1U
-// #define SOC_SDM_CHANNELS_PER_GROUP   4
-// #define SOC_SDM_CLK_SUPPORT_PLL_F80M 1
-// #define SOC_SDM_CLK_SUPPORT_XTAL     1
+#define SOC_SDM_GROUPS               1U
+#define SOC_SDM_CHANNELS_PER_GROUP   4
+#define SOC_SDM_CLK_SUPPORT_PLL_F80M 1
+#define SOC_SDM_CLK_SUPPORT_XTAL     1
 
 /*-------------------------- SPI CAPS ----------------------------------------*/
 #define SOC_SPI_PERIPH_NUM          2

components/soc/esp32c5/ld/esp32c5.peripherals.ld

@@ -42,7 +42,8 @@ PROVIDE ( HMAC                = 0x6008D000 );
 PROVIDE ( ECDSA               = 0x6008E000 );
 PROVIDE ( IO_MUX              = 0x60090000 );
 PROVIDE ( GPIO                = 0x60091000 );
-PROVIDE ( GPIO_EXT            = 0x60091f00 );
+PROVIDE ( GPIO_EXT            = 0x60091e00 );
+PROVIDE ( SDM                 = 0x60091e00 );
 PROVIDE ( MEM_MONITOR         = 0x60092000 );
 PROVIDE ( PAU                 = 0x60093000 );
 PROVIDE ( HP_SYSTEM           = 0x60095000 );

components/soc/esp32c5/sdm_periph.c

@@ -0,0 +1,25 @@
+/*
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "soc/sdm_periph.h"
+#include "soc/gpio_sig_map.h"
+
+const sigma_delta_signal_conn_t sigma_delta_periph_signals = {
+    .channels = {
+        [0] = {
+            GPIO_SD0_OUT_IDX
+        },
+        [1] = {
+            GPIO_SD1_OUT_IDX
+        },
+        [2] = {
+            GPIO_SD2_OUT_IDX
+        },
+        [3] = {
+            GPIO_SD3_OUT_IDX
+        }
+    }
+};

examples/peripherals/sigma_delta/sdm_dac/README.md

@@ -1,5 +1,5 @@
-| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
 
 # Sigma Delta Modulation DAC Example
 

examples/peripherals/sigma_delta/sdm_dac/pytest_sdm_dac_example.py

@@ -1,6 +1,5 @@
 # SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
 # SPDX-License-Identifier: CC0-1.0
-
 import pytest
 from pytest_embedded import Dut
 
@@ -9,6 +8,7 @@ from pytest_embedded import Dut
 @pytest.mark.esp32s2
 @pytest.mark.esp32s3
 @pytest.mark.esp32c3
+@pytest.mark.esp32c5
 @pytest.mark.esp32c6
 @pytest.mark.esp32h2
 @pytest.mark.esp32p4

examples/peripherals/sigma_delta/sdm_led/README.md

@@ -1,5 +1,5 @@
-| Supported Targets | ESP32 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
+| Supported Targets | ESP32 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
 
 # Sigma Delta Modulation LED Example
 

examples/peripherals/sigma_delta/sdm_led/pytest_sdm_led_example.py

@@ -1,6 +1,5 @@
 # SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
 # SPDX-License-Identifier: CC0-1.0
-
 import pytest
 from pytest_embedded import Dut
 
@@ -9,6 +8,7 @@ from pytest_embedded import Dut
 @pytest.mark.esp32s2
 @pytest.mark.esp32s3
 @pytest.mark.esp32c3
+@pytest.mark.esp32c5
 @pytest.mark.esp32c6
 @pytest.mark.esp32h2
 @pytest.mark.esp32p4