alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-09-19 14:26:01 -04:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

fix(parlio): fix cache sync issue on P4

Browse Source
This commit is contained in:
laokaiyao 2024-07-12 16:07:16 +08:00
parent 3b46ee0538
commit a616782218
2 changed files with 17 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
components/esp_driver_parlio/src/parlio_tx.c
View File

@ -394,7 +394,7 @@ static void IRAM_ATTR parlio_tx_mount_dma_data(parlio_tx_unit_t *tx_unit, const
while (len) {
assert(desc_nc);
mount_bytes = len > DMA_DESCRIPTOR_BUFFER_MAX_SIZE ? DMA_DESCRIPTOR_BUFFER_MAX_SIZE : len;
mount_bytes = len > PARLIO_MAX_ALIGNED_DMA_BUF_SIZE ? PARLIO_MAX_ALIGNED_DMA_BUF_SIZE : len;
len -= mount_bytes;
desc_nc->dw0.suc_eof = (len == 0); // whether the last frame
desc_nc->dw0.size = mount_bytes;
@ -404,11 +404,6 @@ static void IRAM_ATTR parlio_tx_mount_dma_data(parlio_tx_unit_t *tx_unit, const
desc_nc = PARLIO_GET_NON_CACHED_DESC_ADDR(desc_nc->next);
prepared_length += mount_bytes;
}
#if CONFIG_IDF_TARGET_ESP32P4
// Write back to cache to synchronize the cache before DMA start
esp_cache_msync((void *)buffer, len, ESP_CACHE_MSYNC_FLAG_DIR_C2M);
#endif // CONFIG_IDF_TARGET_ESP32P4
}
esp_err_t parlio_tx_unit_wait_all_done(parlio_tx_unit_handle_t tx_unit, int timeout_ms)
@ -572,6 +567,11 @@ esp_err_t parlio_tx_unit_transmit(parlio_tx_unit_handle_t tx_unit, const void *p
t->payload = payload;
t->payload_bits = payload_bits;
t->idle_value = config->idle_value & tx_unit->idle_value_mask;
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
// Write back to cache to synchronize the cache before DMA start
ESP_RETURN_ON_ERROR(esp_cache_msync((void *)payload, (payload_bits + 7) / 8,
ESP_CACHE_MSYNC_FLAG_DIR_C2M | ESP_CACHE_MSYNC_FLAG_UNALIGNED), TAG, "cache sync failed");
#endif // SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
// send the transaction descriptor to progress queue
ESP_RETURN_ON_FALSE(xQueueSend(tx_unit->trans_queues[PARLIO_TX_QUEUE_PROGRESS], &t, 0) == pdTRUE,

20
components/esp_driver_parlio/test_apps/parlio/main/test_parlio_tx.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -109,7 +109,7 @@ TEST_CASE("parallel_tx_unit_trans_done_event", "[parlio_tx]")
parlio_transmit_config_t transmit_config = {
.idle_value = 0x00,
};
uint8_t payload[64] = {0};
__attribute__((aligned(64))) uint8_t payload[64] = {0};
for (int i = 0; i < 64; i++) {
payload[i] = i;
}
@ -155,7 +155,7 @@ TEST_CASE("parallel_tx_unit_enable_disable", "[parlio_tx]")
parlio_transmit_config_t transmit_config = {
.idle_value = 0x00,
};
uint8_t payload[128] = {0};
__attribute__((aligned(64))) uint8_t payload[128] = {0};
for (int i = 0; i < 128; i++) {
payload[i] = i;
}
@ -210,8 +210,9 @@ TEST_CASE("parallel_tx_unit_idle_value", "[parlio_tx]")
parlio_transmit_config_t transmit_config = {
.idle_value = 0x00,
};
uint8_t payload[8] = {0};
for (int i = 0; i < 8; i++) {
uint32_t size = 64;
__attribute__((aligned(64))) uint8_t payload[size];
for (int i = 0; i < size; i++) {
payload[i] = i;
}
for (int j = 0; j < 16; j++) {
@ -255,15 +256,16 @@ TEST_CASE("parallel_tx_clock_gating", "[paralio_tx]")
parlio_transmit_config_t transmit_config = {
.idle_value = 0x00,
};
uint8_t payload[8] = {0};
for (int i = 0; i < 8; i++) {
uint32_t size = 64;
__attribute__((aligned(64))) uint8_t payload[size];
for (int i = 0; i < size; i++) {
payload[i] = 0x1B; // 8'b00011011, in PARLIO_BIT_PACK_ORDER_MSB, you should see 2'b00, 2'b01, 2'b10, 2'b11 on the data line
}
TEST_ESP_OK(parlio_tx_unit_transmit(tx_unit, payload, 8 * sizeof(uint8_t) * 8, &transmit_config));
TEST_ESP_OK(parlio_tx_unit_transmit(tx_unit, payload, size * sizeof(uint8_t) * 8, &transmit_config));
TEST_ESP_OK(parlio_tx_unit_wait_all_done(tx_unit, -1));
// check if the level on the clock line is low
TEST_ASSERT_EQUAL(0, gpio_get_level(TEST_CLK_GPIO));
TEST_ESP_OK(parlio_tx_unit_transmit(tx_unit, payload, 8 * sizeof(uint8_t) * 8, &transmit_config));
TEST_ESP_OK(parlio_tx_unit_transmit(tx_unit, payload, size * sizeof(uint8_t) * 8, &transmit_config));
TEST_ESP_OK(parlio_tx_unit_wait_all_done(tx_unit, -1));
TEST_ASSERT_EQUAL(0, gpio_get_level(TEST_CLK_GPIO));
TEST_ASSERT_EQUAL(0, gpio_get_level(TEST_CLK_GPIO));