From a5295af829974c798359f9f4f8da557f56d69286 Mon Sep 17 00:00:00 2001 From: Armando Date: Tue, 23 Feb 2021 21:40:47 +0800 Subject: [PATCH] adc: update adc header files on c3 --- components/driver/include/driver/adc_common.h | 10 ++++- components/soc/esp32c3/adc_periph.c | 6 +-- .../soc/esp32c3/include/soc/adc_channel.h | 44 +------------------ components/soc/esp32c3/include/soc/soc_caps.h | 13 +----- 4 files changed, 12 insertions(+), 61 deletions(-) diff --git a/components/driver/include/driver/adc_common.h b/components/driver/include/driver/adc_common.h index 66b34a47b7..d2a13b6073 100644 --- a/components/driver/include/driver/adc_common.h +++ b/components/driver/include/driver/adc_common.h @@ -60,7 +60,7 @@ typedef enum { ADC1_CHANNEL_1, /*!< ADC1 channel 1 is GPIO1 */ ADC1_CHANNEL_2, /*!< ADC1 channel 2 is GPIO2 */ ADC1_CHANNEL_3, /*!< ADC1 channel 3 is GPIO3 */ - ADC1_CHANNEL_4, /*!< ADC1 channel 4 is GPIO34 */ + ADC1_CHANNEL_4, /*!< ADC1 channel 4 is GPIO4 */ ADC1_CHANNEL_MAX, } adc1_channel_t; #endif // CONFIG_IDF_TARGET_* @@ -186,9 +186,10 @@ void adc_power_release(void); esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel); /*--------------------------------------------------------------- - RTC controller setting + ADC Single Read Setting ---------------------------------------------------------------*/ +#if !CONFIG_IDF_TARGET_ESP32C3 /** * @brief Get the GPIO number of a specific ADC1 channel. * @@ -200,6 +201,7 @@ esp_err_t adc_gpio_init(adc_unit_t adc_unit, adc_channel_t channel); * - ESP_ERR_INVALID_ARG if channel not valid */ esp_err_t adc1_pad_get_io_num(adc1_channel_t channel, gpio_num_t *gpio_num); +#endif //#if !CONFIG_IDF_TARGET_ESP32C3 /** * @brief Set the attenuation of a particular channel on ADC1, and configure its associated GPIO pin mux. @@ -283,6 +285,7 @@ esp_err_t adc1_config_width(adc_bits_width_t width_bit); */ int adc1_get_raw(adc1_channel_t channel); +#if !CONFIG_IDF_TARGET_ESP32C3 /** * @brief Set ADC data invert * @param adc_unit ADC unit index @@ -336,6 +339,7 @@ void adc1_ulp_enable(void); * - ESP_ERR_INVALID_ARG if channel not valid */ esp_err_t adc2_pad_get_io_num(adc2_channel_t channel, gpio_num_t *gpio_num); +#endif //#if !CONFIG_IDF_TARGET_ESP32C3 /** * @brief Configure the ADC2 channel, including setting attenuation. @@ -416,6 +420,7 @@ esp_err_t adc2_config_channel_atten(adc2_channel_t channel, adc_atten_t atten); */ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *raw_out); +#if !CONFIG_IDF_TARGET_ESP32C3 /** * @brief Output ADC1 or ADC2's reference voltage to ``adc2_channe_t``'s IO. * @@ -449,6 +454,7 @@ esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio); * - ESP_ERR_INVALID_ARG: Unsupported GPIO */ esp_err_t adc2_vref_to_gpio(gpio_num_t gpio) __attribute__((deprecated)); +#endif //#if !CONFIG_IDF_TARGET_ESP32C3 /*--------------------------------------------------------------- Digital controller setting ---------------------------------------------------------------*/ diff --git a/components/soc/esp32c3/adc_periph.c b/components/soc/esp32c3/adc_periph.c index 68a6bfa4dd..06a835d233 100644 --- a/components/soc/esp32c3/adc_periph.c +++ b/components/soc/esp32c3/adc_periph.c @@ -18,12 +18,10 @@ const int adc_channel_io_map[SOC_ADC_PERIPH_NUM][SOC_ADC_MAX_CHANNEL_NUM] = { /* ADC1 */ { - ADC1_CHANNEL_0_GPIO_NUM, ADC1_CHANNEL_1_GPIO_NUM, ADC1_CHANNEL_2_GPIO_NUM, ADC1_CHANNEL_3_GPIO_NUM, ADC1_CHANNEL_4_GPIO_NUM, - ADC1_CHANNEL_5_GPIO_NUM, ADC1_CHANNEL_6_GPIO_NUM, ADC1_CHANNEL_7_GPIO_NUM, -1, -1 + ADC1_CHANNEL_0_GPIO_NUM, ADC1_CHANNEL_1_GPIO_NUM, ADC1_CHANNEL_2_GPIO_NUM, ADC1_CHANNEL_3_GPIO_NUM, ADC1_CHANNEL_4_GPIO_NUM }, /* ADC2 */ { - ADC2_CHANNEL_0_GPIO_NUM, ADC2_CHANNEL_1_GPIO_NUM, ADC2_CHANNEL_2_GPIO_NUM, ADC2_CHANNEL_3_GPIO_NUM, ADC2_CHANNEL_4_GPIO_NUM, - ADC2_CHANNEL_5_GPIO_NUM, ADC2_CHANNEL_6_GPIO_NUM, ADC2_CHANNEL_7_GPIO_NUM, ADC2_CHANNEL_8_GPIO_NUM, ADC2_CHANNEL_9_GPIO_NUM + ADC2_CHANNEL_0_GPIO_NUM, -1, -1, -1, -1 } }; diff --git a/components/soc/esp32c3/include/soc/adc_channel.h b/components/soc/esp32c3/include/soc/adc_channel.h index 59cfeb6039..9a645006c4 100644 --- a/components/soc/esp32c3/include/soc/adc_channel.h +++ b/components/soc/esp32c3/include/soc/adc_channel.h @@ -30,49 +30,7 @@ #define ADC1_GPIO5_CHANNEL ADC1_CHANNEL_4 #define ADC1_CHANNEL_4_GPIO_NUM 4 -#define ADC1_GPIO6_CHANNEL ADC1_CHANNEL_5 -#define ADC1_CHANNEL_5_GPIO_NUM 5 - -#define ADC1_GPIO7_CHANNEL ADC1_CHANNEL_6 -#define ADC1_CHANNEL_6_GPIO_NUM 7 - -#define ADC1_GPIO8_CHANNEL ADC1_CHANNEL_7 -#define ADC1_CHANNEL_7_GPIO_NUM 8 - -#define ADC1_GPIO9_CHANNEL ADC1_CHANNEL_8 -#define ADC1_CHANNEL_8_GPIO_NUM 9 - -#define ADC1_GPIO10_CHANNEL ADC1_CHANNEL_9 -#define ADC1_CHANNEL_9_GPIO_NUM 10 - -#define ADC2_GPIO11_CHANNEL ADC2_CHANNEL_0 +#define ADC2_GPIO5_CHANNEL ADC2_CHANNEL_0 #define ADC2_CHANNEL_0_GPIO_NUM 5 -#define ADC2_GPIO12_CHANNEL ADC2_CHANNEL_1 -#define ADC2_CHANNEL_1_GPIO_NUM 6 - -#define ADC2_GPIO13_CHANNEL ADC2_CHANNEL_2 -#define ADC2_CHANNEL_2_GPIO_NUM 13 - -#define ADC2_GPIO14_CHANNEL ADC2_CHANNEL_3 -#define ADC2_CHANNEL_3_GPIO_NUM 14 - -#define ADC2_GPIO15_CHANNEL ADC2_CHANNEL_4 -#define ADC2_CHANNEL_4_GPIO_NUM 15 - -#define ADC2_GPIO16_CHANNEL ADC2_CHANNEL_5 -#define ADC2_CHANNEL_5_GPIO_NUM 16 - -#define ADC2_GPIO17_CHANNEL ADC2_CHANNEL_6 -#define ADC2_CHANNEL_6_GPIO_NUM 17 - -#define ADC2_GPIO18_CHANNEL ADC2_CHANNEL_7 -#define ADC2_CHANNEL_7_GPIO_NUM 18 - -#define ADC2_GPIO19_CHANNEL ADC2_CHANNEL_8 -#define ADC2_CHANNEL_8_GPIO_NUM 19 - -#define ADC2_GPIO20_CHANNEL ADC2_CHANNEL_9 -#define ADC2_CHANNEL_9_GPIO_NUM 20 - #endif diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h index f85e20bed1..dbbf451393 100644 --- a/components/soc/esp32c3/include/soc/soc_caps.h +++ b/components/soc/esp32c3/include/soc/soc_caps.h @@ -45,17 +45,6 @@ #define SOC_TWAI_BRP_MIN 2 #define SOC_TWAI_BRP_MAX 32768 -#define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) ((PERIPH_NUM==0)? 5 : 1) -#define SOC_ADC_MAX_CHANNEL_NUM (10) - -/** - * Check if adc support digital controller (DMA) mode. - * @value - * - 1 : support; - * - 0 : not support; - */ -#define SOC_ADC_SUPPORT_DMA_MODE(PERIPH_NUM) 1 - /*--------------------------- SHA CAPS ---------------------------------------*/ /* Max amount of bytes in a single DMA operation is 4095, @@ -113,7 +102,7 @@ #define SOC_ADC_PERIPH_NUM (2) #define SOC_ADC_PATT_LEN_MAX (16) #define SOC_ADC_CHANNEL_NUM(PERIPH_NUM) ((PERIPH_NUM==0)? 5 : 1) -#define SOC_ADC_MAX_CHANNEL_NUM (10) +#define SOC_ADC_MAX_CHANNEL_NUM (5) #define SOC_ADC_MAX_BITWIDTH (12) #define SOC_ADC_DIGI_FILTER_NUM (2) #define SOC_ADC_DIGI_MONITOR_NUM (2)