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ci: fix invalid kconfig options in system test apps

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This commit is contained in:
Marius Vikhammer 2023-04-21 12:37:30 +08:00
parent ffdea977dc
commit a300b3eb81
27 changed files with 34 additions and 22 deletions
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5
components/esp_common/.build-test-rules.yml Normal file
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@ -0,0 +1,5 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/esp_common/test_apps/esp_common:
disable:
- if: CONFIG_NAME == "psram" and SOC_SPIRAM_SUPPORTED != 1

1
components/esp_common/test_apps/esp_common/sdkconfig.ci.psram
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@ -1,4 +1,3 @@
# For EXT_RAM_BSS_ATTR
CONFIG_SPIRAM=y
CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y

4
components/esp_system/.build-test-rules.yml
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@ -1,5 +1,9 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/esp_system/test_apps/esp_system_unity_tests:
disable:
- if: CONFIG_NAME == "psram" and SOC_SPIRAM_SUPPORTED != 1
components/esp_system/test_apps/linux_apis:
enable:
- if: IDF_TARGET == "linux"

3
components/esp_system/test_apps/esp_system_unity_tests/main/CMakeLists.txt
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@ -2,7 +2,8 @@ set(requires "unity"
"test_utils"
"driver"
"esp_timer"
"nvs_flash")
"nvs_flash"
"esp_psram")
set(SRC "test_app_main.c"
"test_backtrace.c"

3
components/esp_system/test_apps/esp_system_unity_tests/main/test_reset_reason.c
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@ -3,6 +3,7 @@
*
* SPDX-License-Identifier: Unlicense OR CC0-1.0
*/
#include <inttypes.h>
#include "unity.h"
#include "esp_system.h"
#include "esp_task_wdt.h"
@ -338,7 +339,7 @@ static int fibonacci(int n, void* func(void))
uint32_t base, start;
RSR(WINDOWBASE, base);
RSR(WINDOWSTART, start);
printf("WINDOWBASE = %-2d WINDOWSTART = 0x%x\n", base, start);
printf("WINDOWBASE = %-2"PRIi32" WINDOWSTART = 0x%"PRIx32"\n", base, start);
if (n <= 1) {
StackType_t *last_addr_stack = esp_cpu_get_sp();
StackType_t *used_stack = (StackType_t *) (start_addr_stack - last_addr_stack);

2
components/esp_timer/test_apps/main/CMakeLists.txt
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@ -1,4 +1,4 @@
idf_component_register(SRC_DIRS "."
PRIV_INCLUDE_DIRS "../../private_include"
PRIV_REQUIRES cmock test_utils esp_timer spi_flash
PRIV_REQUIRES cmock test_utils esp_timer spi_flash esp_psram
WHOLE_ARCHIVE)

1
components/freertos/test_apps/freertos/sdkconfig.ci.freertos_options
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@ -6,7 +6,6 @@ CONFIG_FREERTOS_HZ=500
CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL=y
CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y
CONFIG_FREERTOS_INTERRUPT_BACKTRACE=n
CONFIG_FREERTOS_LEGACY_HOOKS=y
CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP=y
CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=10

5
components/heap/.build-test-rules.yml
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@ -1,5 +1,10 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/heap/test_apps/heap_tests:
disable:
- if: CONFIG_NAME == "psram" and SOC_SPIRAM_SUPPORTED != 1
- if: CONFIG_NAME == "psram_all_ext" and SOC_SPIRAM_SUPPORTED != 1
components/heap/test_apps/host_test_linux:
enable:
- if: IDF_TARGET == "linux"

1
components/heap/test_apps/heap_tests/sdkconfig.ci.8bit_access
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@ -1,2 +1,3 @@
CONFIG_IDF_TARGET="esp32"
CONFIG_FREERTOS_UNICORE=y
CONFIG_ESP32_IRAM_AS_8BIT_ACCESSIBLE_MEMORY=y

1
components/heap/test_apps/heap_tests/sdkconfig.ci.heap_trace
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@ -1,2 +1,3 @@
CONFIG_IDF_TARGET="esp32"
CONFIG_SPIRAM=y
CONFIG_HEAP_TRACING_STANDALONE=y

1
components/heap/test_apps/heap_tests/sdkconfig.ci.heap_trace_hashmap
View File

@ -1,3 +1,4 @@
CONFIG_IDF_TARGET="esp32"
CONFIG_SPIRAM=y
CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY=y
CONFIG_HEAP_TRACING_STANDALONE=y

1
examples/system/deep_sleep/sdkconfig.ci.basic
View File

@ -1,6 +1,5 @@
# Generic config
CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP=y
CONFIG_EXAMPLE_ULP_TEMPERATURE_WAKEUP=n
CONFIG_EXAMPLE_EXT1_WAKEUP=n
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80=y

1
examples/system/deep_sleep/sdkconfig.ci.esp32_singlecore
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@ -5,7 +5,6 @@ CONFIG_FREERTOS_UNICORE=y
# Generic config
CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP=y
CONFIG_EXAMPLE_ULP_TEMPERATURE_WAKEUP=n
CONFIG_EXAMPLE_EXT1_WAKEUP=n
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80=y

6
examples/system/esp_timer/sdkconfig.ci.rtc
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@ -2,8 +2,4 @@
# This is to avoid any timing impact on test behavior
CONFIG_ESP_CONSOLE_SECONDARY_NONE=y
CONFIG_ESP32_TIME_SYSCALL_USE_RTC=y
CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC=y
CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC=y
CONFIG_ESP32C2_TIME_SYSCALL_USE_RTC=y
CONFIG_ESP32C3_TIME_SYSCALL_USE_RTC=y
CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC=y

1
examples/system/himem/sdkconfig.defaults
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@ -3,7 +3,6 @@ CONFIG_SPIRAM_BOOT_INIT=y
CONFIG_SPIRAM_IGNORE_NOTFOUND=n
CONFIG_SPIRAM_USE_MALLOC=y
CONFIG_SPIRAM_TYPE_AUTO=y
CONFIG_SPIRAM_SIZE=-1
CONFIG_SPIRAM_SPEED_40M=y
CONFIG_SPIRAM_MEMTEST=y
CONFIG_SPIRAM_CACHE_WORKAROUND=y

2
examples/system/ulp_riscv/adc/sdkconfig.defaults
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@ -1,6 +1,6 @@
# Enable ULP
CONFIG_ULP_COPROC_ENABLED=y
CONFIG_ULP_COPROC_RISCV=y
CONFIG_ULP_COPROC_TYPE_RISCV=y
CONFIG_ULP_COPROC_RESERVE_MEM=4096
# Set log level to Warning to produce clean output
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y

2
examples/system/ulp_riscv/ds18b20_onewire/sdkconfig.defaults
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@ -1,6 +1,6 @@
# Enable ULP
CONFIG_ULP_COPROC_ENABLED=y
CONFIG_ULP_COPROC_RISCV=y
CONFIG_ULP_COPROC_TYPE_RISCV=y
CONFIG_ULP_COPROC_RESERVE_MEM=4096
# Set log level to Warning to produce clean output
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y

2
examples/system/ulp_riscv/gpio/sdkconfig.defaults
View File

@ -1,6 +1,6 @@
# Enable ULP
CONFIG_ULP_COPROC_ENABLED=y
CONFIG_ULP_COPROC_RISCV=y
CONFIG_ULP_COPROC_TYPE_RISCV=y
CONFIG_ULP_COPROC_RESERVE_MEM=4096
# Set log level to Warning to produce clean output
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y

2
examples/system/ulp_riscv/i2c/sdkconfig.defaults
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@ -1,6 +1,6 @@
# Enable ULP
CONFIG_ULP_COPROC_ENABLED=y
CONFIG_ULP_COPROC_RISCV=y
CONFIG_ULP_COPROC_TYPE_RISCV=y
CONFIG_ULP_COPROC_RESERVE_MEM=4096
# Set log level to Warning to produce clean output
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y

2
examples/system/ulp_riscv/uart_print/sdkconfig.defaults
View File

@ -1,6 +1,6 @@
# Enable ULP
CONFIG_ULP_COPROC_ENABLED=y
CONFIG_ULP_COPROC_RISCV=y
CONFIG_ULP_COPROC_TYPE_RISCV=y
CONFIG_ULP_COPROC_RESERVE_MEM=4096
# Set log level to Warning to produce clean output
CONFIG_BOOTLOADER_LOG_LEVEL_WARN=y

1
examples/system/xip_from_psram/sdkconfig.ci.esp32s3_f4r8
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@ -1 +1,2 @@
CONFIG_IDF_TARGET="esp32s3"
CONFIG_SPIRAM_MODE_OCT=y

1
tools/test_apps/system/build_test/sdkconfig.ci.rtc_gpio_desc
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@ -1 +0,0 @@
CONFIG_RTCIO_SUPPORT_RTC_GPIO_DESC=y

2
tools/test_apps/system/build_test/sdkconfig.ci.trax
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@ -1,2 +0,0 @@
CONFIG_ESP32_TRAX=y
CONFIG_ESP32S2_TRAX=y

2
tools/test_apps/system/build_test/sdkconfig.ci.trax_esp32 Normal file
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@ -0,0 +1,2 @@
CONFIG_IDF_TARGET="esp32"
CONFIG_ESP32_TRAX=y

2
tools/test_apps/system/build_test/sdkconfig.ci.trax_esp32s2 Normal file
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@ -0,0 +1,2 @@
CONFIG_IDF_TARGET="esp32s2"
CONFIG_ESP32S2_TRAX=y

1
tools/unit-test-app/sdkconfig.defaults
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@ -17,6 +17,5 @@ CONFIG_ADC_DISABLE_DAC=n
CONFIG_COMPILER_WARN_WRITE_STRINGS=y
CONFIG_SPI_MASTER_IN_IRAM=y
CONFIG_EFUSE_VIRTUAL=y
CONFIG_SPIRAM_BANKSWITCH_ENABLE=n
CONFIG_UNITY_ENABLE_BACKTRACE_ON_FAIL=y
CONFIG_MQTT_TEST_BROKER_URI="mqtt://${EXAMPLE_MQTT_BROKER_TCP}"

1
tools/unit-test-app/sdkconfig.defaults.esp32
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@ -1,3 +1,4 @@
CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y
CONFIG_XTAL_FREQ_AUTO=y
CONFIG_SPI_FLASH_SHARE_SPI1_BUS=y
CONFIG_SPIRAM_BANKSWITCH_ENABLE=n