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Merge branch 'bugfix/spi_flash_region' into 'master'
spi_flash_erase_range: Allow for 32KB blocks not 64KB blocks SPI flash hardware sends 52h command, which is a 32KB erase. There is a matching bug in the ROM SPIEraseArea code, unless flashchip->block_size is modified first. See merge request !249
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9f9d92b2df
@ -384,7 +384,8 @@ SpiFlashOpResult SPIParamCfg(uint32_t deviceId, uint32_t chip_size, uint32_t blo
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SpiFlashOpResult SPIEraseChip(void);
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/**
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* @brief Erase a block of flash.
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* @brief Erase a 32KB block of flash
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* Uses SPI flash command 52h.
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* Please do not call this function in SDK.
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*
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* @param uint32_t block_num : Which block to erase.
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@ -411,6 +412,12 @@ SpiFlashOpResult SPIEraseSector(uint32_t sector_num);
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* @brief Erase some sectors.
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* Please do not call this function in SDK.
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*
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* @note If calling this function, first set
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* g_rom_flashchip.block_size = 32768; or call SPIParamCfg()
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* with appropriate parameters. This is due to a ROM bug, the
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* block erase command in use is a 32KB erase but after reset
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* the block_size field is incorrectly set to 65536.
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*
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* @param uint32_t start_addr : Start addr to erase, should be sector aligned.
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*
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* @param uint32_t area_len : Length to erase, should be sector aligned.
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@ -31,6 +31,9 @@
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#include "esp_log.h"
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#include "cache_utils.h"
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/* bytes erased by SPIEraseBlock() ROM function */
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#define BLOCK_ERASE_SIZE 32768
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#if CONFIG_SPI_FLASH_ENABLE_COUNTERS
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static const char* TAG = "spi_flash";
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static spi_flash_counters_t s_flash_stats;
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@ -100,7 +103,7 @@ esp_err_t IRAM_ATTR spi_flash_erase_range(uint32_t start_addr, uint32_t size)
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}
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size_t start = start_addr / SPI_FLASH_SEC_SIZE;
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size_t end = start + size / SPI_FLASH_SEC_SIZE;
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const size_t sectors_per_block = 16;
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const size_t sectors_per_block = BLOCK_ERASE_SIZE / SPI_FLASH_SEC_SIZE;
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COUNTER_START();
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spi_flash_disable_interrupts_caches_and_other_cpu();
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SpiFlashOpResult rc;
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