Merge branch 'feature/esp32p4_hp_ledc_support' into 'master'

feat(ledc): support ledc on esp32p4

Closes IDF-6510

See merge request espressif/esp-idf!25356

components/driver/ledc/ledc.c

@@ -44,6 +44,18 @@ static __attribute__((unused)) const char *LEDC_TAG = "ledc";
 #define LEDC_CLK_SRC_FREQ_PRECISION     ESP_CLK_TREE_SRC_FREQ_PRECISION_APPROX
 #endif
 
+#if !SOC_RCC_IS_INDEPENDENT
+#define LEDC_BUS_CLOCK_ATOMIC() PERIPH_RCC_ATOMIC()
+#else
+#define LEDC_BUS_CLOCK_ATOMIC()
+#endif
+
+#if SOC_PERIPH_CLK_CTRL_SHARED
+#define LEDC_FUNC_CLOCK_ATOMIC() PERIPH_RCC_ATOMIC()
+#else
+#define LEDC_FUNC_CLOCK_ATOMIC()
+#endif
+
 typedef enum {
     LEDC_FSM_IDLE,
     LEDC_FSM_HW_FADE,
@@ -297,8 +309,10 @@ static bool ledc_speed_mode_ctx_create(ledc_mode_t speed_mode)
             memset(ledc_new_mode_obj->timer_specific_clk, LEDC_TIMER_SPECIFIC_CLK_UNINIT, sizeof(ledc_clk_src_t) * LEDC_TIMER_MAX);
 #endif
             p_ledc_obj[speed_mode] = ledc_new_mode_obj;
-            // Enable APB access to LEDC registers
+            LEDC_BUS_CLOCK_ATOMIC() {
-            periph_module_enable(PERIPH_LEDC_MODULE);
+                ledc_ll_enable_bus_clock(true);
+                ledc_ll_enable_reset_reg(false);
+            }
         }
     }
     _lock_release(&s_ledc_mutex[speed_mode]);
@@ -439,7 +453,6 @@ static uint32_t ledc_auto_clk_divisor(ledc_mode_t speed_mode, int freq_hz, uint3
     return ret;
 }
 
-extern void esp_sleep_periph_use_8m(bool use_or_not);
 
 /**
  * @brief Function setting the LEDC timer divisor with the given source clock,
@@ -549,14 +562,20 @@ static esp_err_t ledc_set_timer_div(ledc_mode_t speed_mode, ledc_timer_t timer_n
         if (p_ledc_obj[speed_mode]->glb_clk != glb_clk) {
             // TODO: release old glb_clk (if not UNINIT), and acquire new glb_clk [clk_tree]
             p_ledc_obj[speed_mode]->glb_clk = glb_clk;
-            ledc_hal_set_slow_clk_sel(&(p_ledc_obj[speed_mode]->ledc_hal), glb_clk);
+            LEDC_FUNC_CLOCK_ATOMIC() {
+                ledc_ll_enable_clock(p_ledc_obj[speed_mode]->ledc_hal.dev, true);
+                ledc_hal_set_slow_clk_sel(&(p_ledc_obj[speed_mode]->ledc_hal), glb_clk);
+            }
         }
         portEXIT_CRITICAL(&ledc_spinlock);
 
         ESP_LOGD(LEDC_TAG, "In slow speed mode, global clk set: %d", glb_clk);
 
+#if !CONFIG_IDF_TARGET_ESP32P4 //depend on sleep support IDF-7528 and IDF-7529
         /* keep ESP_PD_DOMAIN_RC_FAST on during light sleep */
+        extern void esp_sleep_periph_use_8m(bool use_or_not);
         esp_sleep_periph_use_8m(glb_clk == LEDC_SLOW_CLK_RC_FAST);
+#endif
     }
 
     /* The divisor is correct, we can write in the hardware. */
@@ -564,7 +583,7 @@ static esp_err_t ledc_set_timer_div(ledc_mode_t speed_mode, ledc_timer_t timer_n
     return ESP_OK;
 
 error:
-    ESP_LOGE(LEDC_TAG, "requested frequency and duty resolution can not be achieved, try reducing freq_hz or duty_resolution. div_param=%"PRIu32, div_param);
+    ESP_LOGE(LEDC_TAG, "requested frequency %d and duty resolution %d can not be achieved, try reducing freq_hz or duty_resolution. div_param=%"PRIu32, freq_hz, duty_resolution, div_param);
     return ESP_FAIL;
 }
 
@@ -655,7 +674,7 @@ esp_err_t ledc_channel_config(const ledc_channel_config_t *ledc_conf)
     if (!new_speed_mode_ctx_created && !p_ledc_obj[speed_mode]) {
         return ESP_ERR_NO_MEM;
     }
-#if !(CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32H2)
+#if !(CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4)
     // On such targets, the default ledc core(global) clock does not connect to any clock source
     // Set channel configurations and update bits before core clock is on could lead to error
     // Therefore, we should connect the core clock to a real clock source to make it on before any ledc register operation

components/driver/test_apps/ledc/README.md

@@ -1,2 +1,2 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |

components/driver/test_apps/ledc/main/test_app_main.c

@@ -1,36 +1,41 @@
 /*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
 
 #include "unity.h"
 #include "unity_test_utils.h"
-#include "unity_test_runner.h"
 #include "esp_heap_caps.h"
 
 // Some resources are lazy allocated in LEDC driver, the threshold is left for that case
 #define TEST_MEMORY_LEAK_THRESHOLD (230)
 
-static size_t before_free_8bit;
-static size_t before_free_32bit;
-
 void setUp(void)
 {
-    before_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
+    unity_utils_record_free_mem();
-    before_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
 }
 
 void tearDown(void)
 {
-    size_t after_free_8bit = heap_caps_get_free_size(MALLOC_CAP_8BIT);
+    esp_reent_cleanup();    //clean up some of the newlib's lazy allocations
-    size_t after_free_32bit = heap_caps_get_free_size(MALLOC_CAP_32BIT);
+    unity_utils_evaluate_leaks_direct(TEST_MEMORY_LEAK_THRESHOLD);
-    printf("\n");
-    unity_utils_check_leak(before_free_8bit, after_free_8bit, "8BIT", TEST_MEMORY_LEAK_THRESHOLD);
-    unity_utils_check_leak(before_free_32bit, after_free_32bit, "32BIT", TEST_MEMORY_LEAK_THRESHOLD);
 }
 
 void app_main(void)
 {
+
+    //  _____         _     _     _____ ____   ____
+    // |_   _|__  ___| |_  | |   | ____|  _ \ / ___|
+    //   | |/ _ \/ __| __| | |   |  _| | | | | |
+    //   | |  __/\__ \ |_  | |___| |___| |_| | |___
+    //   |_|\___||___/\__| |_____|_____|____/ \____|
+
+    printf("\n");
+    printf("  _____         _     _     _____ ____   ____ \n");
+    printf(" |_   _|__  ___| |_  | |   | ____|  _ \\ / ___|\n");
+    printf("   | |/ _ \\/ __| __| | |   |  _| | | | | |    \n");
+    printf("   | |  __/\\__ \\ |_  | |___| |___| |_| | |___ \n");
+    printf("   |_|\\___||___/\\__| |_____|_____|____/ \\____|\n");
     unity_run_menu();
 }

components/driver/test_apps/ledc/main/test_ledc.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -37,7 +37,11 @@
 #if SOC_LEDC_SUPPORT_APB_CLOCK
 #define TEST_DEFAULT_CLK_CFG LEDC_USE_APB_CLK
 #elif SOC_LEDC_SUPPORT_PLL_DIV_CLOCK
+#if SOC_CLK_TREE_SUPPORTED
 #define TEST_DEFAULT_CLK_CFG LEDC_USE_PLL_DIV_CLK
+#else
+#define TEST_DEFAULT_CLK_CFG LEDC_USE_XTAL_CLK
+#endif
 #endif
 
 static ledc_channel_config_t initialize_channel_config(void)
@@ -541,12 +545,13 @@ static void timer_frequency_test(ledc_channel_t channel, ledc_timer_bit_t timer_
         .speed_mode = speed_mode,
         .duty_resolution = timer_bit,
         .timer_num = timer,
-        .freq_hz = 5000,
+        .freq_hz = TEST_PWM_FREQ,
         .clk_cfg = TEST_DEFAULT_CLK_CFG,
     };
     TEST_ESP_OK(ledc_channel_config(&ledc_ch_config));
     TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
     frequency_set_get(speed_mode, timer, 100, 100, 20);
+#if SOC_CLK_TREE_SUPPORTED
     frequency_set_get(speed_mode, timer, 5000, 5000, 50);
     // Try a frequency that couldn't be exactly achieved, requires rounding
     uint32_t theoretical_freq = 9000;
@@ -558,6 +563,7 @@ static void timer_frequency_test(ledc_channel_t channel, ledc_timer_bit_t timer_
         theoretical_freq = 9009;
     }
     frequency_set_get(speed_mode, timer, 9000, theoretical_freq, 50);
+#endif
 
     // Pause and de-configure the timer so that it won't affect the following test cases
     TEST_ESP_OK(ledc_timer_pause(speed_mode, timer));
@@ -581,6 +587,7 @@ TEST_CASE("LEDC set and get frequency", "[ledc][timeout=60]")
     tear_testbench();
 }
 
+#if SOC_CLK_TREE_SUPPORTED
 static void timer_set_clk_src_and_freq_test(ledc_mode_t speed_mode, ledc_clk_cfg_t clk_src, uint32_t duty_res,
         uint32_t freq_hz)
 {
@@ -648,6 +655,7 @@ TEST_CASE("LEDC timer select specific clock source", "[ledc]")
 
     tear_testbench();
 }
+#endif  //SOC_CLK_TREE_SUPPORTED
 
 TEST_CASE("LEDC timer pause and resume", "[ledc]")
 {
@@ -669,14 +677,14 @@ TEST_CASE("LEDC timer pause and resume", "[ledc]")
         .speed_mode = test_speed_mode,
         .duty_resolution = LEDC_TIMER_13_BIT,
         .timer_num = LEDC_TIMER_0,
-        .freq_hz = 5000,
+        .freq_hz = TEST_PWM_FREQ,
         .clk_cfg = TEST_DEFAULT_CLK_CFG,
     };
     TEST_ESP_OK(ledc_timer_config(&ledc_time_config));
 
     vTaskDelay(10 / portTICK_PERIOD_MS);
     count = wave_count(1000);
-    TEST_ASSERT_INT16_WITHIN(5, 5000, count);
+    TEST_ASSERT_INT16_WITHIN(5, TEST_PWM_FREQ, count);
 
     //pause ledc timer, when pause it, will get no waveform count
     printf("Pause ledc timer\n");
@@ -690,14 +698,14 @@ TEST_CASE("LEDC timer pause and resume", "[ledc]")
     TEST_ESP_OK(ledc_timer_resume(test_speed_mode, LEDC_TIMER_0));
     vTaskDelay(10 / portTICK_PERIOD_MS);
     count = wave_count(1000);
-    TEST_ASSERT_UINT32_WITHIN(5, 5000, count);
+    TEST_ASSERT_UINT32_WITHIN(5, TEST_PWM_FREQ, count);
 
     //reset ledc timer
     printf("reset ledc timer\n");
     TEST_ESP_OK(ledc_timer_rst(test_speed_mode, LEDC_TIMER_0));
     vTaskDelay(100 / portTICK_PERIOD_MS);
     count = wave_count(1000);
-    TEST_ASSERT_UINT32_WITHIN(5, 5000, count);
+    TEST_ASSERT_UINT32_WITHIN(5, TEST_PWM_FREQ, count);
     tear_testbench();
 }
 

components/driver/test_apps/legacy_pcnt_driver/main/test_legacy_pcnt.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -13,11 +13,13 @@
 #include "driver/pcnt.h"
 #if SOC_LEDC_SUPPORTED
 #include "driver/ledc.h"
+#include "soc/ledc_periph.h"
 #endif
 #include "esp_attr.h"
 #include "esp_log.h"
 #include "soc/gpio_periph.h"
 #include "soc/pcnt_struct.h"
+#include "soc/pcnt_periph.h"
 #include "unity.h"
 #include "esp_rom_gpio.h"
 
@@ -32,21 +34,6 @@
 #define PCNT_CTRL_HIGH_LEVEL 1
 #define PCNT_CTRL_LOW_LEVEL 0
 
-// The following items only used in the cases that involve LEDC
-#if SOC_LEDC_SUPPORTED
-
-static QueueHandle_t pcnt_evt_queue = NULL;
-
-typedef struct {
-    int zero_times;
-    int h_limit;
-    int l_limit;
-    int h_threshold;
-    int l_threshold;
-    int filter_time;
-} event_times;
-#endif // SOC_LEDC_SUPPORTED
-
 // test PCNT basic configuration
 TEST_CASE("PCNT_test_config", "[pcnt]")
 {
@@ -108,14 +95,25 @@ TEST_CASE("PCNT_test_config", "[pcnt]")
 
 // The following test cases rely on the support of LEDC
 #if SOC_LEDC_SUPPORTED
+// The following items only used in the cases that involve LEDC
+static QueueHandle_t pcnt_evt_queue = NULL;
+
+typedef struct {
+    int zero_times;
+    int h_limit;
+    int l_limit;
+    int h_threshold;
+    int l_threshold;
+    int filter_time;
+} event_times;
 
 static void pcnt_test_io_config(int ctrl_level)
 {
     // Connect internal signals using IO matrix.
     gpio_set_direction(PULSE_IO, GPIO_MODE_INPUT_OUTPUT);
-    esp_rom_gpio_connect_out_signal(PULSE_IO, LEDC_LS_SIG_OUT1_IDX, 0, 0); // LEDC_TIMER_1, LEDC_LOW_SPEED_MODE
+    esp_rom_gpio_connect_out_signal(PULSE_IO, ledc_periph_signal[LEDC_LOW_SPEED_MODE].sig_out0_idx + 1, 0, 0);  // LEDC_CHANNEL_1, LEDC_LOW_SPEED_MODE
-    esp_rom_gpio_connect_in_signal(PULSE_IO, PCNT_SIG_CH0_IN0_IDX, 0); // PCNT_UNIT_0, PCNT_CHANNEL_0
+    esp_rom_gpio_connect_in_signal(PULSE_IO, pcnt_periph_signals.groups[0].units[0].channels[0].pulse_sig, 0);      // PCNT_UNIT_0, PCNT_CHANNEL_0
-    esp_rom_gpio_connect_in_signal(ctrl_level ? GPIO_MATRIX_CONST_ONE_INPUT : GPIO_MATRIX_CONST_ZERO_INPUT, PCNT_CTRL_CH0_IN0_IDX, 0); // PCNT_UNIT_0, PCNT_CHANNEL_0
+    esp_rom_gpio_connect_in_signal(ctrl_level ? GPIO_MATRIX_CONST_ONE_INPUT : GPIO_MATRIX_CONST_ZERO_INPUT, pcnt_periph_signals.groups[0].units[0].channels[0].control_sig, 0); // PCNT_UNIT_0, PCNT_CHANNEL_0
 }
 
 /* use LEDC to produce pulse for PCNT

components/hal/esp32/include/hal/ledc_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -12,6 +12,7 @@
 #include "hal/ledc_types.h"
 #include "soc/ledc_periph.h"
 #include "soc/ledc_struct.h"
+#include "soc/dport_reg.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -40,6 +41,49 @@ extern "C" {
                                                      ((SPEED) == LEDC_HIGH_SPEED_MODE && (CLK) == LEDC_USE_APB_CLK) \
                                                     )
 
+/**
+ * @brief Enable peripheral register clock
+ *
+ * @param enable    Enable/Disable
+ */
+static inline void ledc_ll_enable_bus_clock(bool enable) {
+    if (enable) {
+        DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_LEDC_CLK_EN);
+    } else {
+        DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_LEDC_CLK_EN);
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset whole peripheral register to init value defined by HW design
+ */
+static inline void ledc_ll_enable_reset_reg(bool enable) {
+    if (enable) {
+        DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_LEDC_RST);
+    } else {
+        DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_LEDC_RST);
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_reset_reg(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_reset_reg(__VA_ARGS__)
+
+/**
+ * @brief Enable LEDC function clock
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param en True to enable, false to disable
+ *
+ * @return None
+ */
+static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en) {
+    //resolve for compatibility
+}
 
 /**
  * @brief Set LEDC low speed timer clock

components/hal/esp32c2/include/hal/ledc_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -11,6 +11,7 @@
 
 #include "hal/ledc_types.h"
 #include "soc/ledc_periph.h"
+#include "soc/system_struct.h"
 #include "hal/assert.h"
 
 #ifdef __cplusplus
@@ -34,6 +35,41 @@ extern "C" {
 
 #define LEDC_LL_GLOBAL_CLK_DEFAULT LEDC_SLOW_CLK_RC_FAST
 
+/**
+ * @brief Enable peripheral register clock
+ *
+ * @param enable    Enable/Disable
+ */
+static inline void ledc_ll_enable_bus_clock(bool enable) {
+    SYSTEM.perip_clk_en0.ledc_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset whole peripheral register to init value defined by HW design
+ */
+static inline void ledc_ll_enable_reset_reg(bool enable) {
+    SYSTEM.perip_rst_en0.ledc_rst = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_reset_reg(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_reset_reg(__VA_ARGS__)
+
+/**
+ * @brief Enable LEDC function clock
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param en True to enable, false to disable
+ *
+ * @return None
+ */
+static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en) {
+    //resolve for compatibility
+}
 
 /**
  * @brief Set LEDC low speed timer clock

components/hal/esp32c3/include/hal/ledc_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -12,6 +12,7 @@
 #include "hal/ledc_types.h"
 #include "soc/ledc_periph.h"
 #include "soc/ledc_struct.h"
+#include "soc/system_struct.h"
 #include "hal/assert.h"
 
 #ifdef __cplusplus
@@ -35,6 +36,42 @@ extern "C" {
 
 #define LEDC_LL_GLOBAL_CLK_DEFAULT LEDC_SLOW_CLK_RC_FAST
 
+/**
+ * @brief Enable peripheral register clock
+ *
+ * @param enable    Enable/Disable
+ */
+static inline void ledc_ll_enable_bus_clock(bool enable) {
+    SYSTEM.perip_clk_en0.reg_ledc_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset whole peripheral register to init value defined by HW design
+ */
+static inline void ledc_ll_enable_reset_reg(bool enable) {
+    SYSTEM.perip_rst_en0.reg_ledc_rst = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_reset_reg(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_reset_reg(__VA_ARGS__)
+
+/**
+ * @brief Enable LEDC function clock
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param en True to enable, false to disable
+ *
+ * @return None
+ */
+static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en) {
+    //resolve for compatibility
+}
+
 /**
  * @brief Set LEDC low speed timer clock
  *

components/hal/esp32c6/include/hal/ledc_ll.h

@@ -13,7 +13,9 @@
 #include "soc/ledc_struct.h"
 #include "soc/ledc_reg.h"
 #include "soc/pcr_struct.h"
+#include "soc/clk_tree_defs.h"
 #include "hal/assert.h"
+#include "esp_rom_sys.h"    //for sync issue workaround
 
 #ifdef __cplusplus
 extern "C" {
@@ -27,15 +29,25 @@ extern "C" {
 #define LEDC_LL_HPOINT_VAL_MAX     (LEDC_HPOINT_CH0_V)
 #define LEDC_LL_FRACTIONAL_BITS    (8)
 #define LEDC_LL_FRACTIONAL_MAX     ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
-
+#define LEDC_LL_GLOBAL_CLOCKS      SOC_LEDC_CLKS
-#define LEDC_LL_GLOBAL_CLOCKS { \
-                                LEDC_SLOW_CLK_PLL_DIV, \
-                                LEDC_SLOW_CLK_XTAL, \
-                                LEDC_SLOW_CLK_RC_FAST, \
-                              }
 
 #define LEDC_LL_GLOBAL_CLK_DEFAULT LEDC_SLOW_CLK_RC_FAST
 
+/**
+ * @brief Enable peripheral register clock
+ *
+ * @param enable    Enable/Disable
+ */
+static inline void ledc_ll_enable_bus_clock(bool enable) {
+    PCR.ledc_conf.ledc_clk_en = enable;
+}
+
+/**
+ * @brief Reset whole peripheral register to init value defined by HW design
+ */
+static inline void ledc_ll_enable_reset_reg(bool enable) {
+    PCR.ledc_conf.ledc_rst_en = enable;
+}
 
 /**
  * @brief Enable LEDC function clock
@@ -414,6 +426,35 @@ static inline void ledc_ll_set_duty_range_wr_addr(ledc_dev_t *hw, ledc_mode_t sp
     hw->channel_gamma_group[speed_mode].channel[channel_num].wr_addr.gamma_wr_addr = duty_range;
 }
 
+/**
+ * @brief Function to set fade parameters all-in-one for one range
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param range Gamma fade range index, 0 ~ SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX
+ * @param dir LEDC duty change direction, increase or decrease
+ * @param cycle The duty cycles
+ * @param scale The step scale
+ * @param step The number of increased or decreased times
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_fade_param_range(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint8_t range, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step)
+{
+    // To workaround sync issue
+    // This is to ensure the fade param write to the gamma_wr register would not mess up the last wr_addr
+    ledc_ll_set_duty_range_wr_addr(hw, speed_mode, channel_num, range);
+    esp_rom_delay_us(5);
+
+    ledc_ll_set_fade_param(hw, speed_mode, channel_num, dir, cycle, scale, step);
+    ledc_ll_set_duty_range_wr_addr(hw, speed_mode, channel_num, range);
+
+    // To workaround sync issue
+    // This is to ensure the fade param in gamma_wr register can be written to the correct wr_addr
+    esp_rom_delay_us(5);
+}
+
 /**
  * @brief Set the total number of ranges in one fading
  *
@@ -481,6 +522,29 @@ static inline void ledc_ll_get_fade_param(ledc_dev_t *hw, ledc_mode_t speed_mode
     *step = (val & LEDC_CH0_GAMMA_DUTY_NUM_M) >> LEDC_CH0_GAMMA_DUTY_NUM_S;
 }
 
+/**
+ * @brief Get fade configurations for one range
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param range Gamma fade range index to get, 0 ~ SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX
+ * @param dir Pointer to accept fade direction value
+ * @param cycle Pointer to accept fade cycle value
+ * @param scale Pointer to accept fade scale value
+ * @param step Pointer to accept fade step value
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_fade_param_range(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint8_t range, uint32_t *dir, uint32_t *cycle, uint32_t *scale, uint32_t *step)
+{
+    // On ESP32C6/H2, gamma ram read/write has the APB and LEDC clock domain sync issue
+    // To make sure the parameter read is from the correct gamma ram addr, add a delay in between to ensure syncronization
+    ledc_ll_set_duty_range_rd_addr(hw, speed_mode, channel_num, range);
+    esp_rom_delay_us(5);
+    ledc_ll_get_fade_param(hw, speed_mode, channel_num, dir, cycle, scale, step);
+}
+
 /**
  * @brief Set the output enable
  *

components/hal/esp32h2/include/hal/ledc_ll.h

@@ -13,7 +13,9 @@
 #include "soc/ledc_struct.h"
 #include "soc/ledc_reg.h"
 #include "soc/pcr_struct.h"
+#include "soc/clk_tree_defs.h"
 #include "hal/assert.h"
+#include "esp_rom_sys.h"    //for sync issue workaround
 
 #ifdef __cplusplus
 extern "C" {
@@ -27,13 +29,23 @@ extern "C" {
 #define LEDC_LL_HPOINT_VAL_MAX     (LEDC_HPOINT_CH0_V)
 #define LEDC_LL_FRACTIONAL_BITS    (8)
 #define LEDC_LL_FRACTIONAL_MAX     ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
+#define LEDC_LL_GLOBAL_CLOCKS      SOC_LEDC_CLKS
 
-#define LEDC_LL_GLOBAL_CLOCKS { \
+/**
-                                LEDC_SLOW_CLK_PLL_DIV, \
+ * @brief Enable peripheral register clock
-                                LEDC_SLOW_CLK_XTAL, \
+ *
-                                LEDC_SLOW_CLK_RC_FAST, \
+ * @param enable    Enable/Disable
-                              }
+ */
+static inline void ledc_ll_enable_bus_clock(bool enable) {
+    PCR.ledc_conf.ledc_clk_en = enable;
+}
 
+/**
+ * @brief Reset whole peripheral register to init value defined by HW design
+ */
+static inline void ledc_ll_enable_reset_reg(bool enable) {
+    PCR.ledc_conf.ledc_rst_en = enable;
+}
 
 /**
  * @brief Enable LEDC function clock
@@ -412,6 +424,35 @@ static inline void ledc_ll_set_duty_range_wr_addr(ledc_dev_t *hw, ledc_mode_t sp
     hw->channel_gamma_group[speed_mode].channel[channel_num].wr_addr.gamma_wr_addr = duty_range;
 }
 
+/**
+ * @brief Function to set fade parameters all-in-one for one range
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param range Gamma fade range index, 0 ~ SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX
+ * @param dir LEDC duty change direction, increase or decrease
+ * @param cycle The duty cycles
+ * @param scale The step scale
+ * @param step The number of increased or decreased times
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_fade_param_range(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint8_t range, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step)
+{
+    // To workaround sync issue
+    // This is to ensure the fade param write to the gamma_wr register would not mess up the last wr_addr
+    ledc_ll_set_duty_range_wr_addr(hw, speed_mode, channel_num, range);
+    esp_rom_delay_us(5);
+
+    ledc_ll_set_fade_param(hw, speed_mode, channel_num, dir, cycle, scale, step);
+    ledc_ll_set_duty_range_wr_addr(hw, speed_mode, channel_num, range);
+
+    // To workaround sync issue
+    // This is to ensure the fade param in gamma_wr register can be written to the correct wr_addr
+    esp_rom_delay_us(5);
+}
+
 /**
  * @brief Set the total number of ranges in one fading
  *
@@ -479,6 +520,29 @@ static inline void ledc_ll_get_fade_param(ledc_dev_t *hw, ledc_mode_t speed_mode
     *step = (val & LEDC_CH0_GAMMA_DUTY_NUM_M) >> LEDC_CH0_GAMMA_DUTY_NUM_S;
 }
 
+/**
+ * @brief Get fade configurations for one range
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param range Gamma fade range index to get, 0 ~ SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX
+ * @param dir Pointer to accept fade direction value
+ * @param cycle Pointer to accept fade cycle value
+ * @param scale Pointer to accept fade scale value
+ * @param step Pointer to accept fade step value
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_fade_param_range(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint8_t range, uint32_t *dir, uint32_t *cycle, uint32_t *scale, uint32_t *step)
+{
+    // On ESP32C6/H2, gamma ram read/write has the APB and LEDC clock domain sync issue
+    // To make sure the parameter read is from the correct gamma ram addr, add a delay in between to ensure syncronization
+    ledc_ll_set_duty_range_rd_addr(hw, speed_mode, channel_num, range);
+    esp_rom_delay_us(5);
+    ledc_ll_get_fade_param(hw, speed_mode, channel_num, dir, cycle, scale, step);
+}
+
 /**
  * @brief Set the output enable
  *

components/hal/esp32p4/include/hal/clk_gate_ll.h

@@ -50,8 +50,6 @@ static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
         return HP_SYS_CLKRST_REG_CAM_CLK_EN;
     case PERIPH_SYSTIMER_MODULE:
         return HP_SYS_CLKRST_REG_SYSTIMER_CLK_EN;
-    case PERIPH_LEDC_MODULE:
-        return HP_SYS_CLKRST_REG_LEDC_CLK_EN;
     case PERIPH_SARADC_MODULE:
         return HP_SYS_CLKRST_REG_ADC_CLK_EN;
     case PERIPH_PVT_MODULE:
@@ -117,8 +115,6 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
         return HP_SYS_CLKRST_REG_RST_EN_CAN1;
     case PERIPH_TWAI2_MODULE:
         return HP_SYS_CLKRST_REG_RST_EN_CAN2;
-    case PERIPH_LEDC_MODULE:
-        return HP_SYS_CLKRST_REG_RST_EN_LEDC;
     case PERIPH_LCD_MODULE:
         return HP_SYS_CLKRST_REG_RST_EN_LCDCAM;
     case PERIPH_SARADC_MODULE:
@@ -188,8 +184,6 @@ static inline uint32_t periph_ll_get_clk_en_reg(periph_module_t periph)
     case PERIPH_CAM_MODULE:
         return HP_SYS_CLKRST_PERI_CLK_CTRL119_REG;
     case PERIPH_SYSTIMER_MODULE:
-    case PERIPH_LEDC_MODULE:
-        return HP_SYS_CLKRST_PERI_CLK_CTRL21_REG;
     case PERIPH_SARADC_MODULE:
         return HP_SYS_CLKRST_PERI_CLK_CTRL22_REG;
     case PERIPH_PVT_MODULE:
@@ -232,7 +226,6 @@ static inline uint32_t periph_ll_get_rst_en_reg(periph_module_t periph)
     case PERIPH_TWAI0_MODULE:
     case PERIPH_TWAI1_MODULE:
     case PERIPH_TWAI2_MODULE:
-    case PERIPH_LEDC_MODULE:
     case PERIPH_CAM_MODULE:
     case PERIPH_SARADC_MODULE:
     case PERIPH_AES_MODULE:

components/hal/esp32p4/include/hal/ledc_ll.h

@@ -0,0 +1,568 @@
+/*
+ * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+// The LL layer for LEDC register operations.
+// Note that most of the register operations in this layer are non-atomic operations.
+
+#pragma once
+
+#include "hal/assert.h"
+#include "hal/ledc_types.h"
+#include "soc/ledc_struct.h"
+#include "soc/ledc_reg.h"
+#include "soc/clk_tree_defs.h"
+#include "soc/hp_sys_clkrst_struct.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LEDC_LL_GET_HW()           &LEDC
+
+#define LEDC_LL_DUTY_NUM_MAX       (LEDC_CH0_GAMMA_RANGE0_DUTY_NUM_V)
+#define LEDC_LL_DUTY_CYCLE_MAX     (LEDC_CH0_GAMMA_RANGE0_DUTY_CYCLE_V)
+#define LEDC_LL_DUTY_SCALE_MAX     (LEDC_CH0_GAMMA_RANGE0_SCALE_V)
+#define LEDC_LL_HPOINT_VAL_MAX     (LEDC_HPOINT_CH0_V)
+#define LEDC_LL_FRACTIONAL_BITS    (8)
+#define LEDC_LL_FRACTIONAL_MAX     ((1 << LEDC_LL_FRACTIONAL_BITS) - 1)
+#define LEDC_LL_GLOBAL_CLOCKS      SOC_LEDC_CLKS
+
+/**
+ * @brief Enable peripheral register clock
+ *
+ * @param enable    Enable/Disable
+ */
+static inline void ledc_ll_enable_bus_clock(bool enable) {
+    HP_SYS_CLKRST.soc_clk_ctrl3.reg_ledc_apb_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset whole peripheral register to init value defined by HW design
+ */
+static inline void ledc_ll_enable_reset_reg(bool enable) {
+    HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_ledc = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_reset_reg(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_reset_reg(__VA_ARGS__)
+
+/**
+ * @brief Enable LEDC function clock
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param en True to enable, false to disable
+ *
+ * @return None
+ */
+static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en) {
+    (void)hw;
+    HP_SYS_CLKRST.peri_clk_ctrl22.reg_ledc_clk_en = en;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_clock(__VA_ARGS__)
+
+/**
+ * @brief Set LEDC low speed timer clock
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param slow_clk_sel LEDC low speed timer clock source
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_slow_clk_sel(ledc_dev_t *hw, ledc_slow_clk_sel_t slow_clk_sel)
+{
+    (void) hw;
+    uint32_t clk_sel_val = 3;
+    switch (slow_clk_sel)
+    {
+    case LEDC_SLOW_CLK_XTAL:
+        clk_sel_val = 0;
+        break;
+    case LEDC_SLOW_CLK_RC_FAST:
+        clk_sel_val = 1;
+        break;
+    case LEDC_SLOW_CLK_PLL_DIV:
+        clk_sel_val = 2;
+        break;
+    default:
+        abort();
+    }
+
+    HP_SYS_CLKRST.peri_clk_ctrl22.reg_ledc_clk_src_sel = clk_sel_val;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_set_slow_clk_sel(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_set_slow_clk_sel(__VA_ARGS__)
+
+/**
+ * @brief Get LEDC low speed timer clock
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param slow_clk_sel LEDC low speed timer clock source
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_slow_clk_sel(ledc_dev_t *hw, ledc_slow_clk_sel_t *slow_clk_sel)
+{
+    (void) hw;
+    switch (HP_SYS_CLKRST.peri_clk_ctrl22.reg_ledc_clk_src_sel)
+    {
+    case 0:
+        *slow_clk_sel = LEDC_SLOW_CLK_XTAL;
+        break;
+    case 1:
+        *slow_clk_sel = LEDC_SLOW_CLK_RC_FAST;
+        break;
+    case 2:
+        *slow_clk_sel = LEDC_SLOW_CLK_PLL_DIV;
+        break;
+    default:
+        abort();
+    }
+}
+
+/**
+ * @brief Update LEDC low speed timer
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_ls_timer_update(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel)
+{
+    hw->timer_group[speed_mode].timer[timer_sel].conf.para_up = 1;
+    // Here, we don't wait for the bit gets cleared since it can take quite long depends on the pwm frequency
+}
+
+/**
+ * @brief Reset LEDC timer
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_timer_rst(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel)
+{
+    hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 1;
+    hw->timer_group[speed_mode].timer[timer_sel].conf.rst = 0;
+}
+
+/**
+ * @brief Pause LEDC timer
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_timer_pause(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel)
+{
+    hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 1;
+}
+
+/**
+ * @brief Resume LEDC timer
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_timer_resume(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel)
+{
+    hw->timer_group[speed_mode].timer[timer_sel].conf.pause = 0;
+}
+
+/**
+ * @brief Set LEDC timer clock divider
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param clock_divider Timer clock divide value, the timer clock is divided from the selected clock source
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_clock_divider(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t clock_divider)
+{
+    hw->timer_group[speed_mode].timer[timer_sel].conf.clk_div = clock_divider;
+}
+
+/**
+ * @brief Get LEDC timer clock divider
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param clock_divider Timer clock divide value, the timer clock is divided from the selected clock source
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_clock_divider(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t *clock_divider)
+{
+    *clock_divider = hw->timer_group[speed_mode].timer[timer_sel].conf.clk_div;
+}
+
+/**
+ * @brief Get LEDC timer clock source
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param clk_src Pointer to accept the timer clock source
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_clock_source(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, ledc_clk_src_t *clk_src)
+{
+    // The target has no timer-specific clock source option
+    HAL_ASSERT(hw->timer_group[speed_mode].timer[timer_sel].conf.tick_sel == 0);
+    *clk_src = LEDC_SCLK;
+}
+
+/**
+ * @brief Set LEDC duty resolution
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param duty_resolution Resolution of duty setting in number of bits. The range of duty values is [0, (2**duty_resolution)]
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_duty_resolution(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t duty_resolution)
+{
+    hw->timer_group[speed_mode].timer[timer_sel].conf.duty_res = duty_resolution;
+}
+
+/**
+ * @brief Get LEDC duty resolution
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param duty_resolution Pointer to accept the resolution of duty setting in number of bits.
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_duty_resolution(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t *duty_resolution)
+{
+    *duty_resolution = hw->timer_group[speed_mode].timer[timer_sel].conf.duty_res;
+}
+
+/**
+ * @brief Get LEDC max duty
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ * @param max_duty Pointer to accept the max duty
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_max_duty(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_timer_t timer_sel, uint32_t *max_duty)
+{
+    *max_duty = (1 << (hw->timer_group[speed_mode].timer[timer_sel].conf.duty_res));
+}
+
+/**
+ * @brief Update channel configure when select low speed mode
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_ls_channel_update(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf0.para_up = 1;
+}
+
+/**
+ * @brief Set LEDC hpoint value
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param hpoint_val LEDC hpoint value(max: 0xfffff)
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_hpoint(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t hpoint_val)
+{
+    hw->channel_group[speed_mode].channel[channel_num].hpoint.hpoint = hpoint_val;
+}
+
+/**
+ * @brief Get LEDC hpoint value
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param hpoint_val Pointer to accept the LEDC hpoint value(max: 0xfffff)
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_hpoint(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *hpoint_val)
+{
+    *hpoint_val = hw->channel_group[speed_mode].channel[channel_num].hpoint.hpoint;
+}
+
+/**
+ * @brief Set LEDC the integer part of duty value
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param duty_val LEDC duty value, the range of duty setting is [0, (2**duty_resolution)]
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_duty_int_part(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t duty_val)
+{
+    hw->channel_group[speed_mode].channel[channel_num].duty_init.duty = duty_val << 4;
+}
+
+/**
+ * @brief Get LEDC duty value
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param duty_val Pointer to accept the LEDC duty value
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_duty(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *duty_val)
+{
+    *duty_val = (hw->channel_group[speed_mode].channel[channel_num].duty_r.duty >> 4);
+}
+
+/**
+ * @brief Function to set fade parameters all-in-one
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param range Gamma fade range index, 0 ~ SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX
+ * @param dir LEDC duty change direction, increase or decrease
+ * @param cycle The duty cycles
+ * @param scale The step scale
+ * @param step The number of increased or decreased times
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_fade_param_range(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint8_t range, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step)
+{
+    ledc_channel_gamma_fade_param_t range_param = {
+        .duty_inc = dir,
+        .duty_cycle = cycle,
+        .scale = scale,
+        .duty_num = step,
+    };
+    LEDC_GAMMA_RAM.channel[channel_num].entry[range].val = range_param.val;
+}
+
+/**
+ * @brief Set the total number of ranges in one fading
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param range_num Total number of ranges (1 - SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX) of the fading configured
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_range_number(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t range_num)
+{
+    hw->chn_gamma_conf[channel_num].ch0_gamma_entry_num = range_num;
+}
+
+/**
+ * @brief Get the total number of ranges in one fading
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param range_num Pointer to accept fade range number
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_range_number(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t *range_num)
+{
+    *range_num = hw->chn_gamma_conf[channel_num].ch0_gamma_entry_num;
+}
+
+/**
+ * @brief Get fade configurations in gamma_rd register
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param range Gamma fade range index to get, 0 ~ SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX
+ * @param dir Pointer to accept fade direction value
+ * @param cycle Pointer to accept fade cycle value
+ * @param scale Pointer to accept fade scale value
+ * @param step Pointer to accept fade step value
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_fade_param_range(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint8_t range, uint32_t *dir, uint32_t *cycle, uint32_t *scale, uint32_t *step)
+{
+    ledc_channel_gamma_fade_param_t range_param = {
+        .val = LEDC_GAMMA_RAM.channel[channel_num].entry[range].val,
+    };
+
+    *dir = range_param.duty_inc;
+    *cycle = range_param.duty_cycle;
+    *scale = range_param.scale;
+    *step = range_param.duty_num;
+}
+
+/**
+ * @brief Set the output enable
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param sig_out_en The output enable status
+ *
+ * @return None
+ */
+__attribute__((always_inline))
+static inline void ledc_ll_set_sig_out_en(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool sig_out_en)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf0.sig_out_en = sig_out_en;
+}
+
+/**
+ * @brief Set the duty start
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param duty_start The duty start
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_duty_start(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool duty_start)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf1.duty_start = duty_start;
+}
+
+/**
+ * @brief Set output idle level
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param idle_level The output idle level
+ *
+ * @return None
+ */
+__attribute__((always_inline))
+static inline void ledc_ll_set_idle_level(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, uint32_t idle_level)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf0.idle_lv = idle_level & 0x1;
+}
+
+/**
+ * @brief Set fade end interrupt enable
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param fade_end_intr_en The fade end interrupt enable status
+ *
+ * @return None
+ */
+static inline void ledc_ll_set_fade_end_intr(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, bool fade_end_intr_en)
+{
+    uint32_t value = hw->int_ena.val;
+    uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S;
+    hw->int_ena.val = fade_end_intr_en ? (value | BIT(int_en_base + channel_num)) : (value & (~(BIT(int_en_base + channel_num))));
+}
+
+/**
+ * @brief Get fade end interrupt status
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param intr_status The fade end interrupt status
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, uint32_t *intr_status)
+{
+    uint32_t value = hw->int_st.val;
+    uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S;
+    *intr_status = (value >> int_en_base) & 0xff;
+}
+
+/**
+ * @brief Clear fade end interrupt status
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_clear_fade_end_intr_status(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num)
+{
+    uint32_t int_en_base = LEDC_DUTY_CHNG_END_CH0_INT_ENA_S;
+    hw->int_clr.val = BIT(int_en_base + channel_num);
+}
+
+/**
+ * @brief Set timer index of the specified channel
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param timer_sel LEDC timer index (0-3), select from ledc_timer_t
+ *
+ * @return None
+ */
+static inline void ledc_ll_bind_channel_timer(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, ledc_timer_t timer_sel)
+{
+    hw->channel_group[speed_mode].channel[channel_num].conf0.timer_sel = timer_sel;
+}
+
+/**
+ * @brief Get timer index of the specified channel
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param speed_mode LEDC speed_mode, low-speed mode only
+ * @param channel_num LEDC channel index (0-5), select from ledc_channel_t
+ * @param timer_sel Pointer to accept the LEDC timer index
+ *
+ * @return None
+ */
+static inline void ledc_ll_get_channel_timer(ledc_dev_t *hw, ledc_mode_t speed_mode, ledc_channel_t channel_num, ledc_timer_t *timer_sel)
+{
+    *timer_sel = (ledc_timer_t)(hw->channel_group[speed_mode].channel[channel_num].conf0.timer_sel);
+}
+
+#ifdef __cplusplus
+}
+#endif

components/hal/esp32s2/include/hal/ledc_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -12,6 +12,7 @@
 #include "hal/ledc_types.h"
 #include "soc/ledc_periph.h"
 #include "soc/ledc_struct.h"
+#include "soc/dport_reg.h"
 #include "hal/assert.h"
 
 #ifdef __cplusplus
@@ -40,6 +41,49 @@ extern "C" {
 
 #define LEDC_LL_GLOBAL_CLK_DEFAULT LEDC_SLOW_CLK_RC_FAST
 
+/**
+ * @brief Enable peripheral register clock
+ *
+ * @param enable    Enable/Disable
+ */
+static inline void ledc_ll_enable_bus_clock(bool enable) {
+    if (enable) {
+        DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_LEDC_CLK_EN);
+    } else {
+        DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_LEDC_CLK_EN);
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset whole peripheral register to init value defined by HW design
+ */
+static inline void ledc_ll_enable_reset_reg(bool enable) {
+    if (enable) {
+        DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_LEDC_RST);
+    } else {
+        DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_LEDC_RST);
+    }
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_reset_reg(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_reset_reg(__VA_ARGS__)
+
+/**
+ * @brief Enable LEDC function clock
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param en True to enable, false to disable
+ *
+ * @return None
+ */
+static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en) {
+    //resolve for compatibility
+}
 
 /**
  * @brief Set LEDC low speed timer clock

components/hal/esp32s3/include/hal/ledc_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -12,6 +12,7 @@
 #include "hal/ledc_types.h"
 #include "soc/ledc_periph.h"
 #include "soc/ledc_struct.h"
+#include "soc/system_struct.h"
 #include "hal/assert.h"
 
 #ifdef __cplusplus
@@ -35,6 +36,41 @@ extern "C" {
 
 #define LEDC_LL_GLOBAL_CLK_DEFAULT LEDC_SLOW_CLK_RC_FAST
 
+/**
+ * @brief Enable peripheral register clock
+ *
+ * @param enable    Enable/Disable
+ */
+static inline void ledc_ll_enable_bus_clock(bool enable) {
+    SYSTEM.perip_clk_en0.ledc_clk_en = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_bus_clock(__VA_ARGS__)
+
+/**
+ * @brief Reset whole peripheral register to init value defined by HW design
+ */
+static inline void ledc_ll_enable_reset_reg(bool enable) {
+    SYSTEM.perip_rst_en0.ledc_rst = enable;
+}
+
+/// use a macro to wrap the function, force the caller to use it in a critical section
+/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
+#define ledc_ll_enable_reset_reg(...) (void)__DECLARE_RCC_ATOMIC_ENV; ledc_ll_enable_reset_reg(__VA_ARGS__)
+
+/**
+ * @brief Enable LEDC function clock
+ *
+ * @param hw Beginning address of the peripheral registers
+ * @param en True to enable, false to disable
+ *
+ * @return None
+ */
+static inline void ledc_ll_enable_clock(ledc_dev_t *hw, bool en) {
+    //resolve for compatibility
+}
 
 /**
  * @brief Set LEDC low speed timer clock

components/hal/include/hal/ledc_hal.h

@@ -302,50 +302,6 @@ void ledc_hal_set_hpoint(ledc_hal_context_t *hal, ledc_channel_t channel_num, ui
  */
 void ledc_hal_get_duty(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t *duty_val);
 
-/**
- * @brief Set LEDC duty change direction
- *
- * @param hal Context of the HAL layer
- * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
- * @param duty_direction LEDC duty change direction, increase or decrease
- *
- * @return None
- */
-void ledc_hal_set_duty_direction(ledc_hal_context_t *hal, ledc_channel_t channel_num, ledc_duty_direction_t duty_direction);
-
-/**
- * @brief Set the number of increased or decreased times
- *
- * @param hal Context of the HAL layer
- * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
- * @param duty_num The number of increased or decreased times
- *
- * @return None
- */
-void ledc_hal_set_duty_num(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_num);
-
-/**
- * @brief Set the duty cycles of increase or decrease
- *
- * @param hal Context of the HAL layer
- * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
- * @param duty_cycle The duty cycles
- *
- * @return None
- */
-void ledc_hal_set_duty_cycle(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_cycle);
-
-/**
- * @brief Set the step scale of increase or decrease
- *
- * @param hal Context of the HAL layer
- * @param channel_num LEDC channel index (0-7), select from ledc_channel_t
- * @param duty_scale The step scale
- *
- * @return None
- */
-void ledc_hal_set_duty_scale(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_scale);
-
 /**
  * @brief Function to set fade parameters all-in-one
  *

components/hal/ledc_hal.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -59,12 +59,6 @@ void ledc_hal_get_clk_cfg(ledc_hal_context_t *hal, ledc_timer_t timer_sel, ledc_
 #if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
 void ledc_hal_get_fade_param(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t range, uint32_t *dir, uint32_t *cycle, uint32_t *scale, uint32_t *step)
 {
-    ledc_ll_set_duty_range_rd_addr(hal->dev, hal->speed_mode, channel_num, range);
+    ledc_ll_get_fade_param_range(hal->dev, hal->speed_mode, channel_num, range, dir, cycle, scale, step);
-#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
-    // On ESP32C6/H2, gamma ram read/write has the APB and LEDC clock domain sync issue
-    // To make sure the parameter read is from the correct gamma ram addr, add a delay in between to ensure syncronization
-    esp_rom_delay_us(5);
-#endif
-    ledc_ll_get_fade_param(hal->dev, hal->speed_mode, channel_num, dir, cycle, scale, step);
 }
 #endif

components/hal/ledc_hal_iram.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2023 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -36,46 +36,11 @@ void ledc_hal_get_duty(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint
     ledc_ll_get_duty(hal->dev, hal->speed_mode, channel_num, duty_val);
 }
 
-void ledc_hal_set_duty_direction(ledc_hal_context_t *hal, ledc_channel_t channel_num, ledc_duty_direction_t duty_direction)
-{
-    ledc_ll_set_duty_direction(hal->dev, hal->speed_mode, channel_num, duty_direction);
-}
-
-void ledc_hal_set_duty_num(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_num)
-{
-    ledc_ll_set_duty_num(hal->dev, hal->speed_mode, channel_num, duty_num);
-}
-
-void ledc_hal_set_duty_cycle(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_cycle)
-{
-    ledc_ll_set_duty_cycle(hal->dev, hal->speed_mode, channel_num, duty_cycle);
-}
-
-void ledc_hal_set_duty_scale(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_scale)
-{
-    ledc_ll_set_duty_scale(hal->dev, hal->speed_mode, channel_num, duty_scale);
-}
-
 void ledc_hal_set_fade_param(const ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t range, uint32_t dir, uint32_t cycle, uint32_t scale, uint32_t step)
 {
 #if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
     HAL_ASSERT(range < SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX);
-
+    ledc_ll_set_fade_param_range(hal->dev, hal->speed_mode, channel_num, range, dir, cycle, scale, step);
-#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
-    // To workaround sync issue (C6, H2)
-    // This is to ensure the fade param write to the gamma_wr register would not mess up the last wr_addr
-    ledc_ll_set_duty_range_wr_addr(hal->dev, hal->speed_mode, channel_num, range);
-    esp_rom_delay_us(5);
-#endif
-
-    ledc_ll_set_fade_param(hal->dev, hal->speed_mode, channel_num, dir, cycle, scale, step);
-    ledc_ll_set_duty_range_wr_addr(hal->dev, hal->speed_mode, channel_num, range);
-#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
-    // To workaround sync issue (C6, H2)
-    // This is to ensure the fade param in gamma_wr register can be written to the correct wr_addr
-    esp_rom_delay_us(5);
-#endif
-
 #else // !SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
     HAL_ASSERT(range == 0);
     ledc_ll_set_fade_param(hal->dev, hal->speed_mode, channel_num, dir, cycle, scale, step);
@@ -83,10 +48,6 @@ void ledc_hal_set_fade_param(const ledc_hal_context_t *hal, ledc_channel_t chann
 }
 
 #if SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
-void ledc_hal_set_duty_range_wr_addr(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t duty_range)
-{
-    ledc_ll_set_duty_range_wr_addr(hal->dev, hal->speed_mode, channel_num, duty_range);
-}
 
 void ledc_hal_set_range_number(ledc_hal_context_t *hal, ledc_channel_t channel_num, uint32_t range_num)
 {

components/soc/esp32p4/include/soc/Kconfig.soc_caps.in

@@ -79,6 +79,10 @@ config SOC_GPSPI_SUPPORTED
     bool
     default y
 
+config SOC_LEDC_SUPPORTED
+    bool
+    default y
+
 config SOC_I2C_SUPPORTED
     bool
     default y
@@ -525,19 +529,27 @@ config SOC_LEDC_SUPPORT_XTAL_CLOCK
 
 config SOC_LEDC_CHANNEL_NUM
     int
-    default 6
+    default 8
 
 config SOC_LEDC_TIMER_BIT_WIDTH
     int
     default 20
 
+config SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED
+    bool
+    default y
+
+config SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX
+    int
+    default 16
+
 config SOC_LEDC_SUPPORT_FADE_STOP
     bool
     default y
 
-config SOC_LEDC_GAMMA_FADE_RANGE_MAX
+config SOC_LEDC_FADE_PARAMS_BIT_WIDTH
     int
-    default 16
+    default 10
 
 config SOC_MMU_PAGE_SIZE_CONFIGURABLE
     bool

components/soc/esp32p4/include/soc/clk_tree_defs.h

@@ -485,7 +485,6 @@ typedef enum {
 
 //////////////////////////////////////////////////LEDC/////////////////////////////////////////////////////////////////
 
-//TODO: IDF-6510
 /**
  * @brief Array initializer for all supported clock sources of LEDC
  */
@@ -496,11 +495,9 @@ typedef enum {
  */
 typedef enum {
     LEDC_AUTO_CLK = 0,                              /*!< LEDC source clock will be automatically selected based on the giving resolution and duty parameter when init the timer*/
+    LEDC_USE_XTAL_CLK = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
     LEDC_USE_PLL_DIV_CLK = SOC_MOD_CLK_PLL_F80M,    /*!< Select PLL_F80M clock as the source clock */
     LEDC_USE_RC_FAST_CLK = SOC_MOD_CLK_RC_FAST,     /*!< Select RC_FAST as the source clock */
-    LEDC_USE_XTAL_CLK = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
-
-    LEDC_USE_RTC8M_CLK __attribute__((deprecated("please use 'LEDC_USE_RC_FAST_CLK' instead"))) = LEDC_USE_RC_FAST_CLK,   /*!< Alias of 'LEDC_USE_RC_FAST_CLK' */
 } soc_periph_ledc_clk_src_legacy_t;
 
 //////////////////////////////////////////////////PARLIO////////////////////////////////////////////////////////////////

components/soc/esp32p4/include/soc/ledc_struct.h

@@ -16,42 +16,42 @@ extern "C" {
  */
 typedef union {
     struct {
-        /** timer_sel_ch0 : R/W; bitpos: [1:0]; default: 0;
+        /** timer_sel : R/W; bitpos: [1:0]; default: 0;
          *  Configures which timer is channel n selected.\\0: Select timer0\\1: Select
          *  timer1\\2: Select timer2\\3: Select timer3
          */
-        uint32_t timer_sel_ch0:2;
+        uint32_t timer_sel:2;
-        /** sig_out_en_ch0 : R/W; bitpos: [2]; default: 0;
+        /** sig_out_en : R/W; bitpos: [2]; default: 0;
          *  Configures whether or not to enable signal output on channel n.\\0: Signal output
          *  disable\\1: Signal output enable
          */
-        uint32_t sig_out_en_ch0:1;
+        uint32_t sig_out_en:1;
-        /** idle_lv_ch0 : R/W; bitpos: [3]; default: 0;
+        /** idle_lv : R/W; bitpos: [3]; default: 0;
          *  Configures the output value when channel n is inactive. Valid only when
          *  LEDC_SIG_OUT_EN_CHn is 0.\\0: Output level is low\\1: Output level is high
          */
-        uint32_t idle_lv_ch0:1;
+        uint32_t idle_lv:1;
-        /** para_up_ch0 : WT; bitpos: [4]; default: 0;
+        /** para_up : WT; bitpos: [4]; default: 0;
          *  Configures whether or not to update LEDC_HPOINT_CHn, LEDC_DUTY_START_CHn,
          *  LEDC_SIG_OUT_EN_CHn, LEDC_TIMER_SEL_CHn, LEDC_DUTY_NUM_CHn, LEDC_DUTY_CYCLE_CHn,
          *  LEDC_DUTY_SCALE_CHn, LEDC_DUTY_INC_CHn, and LEDC_OVF_CNT_EN_CHn fields for channel
          *  n, and will be automatically cleared by hardware.\\0: Invalid. No effect\\1: Update
          */
-        uint32_t para_up_ch0:1;
+        uint32_t para_up:1;
-        /** ovf_num_ch0 : R/W; bitpos: [14:5]; default: 0;
+        /** ovf_num : R/W; bitpos: [14:5]; default: 0;
          *  Configures the maximum times of overflow minus 1.The LEDC_OVF_CNT_CHn_INT interrupt
          *  will be triggered when channel n overflows for (LEDC_OVF_NUM_CHn + 1) times.
          */
-        uint32_t ovf_num_ch0:10;
+        uint32_t ovf_num:10;
-        /** ovf_cnt_en_ch0 : R/W; bitpos: [15]; default: 0;
+        /** ovf_cnt_en : R/W; bitpos: [15]; default: 0;
          *  Configures whether or not to enable the ovf_cnt of channel n.\\0: Disable\\1: Enable
          */
-        uint32_t ovf_cnt_en_ch0:1;
+        uint32_t ovf_cnt_en:1;
-        /** ovf_cnt_reset_ch0 : WT; bitpos: [16]; default: 0;
+        /** ovf_cnt_reset : WT; bitpos: [16]; default: 0;
          *  Configures whether or not to reset the  ovf_cnt of channel n.\\0: Invalid. No
          *  effect\\1: Reset the ovf_cnt
          */
-        uint32_t ovf_cnt_reset_ch0:1;
+        uint32_t ovf_cnt_reset:1;
         uint32_t reserved_17:15;
     };
     uint32_t val;
@@ -62,11 +62,11 @@ typedef union {
  */
 typedef union {
     struct {
-        /** hpoint_ch0 : R/W; bitpos: [19:0]; default: 0;
+        /** hpoint : R/W; bitpos: [19:0]; default: 0;
          *  Configures high point of signal output on channel n. The output value changes to
          *  high when the selected timers has reached the value specified by this register.
          */
-        uint32_t hpoint_ch0:20;
+        uint32_t hpoint:20;
         uint32_t reserved_20:12;
     };
     uint32_t val;
@@ -77,10 +77,10 @@ typedef union {
  */
 typedef union {
     struct {
-        /** duty_ch0 : R/W; bitpos: [24:0]; default: 0;
+        /** duty : R/W; bitpos: [24:0]; default: 0;
          *  Configures the duty of signal output on channel n.
          */
-        uint32_t duty_ch0:25;
+        uint32_t duty:25;
         uint32_t reserved_25:7;
     };
     uint32_t val;
@@ -92,11 +92,11 @@ typedef union {
 typedef union {
     struct {
         uint32_t reserved_0:31;
-        /** duty_start_ch0 : R/W/SC; bitpos: [31]; default: 0;
+        /** duty_start : R/W/SC; bitpos: [31]; default: 0;
          *  Configures whether the duty cycle fading configurations take effect.\\0: Not take
          *  effect\\1: Take effect
          */
-        uint32_t duty_start_ch0:1;
+        uint32_t duty_start:1;
     };
     uint32_t val;
 } ledc_chn_conf1_reg_t;
@@ -109,7 +109,7 @@ typedef union {
         /** duty_ch0_r : RO; bitpos: [24:0]; default: 0;
          *  Represents the current duty of output signal on channel n.
          */
-        uint32_t duty_ch0_r:25;
+        uint32_t duty:25;
         uint32_t reserved_25:7;
     };
     uint32_t val;
@@ -122,33 +122,33 @@ typedef union {
  */
 typedef union {
     struct {
-        /** timer0_duty_res : R/W; bitpos: [4:0]; default: 0;
+        /** duty_res : R/W; bitpos: [4:0]; default: 0;
          *  Configures the range of the counter in timer n.
          */
-        uint32_t timer0_duty_res:5;
+        uint32_t duty_res:5;
-        /** clk_div_timer0 : R/W; bitpos: [22:5]; default: 0;
+        /** clk_div : R/W; bitpos: [22:5]; default: 0;
          *  Configures the divisor for the divider in timer n.The least significant eight bits
          *  represent the fractional part.
          */
-        uint32_t clk_div_timer0:18;
+        uint32_t clk_div:18;
-        /** timer0_pause : R/W; bitpos: [23]; default: 0;
+        /** pause : R/W; bitpos: [23]; default: 0;
          *  Configures whether or not to pause the counter in timer n.\\0: Normal\\1: Pause
          */
-        uint32_t timer0_pause:1;
+        uint32_t pause:1;
-        /** timer0_rst : R/W; bitpos: [24]; default: 1;
+        /** rst : R/W; bitpos: [24]; default: 1;
          *  Configures whether or not to reset timer n. The counter will show 0 after
          *  reset.\\0: Not reset\\1: Reset
          */
-        uint32_t timer0_rst:1;
+        uint32_t rst:1;
-        /** tick_sel_timer0 : R/W; bitpos: [25]; default: 0;
+        /** tick_sel : R/W; bitpos: [25]; default: 0;
          *  Configures which clock is timer n selected. Unused.
          */
-        uint32_t tick_sel_timer0:1;
+        uint32_t tick_sel:1;
-        /** timer0_para_up : WT; bitpos: [26]; default: 0;
+        /** para_up : WT; bitpos: [26]; default: 0;
          *  Configures whether or not to update LEDC_CLK_DIV_TIMERn and
          *  LEDC_TIMERn_DUTY_RES.\\0: Invalid. No effect\\1: Update
          */
-        uint32_t timer0_para_up:1;
+        uint32_t para_up:1;
         uint32_t reserved_27:5;
     };
     uint32_t val;
@@ -159,10 +159,10 @@ typedef union {
  */
 typedef union {
     struct {
-        /** timer0_cnt : RO; bitpos: [19:0]; default: 0;
+        /** cnt : RO; bitpos: [19:0]; default: 0;
          *  Represents the current counter value of timer n.
          */
-        uint32_t timer0_cnt:20;
+        uint32_t cnt:20;
         uint32_t reserved_20:12;
     };
     uint32_t val;
@@ -1088,7 +1088,7 @@ typedef union {
         /** timer0_cnt_cap : RO; bitpos: [19:0]; default: 0;
          *  Represents the captured LEDC timern count value.
          */
-        uint32_t timer0_cnt_cap:20;
+        uint32_t timer_cnt_cap:20;
         uint32_t reserved_20:12;
     };
     uint32_t val;
@@ -1181,11 +1181,11 @@ typedef union {
 } ledc_date_reg_t;
 
 typedef struct {
-    volatile ledc_chn_conf0_reg_t ch0_conf0;
+    volatile ledc_chn_conf0_reg_t conf0;
-    volatile ledc_chn_hpoint_reg_t ch0_hpoint;
+    volatile ledc_chn_hpoint_reg_t hpoint;
-    volatile ledc_chn_duty_reg_t ch0_duty;
+    volatile ledc_chn_duty_reg_t duty_init;
-    volatile ledc_chn_conf1_reg_t ch0_conf1;
+    volatile ledc_chn_conf1_reg_t conf1;
-    volatile ledc_chn_duty_r_reg_t ch0_duty_r;
+    volatile ledc_chn_duty_r_reg_t duty_r;
 } ledc_chn_reg_t;
 
 typedef struct {
@@ -1193,8 +1193,8 @@ typedef struct {
 } ledc_ch_group_reg_t;
 
 typedef struct {
-    volatile ledc_timern_conf_reg_t timer0_conf;
+    volatile ledc_timern_conf_reg_t conf;
-    volatile ledc_timern_value_reg_t timer0_value;
+    volatile ledc_timern_value_reg_t value;
 } ledc_timerx_reg_t;
 
 typedef struct {
@@ -1205,7 +1205,7 @@ typedef struct {
     volatile ledc_ch_group_reg_t channel_group[1];
     volatile ledc_timer_group_reg_t timer_group[1];
     volatile ledc_int_raw_reg_t int_raw;
-    volatile ledc_int_st_reg_t int_st;
+    volatile ledc_int_st_reg_t  int_st;
     volatile ledc_int_ena_reg_t int_ena;
     volatile ledc_int_clr_reg_t int_clr;
     uint32_t reserved_0d0[12];
@@ -1222,8 +1222,35 @@ typedef struct {
 } ledc_dev_t;
 
 
+/**
+ * Gamma fade param group ram type
+ */
+typedef union {
+    struct {
+        uint32_t duty_inc       :1;
+        uint32_t duty_cycle     :10;
+        uint32_t scale          :10;
+        uint32_t duty_num       :10;
+        uint32_t reserved       :1;
+    };
+    uint32_t val;
+} ledc_channel_gamma_fade_param_t;
+
+typedef struct {
+    ledc_channel_gamma_fade_param_t entry[16];
+} ledc_gamma_channel_t;
+
+typedef struct {
+    volatile ledc_gamma_channel_t channel[8];
+} ledc_gamma_ram_t;
+
+
+extern ledc_dev_t LEDC;
+extern ledc_gamma_ram_t LEDC_GAMMA_RAM;
+
 #ifndef __cplusplus
 _Static_assert(sizeof(ledc_dev_t) == 0x178, "Invalid size of ledc_dev_t structure");
+_Static_assert(sizeof(ledc_gamma_ram_t) == 0x200, "Invalid size of ledc_gamma_ram_t structure");
 #endif
 
 #ifdef __cplusplus

components/soc/esp32p4/include/soc/soc_caps.h

@@ -53,7 +53,7 @@
 // #define SOC_RMT_SUPPORTED               1  //TODO: IDF-7476
 // #define SOC_SDM_SUPPORTED               1  //TODO: IDF-7551
 #define SOC_GPSPI_SUPPORTED             1
-// #define SOC_LEDC_SUPPORTED              1  //TODO: IDF-6510
+#define SOC_LEDC_SUPPORTED              1
 #define SOC_I2C_SUPPORTED               1  //TODO: IDF-6507, TODO: IDF-7491
 #define SOC_SYSTIMER_SUPPORTED          1
 // #define SOC_AES_SUPPORTED               1  //TODO: IDF-6519
@@ -263,10 +263,12 @@
 /*-------------------------- LEDC CAPS ---------------------------------------*/
 #define SOC_LEDC_SUPPORT_PLL_DIV_CLOCK      (1)
 #define SOC_LEDC_SUPPORT_XTAL_CLOCK         (1)
-#define SOC_LEDC_CHANNEL_NUM                (6)
+#define SOC_LEDC_CHANNEL_NUM                (8)
 #define SOC_LEDC_TIMER_BIT_WIDTH            (20)
+#define SOC_LEDC_GAMMA_CURVE_FADE_SUPPORTED (1)
+#define SOC_LEDC_GAMMA_CURVE_FADE_RANGE_MAX (16)
 #define SOC_LEDC_SUPPORT_FADE_STOP          (1)
-#define SOC_LEDC_GAMMA_FADE_RANGE_MAX       (16)
+#define SOC_LEDC_FADE_PARAMS_BIT_WIDTH      (10)
 
 /*-------------------------- MMU CAPS ----------------------------------------*/
 #define SOC_MMU_PAGE_SIZE_CONFIGURABLE        (0)

components/soc/esp32p4/ld/esp32p4.peripherals.ld

@@ -20,6 +20,7 @@ PROVIDE ( UHCI0             = 0x500DF000 );
 PROVIDE ( RMT               = 0x500A2000 );
 PROVIDE ( RMTMEM            = 0x500A2800 );
 PROVIDE ( LEDC              = 0x500D3000 );
+PROVIDE ( LEDC_GAMMA_RAM  = 0x500D3400 );
 PROVIDE ( TIMERG0           = 0x500C2000 );
 PROVIDE ( TIMERG1           = 0x500C3000 );
 PROVIDE ( SYSTIMER          = 0x500E2000 );

components/soc/esp32p4/ledc_periph.c

@@ -11,5 +11,7 @@
  Bunch of constants for every LEDC peripheral: GPIO signals
 */
 const ledc_signal_conn_t ledc_periph_signal[1] = {
-
+    {
+        .sig_out0_idx = LEDC_LS_SIG_OUT_PAD_OUT0_IDX,
+    }
 };

docs/docs_not_updated/esp32p4.txt

@@ -112,7 +112,6 @@ api-reference/peripherals/touch_element.rst
 api-reference/peripherals/lcd.rst
 api-reference/peripherals/ana_cmpr.rst
 api-reference/peripherals/secure_element.rst
-api-reference/peripherals/ledc.rst
 api-reference/peripherals/temp_sensor.rst
 api-reference/peripherals/sdio_slave.rst
 api-reference/peripherals/clk_tree.rst

docs/en/api-reference/peripherals/ledc.rst

@@ -1,7 +1,7 @@
 LED Control (LEDC)
 ==================
 
-{IDF_TARGET_LEDC_MAX_FADE_RANGE_NUM: default="1", esp32c6="16", esp32h2="16"}
+{IDF_TARGET_LEDC_MAX_FADE_RANGE_NUM: default="1", esp32c6="16", esp32h2="16", esp32p4="16"}
 
 :link_to_translation:`zh_CN:[中文]`
 
@@ -150,7 +150,7 @@ The source clock can also limit the PWM frequency. The higher the source clock f
          - 40 MHz
          - Dynamic Frequency Scaling compatible
 
-.. only:: esp32c6
+.. only:: esp32c6 or esp32p4
 
     .. list-table:: Characteristics of {IDF_TARGET_NAME} LEDC source clocks
        :widths: 15 15 30

docs/zh_CN/api-reference/peripherals/ledc.rst

@@ -1,7 +1,7 @@
 LED PWM 控制器
 ==============
 
-{IDF_TARGET_LEDC_MAX_FADE_RANGE_NUM: default="1", esp32c6="16", esp32h2="16"}
+{IDF_TARGET_LEDC_MAX_FADE_RANGE_NUM: default="1", esp32c6="16", esp32h2="16", esp32p4="16"}
 
 :link_to_translation:`en:[English]`
 
@@ -88,7 +88,7 @@ LED PWM 控制器可在无需 CPU 干预的情况下自动改变占空比，实
        * - RC_FAST_CLK
          - ~ 8 MHz
          - 低速
-         - 支持动态调频 (DFS) 功能，支持Light-sleep模式
+         - 支持动态调频（DFS）功能，支持 Light-sleep 模式
 
 .. only:: esp32s2
 
@@ -107,7 +107,7 @@ LED PWM 控制器可在无需 CPU 干预的情况下自动改变占空比，实
          - 支持动态调频 (DFS) 功能
        * - RC_FAST_CLK
          - ~ 8 MHz
-         - 支持动态调频 (DFS) 功能，支持 Light-sleep 模式
+         - 支持动态调频（DFS）功能，支持 Light-sleep 模式
        * - XTAL_CLK
          - 40 MHz
          - 支持动态调频 (DFS) 功能
@@ -145,12 +145,12 @@ LED PWM 控制器可在无需 CPU 干预的情况下自动改变占空比，实
          - /
        * - RC_FAST_CLK
          - ~ 20 MHz
-         - 支持动态调频 (DFS) 功能，支持Light-sleep模式
+         - 支持动态调频（DFS）功能，支持 Light-sleep 模式
        * - XTAL_CLK
          - 40 MHz
          - 支持动态调频 (DFS) 功能
 
-.. only:: esp32c6
+.. only:: esp32c6 or esp32p4
 
     .. list-table:: {IDF_TARGET_NAME} LEDC 时钟源特性
        :widths: 10 10 30
@@ -164,7 +164,7 @@ LED PWM 控制器可在无需 CPU 干预的情况下自动改变占空比，实
          - /
        * - RC_FAST_CLK
          - ~ 20 MHz
-         - 支持动态调频 (DFS) 功能，支持 Light-sleep 模式
+         - 支持动态调频（DFS）功能，支持 Light-sleep 模式
        * - XTAL_CLK
          - 40 MHz
          - 支持动态调频 (DFS) 功能
@@ -183,7 +183,7 @@ LED PWM 控制器可在无需 CPU 干预的情况下自动改变占空比，实
          - /
        * - RC_FAST_CLK
          - ~ 8 MHz
-         - 支持动态调频 (DFS) 功能，支持 Light-sleep 模式
+         - 支持动态调频（DFS）功能，支持 Light-sleep 模式
        * - XTAL_CLK
          - 32 MHz
          - 支持动态调频 (DFS) 功能

examples/peripherals/ledc/ledc_basic/README.md

@@ -1,5 +1,5 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
 
 # _LEDC Basic Example_
 
@@ -23,7 +23,7 @@ Connect the GPIO to an oscilloscope to see the generated signal:
 
 ### Configure the project
 
-The example uses fixed PWM frequency of 5 kHz, duty cycle in 50%, and output GPIO pin. To change them, adjust `LEDC_FREQUENCY`, `LEDC_DUTY`, `LEDC_OUTPUT_IO` macros at the top of ledc_basic_example_main.c.
+The example uses fixed PWM frequency of 4 kHz, duty cycle in 50%, and output GPIO pin. To change them, adjust `LEDC_FREQUENCY`, `LEDC_DUTY`, `LEDC_OUTPUT_IO` macros at the top of ledc_basic_example_main.c.
 
 Depending on the selected `LEDC_FREQUENCY`, you will need to change the `LEDC_DUTY_RES`.
 

examples/peripherals/ledc/ledc_basic/main/ledc_basic_example_main.c

@@ -16,7 +16,7 @@
 #define LEDC_CHANNEL            LEDC_CHANNEL_0
 #define LEDC_DUTY_RES           LEDC_TIMER_13_BIT // Set duty resolution to 13 bits
 #define LEDC_DUTY               (4096) // Set duty to 50%. (2 ** 13) * 50% = 4096
-#define LEDC_FREQUENCY          (5000) // Frequency in Hertz. Set frequency at 5 kHz
+#define LEDC_FREQUENCY          (4000) // Frequency in Hertz. Set frequency at 4 kHz
 
 /* Warning:
  * For ESP32, ESP32S2, ESP32S3, ESP32C3, ESP32C2, ESP32C6, ESP32H2, ESP32P4 targets,
@@ -31,7 +31,7 @@ static void example_ledc_init(void)
         .speed_mode       = LEDC_MODE,
         .timer_num        = LEDC_TIMER,
         .duty_resolution  = LEDC_DUTY_RES,
-        .freq_hz          = LEDC_FREQUENCY,  // Set output frequency at 5 kHz
+        .freq_hz          = LEDC_FREQUENCY,  // Set output frequency at 4 kHz
         .clk_cfg          = LEDC_AUTO_CLK
     };
     ESP_ERROR_CHECK(ledc_timer_config(&ledc_timer));

examples/peripherals/ledc/ledc_fade/README.md

@@ -1,5 +1,5 @@
-| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
+| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
-| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
+| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
 
 # _LEDC Fade Example_
 

examples/peripherals/ledc/ledc_fade/main/ledc_fade_example_main.c

@@ -89,7 +89,7 @@ void app_main(void)
      */
     ledc_timer_config_t ledc_timer = {
         .duty_resolution = LEDC_TIMER_13_BIT, // resolution of PWM duty
-        .freq_hz = 5000,                      // frequency of PWM signal
+        .freq_hz = 4000,                      // frequency of PWM signal
         .speed_mode = LEDC_LS_MODE,           // timer mode
         .timer_num = LEDC_LS_TIMER,            // timer index
         .clk_cfg = LEDC_AUTO_CLK,              // Auto select the source clock

examples/peripherals/ledc/ledc_gamma_curve_fade/README.md

@@ -1,5 +1,5 @@
-| Supported Targets | ESP32-C6 | ESP32-H2 |
+| Supported Targets | ESP32-C6 | ESP32-H2 | ESP32-P4 |
-| ----------------- | -------- | -------- |
+| ----------------- | -------- | -------- | -------- |
 
 # _LEDC Gamma Curve Fade Example_
 

examples/peripherals/ledc/ledc_gamma_curve_fade/main/ledc_gamma_curve_fade_example_main.c

@@ -28,7 +28,7 @@
 #define LEDC_MODE                     LEDC_LOW_SPEED_MODE
 
 #define LEDC_DUTY_RES                 LEDC_TIMER_13_BIT // Set duty resolution to 13 bits
-#define LEDC_FREQUENCY                (5000) // Frequency in Hertz. Set frequency at 5 kHz
+#define LEDC_FREQUENCY                (4000) // Frequency in Hertz. Set frequency at 4 kHz
 
 // Define two RGB LEDs IOs and channels
 #define LEDC_RED_IO                   (0)
@@ -225,7 +225,7 @@ static void example_rgb_ledc_init(void)
         .speed_mode       = LEDC_MODE,
         .timer_num        = LEDC_TIMER,
         .duty_resolution  = LEDC_DUTY_RES,
-        .freq_hz          = LEDC_FREQUENCY,  // Set output frequency at 5 kHz
+        .freq_hz          = LEDC_FREQUENCY,  // Set output frequency at 4 kHz
         .clk_cfg          = LEDC_AUTO_CLK
     };
     ESP_ERROR_CHECK(ledc_timer_config(&ledc_timer));