feat(spi_flash): Add suspend support on esp32c5, esp32c61

This commit is contained in:
C.S.M 2024-09-06 17:14:19 +08:00
parent f0a2091e4d
commit 9e864ffe26
10 changed files with 48 additions and 38 deletions

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@ -1007,6 +1007,34 @@ config SOC_SPI_MAX_PRE_DIVIDER
int
default 16
config SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
bool
default y
config SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
bool
default y
config SOC_SPI_MEM_SUPPORT_AUTO_RESUME
bool
default y
config SOC_SPI_MEM_SUPPORT_IDLE_INTR
bool
default y
config SOC_SPI_MEM_SUPPORT_SW_SUSPEND
bool
default y
config SOC_SPI_MEM_SUPPORT_CHECK_SUS
bool
default y
config SOC_SPI_MEM_SUPPORT_WRAP
bool
default y
config SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED
bool
default y

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@ -427,13 +427,13 @@
#define SOC_SPI_MAX_PRE_DIVIDER 16
/*-------------------------- SPI MEM CAPS ---------------------------------------*/
// #define SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE (1)
// #define SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND (1)
// #define SOC_SPI_MEM_SUPPORT_AUTO_RESUME (1)
// #define SOC_SPI_MEM_SUPPORT_IDLE_INTR (1)
// #define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1)
// #define SOC_SPI_MEM_SUPPORT_CHECK_SUS (1)
// #define SOC_SPI_MEM_SUPPORT_WRAP (1)
#define SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE (1)
#define SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND (1)
#define SOC_SPI_MEM_SUPPORT_AUTO_RESUME (1)
#define SOC_SPI_MEM_SUPPORT_IDLE_INTR (1)
#define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1)
#define SOC_SPI_MEM_SUPPORT_CHECK_SUS (1)
#define SOC_SPI_MEM_SUPPORT_WRAP (1)
#define SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED 1
#define SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED 1

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@ -308,7 +308,7 @@
/*-------------------------- SPI MEM CAPS ---------------------------------------*/
#define SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE (1)
#define SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND (1) //TODO: [ESP32C61] IDF-9255
#define SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND (1)
#define SOC_SPI_MEM_SUPPORT_AUTO_RESUME (1)
#define SOC_SPI_MEM_SUPPORT_IDLE_INTR (1)
#define SOC_SPI_MEM_SUPPORT_SW_SUSPEND (1)

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@ -40,7 +40,7 @@ menu "Main Flash configuration"
default SPI_FLASH_HPM_AUTO
help
Whether the High Performance Mode of Flash is enabled. As an optional feature, user needs to manually
enable this option as a confirmation. To be back-compatible with earlier IDF versionn, this option is
enable this option as a confirmation. To be back-compatible with earlier IDF version, this option is
automatically enabled with warning when Flash running > 80Mhz.
config SPI_FLASH_HPM_ENA
@ -83,17 +83,10 @@ menu "Main Flash configuration"
This is a helper config for HPM. Whether HPM-DC is enabled is also determined by bootloader.
Invisible for users.
config SPI_FLASH_SUSPEND_QVL_SUPPORTED
bool
default y if IDF_TARGET_ESP32C3 || IDF_TARGET_ESP32S3 || IDF_TARGET_ESP32C2
default n
help
This is a helper config. Invisible for users.
config SPI_FLASH_AUTO_SUSPEND
bool "Auto suspend long erase/write operations (READ DOCS FIRST)"
default n
depends on SPI_FLASH_SUSPEND_QVL_SUPPORTED && !SPI_FLASH_ROM_IMPL
depends on SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND && !SPI_FLASH_ROM_IMPL
help
This option is disabled by default because it is supported only
for specific flash chips and for specific Espressif chips.
@ -250,7 +243,7 @@ menu "SPI Flash driver"
Please use this configuration together with ``SPI_FLASH_ERASE_YIELD_DURATION_MS`` and
``SPI_FLASH_ERASE_YIELD_TICKS`` after carefully checking flash datasheet to avoid a
watchdog timeout.
For more information, please check `SPI Flash API` reference documenation
For more information, please check `SPI Flash API` reference documentation
under section `OS Function`.
config SPI_FLASH_ERASE_YIELD_DURATION_MS
@ -352,7 +345,7 @@ menu "SPI Flash driver"
config SPI_FLASH_SUPPORT_BOYA_CHIP
bool "BOYA"
# ESP32 doens't usually use this chip, default n to save iram.
# ESP32 doesn't usually use this chip, default n to save iram.
default y if SPI_FLASH_VENDOR_BOYA_SUPPORTED
default n
help
@ -362,7 +355,7 @@ menu "SPI Flash driver"
config SPI_FLASH_SUPPORT_TH_CHIP
bool "TH"
# ESP32 doens't usually use this chip, default n to save iram.
# ESP32 doesn't usually use this chip, default n to save iram.
default y if SPI_FLASH_VENDOR_TH_SUPPORTED
default n
help

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@ -510,7 +510,7 @@ esp_err_t spi_flash_chip_generic_write_encrypted(esp_flash_t *chip, const void *
return ESP_ERR_NOT_SUPPORTED;
}
/* Check if the buffer and length can qualify the requirments */
/* Check if the buffer and length can qualify the requirements */
if (esp_flash_encryption->flash_encryption_check(address, length) != true) {
return ESP_ERR_NOT_SUPPORTED;
}
@ -600,7 +600,7 @@ spi_flash_caps_t spi_flash_chip_generic_get_caps(esp_flash_t *chip)
// flash suspend support
// XMC support suspend
if (chip->chip_id >> 16 == 0x20) {
if (chip->chip_id >> 16 == 0x20 || chip->chip_id >> 16 == 0x46) {
caps_flags |= SPI_FLASH_CHIP_CAP_SUSPEND;
}
@ -799,7 +799,7 @@ esp_err_t spi_flash_common_set_io_mode(esp_flash_t *chip, esp_flash_wrsr_func_t
esp_err_t spi_flash_chip_generic_suspend_cmd_conf(esp_flash_t *chip)
{
// chips which support auto-suspend
if (chip->chip_id >> 16 != 0x20 && chip->chip_id >> 16 != 0xa1) {
if (chip->chip_id >> 16 != 0x20 && chip->chip_id >> 16 != 0xa1 && chip->chip_id >> 16 != 0x46) {
ESP_EARLY_LOGE(TAG, "The flash you use doesn't support auto suspend, only \'XMC\' is supported");
return ESP_ERR_NOT_SUPPORTED;
}

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@ -34,9 +34,6 @@ components/spi_flash/test_apps/flash_mmap:
components/spi_flash/test_apps/flash_suspend:
disable:
- if: SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND != 1
- if: IDF_TARGET == "esp32c61"
temporary: true
reason: not support yet # TODO: [ESP32C61] IDF-9255
disable_test:
- if: IDF_TARGET != "esp32c3"
temporary: true

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@ -1,2 +1,2 @@
| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-C61 | ESP32-H2 | ESP32-P4 | ESP32-S3 |
| ----------------- | -------- | -------- | -------- | -------- | --------- | -------- | -------- | -------- |

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@ -77,6 +77,8 @@ static bool IRAM_ATTR gptimer_alarm_suspend_cb(gptimer_handle_t timer, const gpt
#endif
#if CONFIG_IDF_TARGET_ESP32P4
Cache_Invalidate_All(CACHE_MAP_L2_CACHE);
#elif CONFIG_IDF_TARGET_ESP32C5 || CONFIG_IDF_TARGET_ESP32C61
Cache_Invalidate_All();
#else
Cache_Invalidate_ICache_All();
#endif

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@ -63,11 +63,6 @@ api-reference/peripherals/touch_element.rst
api-reference/peripherals/lcd.rst
api-reference/peripherals/ana_cmpr.rst
api-reference/peripherals/spi_features.rst
api-reference/peripherals/spi_flash/spi_flash_concurrency.rst
api-reference/peripherals/spi_flash/spi_flash_override_driver.rst
api-reference/peripherals/spi_flash/spi_flash_optional_feature.rst
api-reference/peripherals/spi_flash/spi_flash_idf_vs_rom.rst
api-reference/peripherals/spi_flash/index.rst
api-reference/peripherals/touch_pad.rst
api-reference/peripherals/adc_calibration.rst
api-reference/peripherals/sd_pullup_requirements.rst

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@ -96,11 +96,6 @@ api-reference/peripherals/camera_driver.rst
api-reference/peripherals/temp_sensor.rst
api-reference/peripherals/spi_features.rst
api-reference/peripherals/sdio_slave.rst
api-reference/peripherals/spi_flash/spi_flash_concurrency.rst
api-reference/peripherals/spi_flash/spi_flash_override_driver.rst
api-reference/peripherals/spi_flash/spi_flash_optional_feature.rst
api-reference/peripherals/spi_flash/spi_flash_idf_vs_rom.rst
api-reference/peripherals/spi_flash/index.rst
api-reference/peripherals/touch_pad.rst
api-reference/peripherals/lcd/i80_lcd.rst
api-reference/peripherals/lcd/spi_lcd.rst