Merge branch 'bugfix/use_xtal_for_c3_wdt_v5.1' into 'release/v5.1'

fix(wdt): changed ESP32-C3 WDT to use XTAL as clock (v5.1)

See merge request espressif/esp-idf!25946

components/esp_system/test_apps/esp_system_unity_tests/main/test_task_wdt.c

@@ -13,10 +13,11 @@
 #include "esp_rom_sys.h"
 #include "esp_task_wdt.h"
 #include "test_utils.h"
+#include "soc/rtc.h"
 
 #define TASK_WDT_TIMEOUT_MS     1000
 
-static bool timeout_flag;
+static volatile bool timeout_flag;
 
 void esp_task_wdt_isr_user_handler(void)
 {
@@ -40,6 +41,41 @@ TEST_CASE("Task WDT task timeout", "[task_wdt]")
     TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_deinit());
 }
 
+#if SOC_MWDT_SUPPORT_XTAL
+
+#if CONFIG_IDF_TARGET_ESP32H2
+#define TEST_CPU_FREQUENCY_MHZ 48
+#else
+#define TEST_CPU_FREQUENCY_MHZ 40
+#endif
+
+TEST_CASE("Task WDT task timeout - CPU Frequency changed", "[task_wdt]")
+{
+    rtc_cpu_freq_config_t old_config, new_config;
+    rtc_clk_cpu_freq_get_config(&old_config);
+
+    TEST_ASSERT(rtc_clk_cpu_freq_mhz_to_config(TEST_CPU_FREQUENCY_MHZ, &new_config));
+    rtc_clk_cpu_freq_set_config(&new_config);
+
+    timeout_flag = false;
+    esp_task_wdt_config_t twdt_config = {
+        .timeout_ms = TASK_WDT_TIMEOUT_MS,
+        .idle_core_mask = 0,
+        .trigger_panic = false,
+    };
+    TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_init(&twdt_config));
+    TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_add(NULL));
+    /* Short delay to allow timeout to occur, if WDT depends on any of the clocks changed
+       then the timeout should be slower and test will fail */
+    esp_rom_delay_us(TASK_WDT_TIMEOUT_MS * 1000);
+    TEST_ASSERT_EQUAL(true, timeout_flag);
+    TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_delete(NULL));
+    TEST_ASSERT_EQUAL(ESP_OK, esp_task_wdt_deinit());
+
+    rtc_clk_cpu_freq_set_config(&old_config);
+}
+#endif //SOC_MWDT_SUPPORT_XTAL
+
 TEST_CASE("Task WDT inactive when no task to watch", "[task_wdt]")
 {
     /* Make sure a timeout is NOT trigger when we have no task to watch */

components/hal/esp32c3/include/hal/mwdt_ll.h

@@ -24,7 +24,7 @@ extern "C" {
 #include "hal/misc.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
-#define MWDT_LL_DEFAULT_CLK_PRESCALER 40000
+#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
 
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");

components/hal/esp32c6/include/hal/mwdt_ll.h

@@ -25,7 +25,7 @@ extern "C" {
 #include "hal/misc.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
-#define MWDT_LL_DEFAULT_CLK_PRESCALER 40000
+#define MWDT_LL_DEFAULT_CLK_PRESCALER 20000
 
 //Type check wdt_stage_action_t
 ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");

components/hal/esp32h2/include/hal/mwdt_ll.h

@@ -24,7 +24,7 @@ extern "C" {
 #include "hal/misc.h"
 
 /* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
-#define MWDT_LL_DEFAULT_CLK_PRESCALER 24000
+#define MWDT_LL_DEFAULT_CLK_PRESCALER 16000
 
 //Type check wdt_stage_action_t
 _Static_assert(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");

components/soc/esp32c2/include/soc/Kconfig.soc_caps.in

@@ -511,6 +511,10 @@ config SOC_TIMER_GROUP_TOTAL_TIMERS
     int
     default 1
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_EFUSE_DIS_DOWNLOAD_ICACHE
     bool
     default y

components/soc/esp32c2/include/soc/soc_caps.h

@@ -246,6 +246,9 @@
 #define SOC_TIMER_GROUP_SUPPORT_XTAL      (1)
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (1U)
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- eFuse CAPS----------------------------*/
 #define SOC_EFUSE_DIS_DOWNLOAD_ICACHE 1
 #define SOC_EFUSE_DIS_PAD_JTAG 1

components/soc/esp32c3/include/soc/Kconfig.soc_caps.in

@@ -731,6 +731,10 @@ config SOC_TIMER_GROUP_TOTAL_TIMERS
     int
     default 2
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_TWAI_CONTROLLER_NUM
     int
     default 1

components/soc/esp32c3/include/soc/clk_tree_defs.h

@@ -334,7 +334,7 @@ typedef enum {
 typedef enum {
     MWDT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
     MWDT_CLK_SRC_APB = SOC_MOD_CLK_APB,             /*!< Select APB as the source clock */
-    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB,         /*!< Select APB as the default clock choice */
+    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,         /*!< Select APB as the default clock choice */
 } soc_periph_mwdt_clk_src_t;
 
 //////////////////////////////////////////////////LEDC/////////////////////////////////////////////////////////////////

components/soc/esp32c3/include/soc/soc_caps.h

@@ -327,6 +327,9 @@
 #define SOC_TIMER_GROUP_SUPPORT_APB       (1)
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (2)
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_CONTROLLER_NUM         1UL
 #define SOC_TWAI_CLK_SUPPORT_APB        1

components/soc/esp32c6/include/soc/Kconfig.soc_caps.in

@@ -967,6 +967,10 @@ config SOC_TIMER_SUPPORT_ETM
     bool
     default y
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_TWAI_CONTROLLER_NUM
     int
     default 2

components/soc/esp32c6/include/soc/clk_tree_defs.h

@@ -413,7 +413,7 @@ typedef enum {
     MWDT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
     MWDT_CLK_SRC_PLL_F80M = SOC_MOD_CLK_PLL_F80M,   /*!< Select PLL fixed 80 MHz as the source clock */
     MWDT_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST,     /*!< Select RTC fast as the source clock */
-    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F80M,    /*!< Select PLL fixed 80 MHz as the default clock choice */
+    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,        /*!< Select PLL fixed 80 MHz as the default clock choice */
 } soc_periph_mwdt_clk_src_t;
 
 //////////////////////////////////////////////////LEDC/////////////////////////////////////////////////////////////////

components/soc/esp32c6/include/soc/soc_caps.h

@@ -404,6 +404,9 @@
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (2)
 #define SOC_TIMER_SUPPORT_ETM             (1)
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_CONTROLLER_NUM         2
 #define SOC_TWAI_CLK_SUPPORT_XTAL       1

components/soc/esp32h2/include/soc/Kconfig.soc_caps.in

@@ -955,6 +955,10 @@ config SOC_TIMER_SUPPORT_ETM
     bool
     default y
 
+config SOC_MWDT_SUPPORT_XTAL
+    bool
+    default y
+
 config SOC_TWAI_CONTROLLER_NUM
     bool
     default y

components/soc/esp32h2/include/soc/clk_tree_defs.h

@@ -423,7 +423,7 @@ typedef enum {
     MWDT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL,           /*!< Select XTAL as the source clock */
     MWDT_CLK_SRC_PLL_F48M = SOC_MOD_CLK_PLL_F48M,   /*!< Select PLL fixed 48 MHz as the source clock */
     MWDT_CLK_SRC_RC_FAST = SOC_MOD_CLK_RC_FAST,     /*!< Select RTC fast as the source clock */
-    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F48M,    /*!< Select PLL as the default clock choice */
+    MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL,        /*!< Select PLL as the default clock choice */
 } soc_periph_mwdt_clk_src_t;
 
 //////////////////////////////////////////////////LEDC/////////////////////////////////////////////////////////////////

components/soc/esp32h2/include/soc/soc_caps.h

@@ -399,6 +399,9 @@
 #define SOC_TIMER_GROUP_TOTAL_TIMERS      (2)
 #define SOC_TIMER_SUPPORT_ETM             (1)
 
+/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
+#define SOC_MWDT_SUPPORT_XTAL              (1)
+
 /*-------------------------- TWAI CAPS ---------------------------------------*/
 #define SOC_TWAI_CONTROLLER_NUM         1
 #define SOC_TWAI_CLK_SUPPORT_XTAL       1