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Merge branch 'bugfix/efuse_logs_v4.1' into 'release/v4.1'
esp32: Reduce using ESP_EARLY_LOGx and move some code after the stdout initialization in startup code (v4.1) See merge request espressif/esp-idf!9206
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9e55345c43
@ -36,7 +36,7 @@ void esp_flash_encryption_init_checks()
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uint8_t flash_crypt_cnt_wr_dis = 0;
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esp_efuse_read_field_blob(ESP_EFUSE_WR_DIS_FLASH_CRYPT_CNT, &flash_crypt_cnt_wr_dis, 1);
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if (!flash_crypt_cnt_wr_dis) {
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ESP_EARLY_LOGE(TAG, "Flash encryption & Secure Boot together requires FLASH_CRYPT_CNT efuse to be write protected. Fixing now...");
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ESP_LOGE(TAG, "Flash encryption & Secure Boot together requires FLASH_CRYPT_CNT efuse to be write protected. Fixing now...");
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esp_flash_write_protect_crypt_cnt();
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}
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}
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@ -48,13 +48,13 @@ void esp_flash_encryption_init_checks()
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mode = esp_get_flash_encryption_mode();
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if (mode == ESP_FLASH_ENC_MODE_DEVELOPMENT) {
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#ifdef CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE
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ESP_EARLY_LOGE(TAG, "Flash encryption settings error: app is configured for RELEASE but efuses are set for DEVELOPMENT");
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ESP_EARLY_LOGE(TAG, "Mismatch found in security options in bootloader menuconfig and efuse settings. Device is not secure.");
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ESP_LOGE(TAG, "Flash encryption settings error: app is configured for RELEASE but efuses are set for DEVELOPMENT");
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ESP_LOGE(TAG, "Mismatch found in security options in bootloader menuconfig and efuse settings. Device is not secure.");
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#else
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ESP_EARLY_LOGW(TAG, "Flash encryption mode is DEVELOPMENT (not secure)");
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ESP_LOGW(TAG, "Flash encryption mode is DEVELOPMENT (not secure)");
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#endif
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} else if (mode == ESP_FLASH_ENC_MODE_RELEASE) {
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ESP_EARLY_LOGI(TAG, "Flash encryption mode is RELEASE");
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ESP_LOGI(TAG, "Flash encryption mode is RELEASE");
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}
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}
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#endif
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@ -74,7 +74,7 @@ void esp_efuse_disable_basic_rom_console(void)
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esp_efuse_read_field_blob(ESP_EFUSE_CONSOLE_DEBUG_DISABLE, &console_debug_disable, 1);
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if (console_debug_disable == 0) {
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esp_efuse_write_field_cnt(ESP_EFUSE_CONSOLE_DEBUG_DISABLE, 1);
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ESP_EARLY_LOGI(TAG, "Disable BASIC ROM Console fallback via efuse...");
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ESP_LOGI(TAG, "Disable BASIC ROM Console fallback via efuse...");
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}
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}
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@ -208,10 +208,6 @@ void IRAM_ATTR call_start_cpu0(void)
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}
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ESP_EARLY_LOGI(TAG, "Starting app cpu, entry point is %p", call_start_cpu1);
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#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED
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esp_flash_encryption_init_checks();
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#endif
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//Flush and enable icache for APP CPU
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Cache_Flush(1);
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Cache_Read_Enable(1);
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@ -352,9 +348,6 @@ void start_cpu0_default(void)
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#if CONFIG_ESP32_BROWNOUT_DET
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esp_brownout_init();
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#endif
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#if CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE
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esp_efuse_disable_basic_rom_console();
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#endif
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rtc_gpio_force_hold_dis_all();
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esp_vfs_dev_uart_register();
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@ -368,6 +361,14 @@ void start_cpu0_default(void)
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_GLOBAL_REENT->_stdin = (FILE*) &__sf_fake_stdin;
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_GLOBAL_REENT->_stdout = (FILE*) &__sf_fake_stdout;
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_GLOBAL_REENT->_stderr = (FILE*) &__sf_fake_stderr;
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#endif
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// After setting _GLOBAL_REENT, ESP_LOGIx can be used instead of ESP_EARLY_LOGx.
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#ifdef CONFIG_SECURE_FLASH_ENC_ENABLED
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esp_flash_encryption_init_checks();
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#endif
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#if CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE
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esp_efuse_disable_basic_rom_console();
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#endif
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esp_timer_init();
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esp_set_time_from_rtc();
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@ -276,9 +276,6 @@ void start_cpu0_default(void)
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#if CONFIG_ESP32S2_BROWNOUT_DET
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esp_brownout_init();
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#endif
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#if CONFIG_ESP32S2_DISABLE_BASIC_ROM_CONSOLE
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esp_efuse_disable_basic_rom_console();
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#endif
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rtc_gpio_force_hold_dis_all();
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esp_vfs_dev_uart_register();
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@ -292,6 +289,11 @@ void start_cpu0_default(void)
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_GLOBAL_REENT->_stdin = (FILE*) &__sf_fake_stdin;
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_GLOBAL_REENT->_stdout = (FILE*) &__sf_fake_stdout;
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_GLOBAL_REENT->_stderr = (FILE*) &__sf_fake_stderr;
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#endif
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// After setting _GLOBAL_REENT, ESP_LOGIx can be used instead of ESP_EARLY_LOGx.
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#if CONFIG_ESP32S2_DISABLE_BASIC_ROM_CONSOLE
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esp_efuse_disable_basic_rom_console();
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#endif
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esp_timer_init();
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esp_set_time_from_rtc();
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