esp_wifi: rm esp32s2beta

This commit is contained in:
ChenJianxing 2021-06-25 16:14:44 +08:00 committed by bot
parent c69ceefb27
commit 9c897ef280
5 changed files with 1 additions and 35 deletions

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@ -36,15 +36,6 @@ target_link_libraries(${COMPONENT_LIB} PUBLIC "-L ${CMAKE_CURRENT_SOURCE_DIR}/li
if(link_binary_libs)
if(CONFIG_IDF_TARGET_ESP32)
set(phy phy)
elseif(CONFIG_IDF_TARGET_ESP32S2BETA)
# TODO: remove once final S2 chip is supported
if(CONFIG_ESP32S2_BETA_VERSION_A)
set(phy phyA)
elseif(CONFIG_ESP32S2_BETA_VERSION_B)
set(phy phyB)
elseif(CONFIG_ESP32S2_BETA_VERSION_MARLIN3)
set(phy phy_marlin3)
endif()
endif()
set(blobs coexist core espnow mesh net80211 pp rtc smartconfig ${phy})
@ -86,13 +77,5 @@ if(CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION)
# ToDo: remove once MP chip is supported
if(CONFIG_IDF_TARGET_ESP32)
esptool_py_flash_project_args(phy ${phy_partition_offset} ${phy_init_data_bin} FLASH_IN_PROJECT)
elseif(CONFIG_IDF_TARGET_ESP32S2BETA)
if(CONFIG_ESP32S2BETA_VERSION_A)
esptool_py_flash_project_args(phyA ${phy_partition_offset} ${phy_init_data_bin} FLASH_IN_PROJECT)
elseif(CONFIG_ESP32S2BETA_VERSION_B)
esptool_py_flash_project_args(phyB ${phy_partition_offset} ${phy_init_data_bin} FLASH_IN_PROJECT)
elseif(CONFIG_ESP32S2BETA_VERSION_MARLIN3)
esptool_py_flash_project_args(phy_marlin3 ${phy_partition_offset} ${phy_init_data_bin} FLASH_IN_PROJECT)
endif()
endif()
endif()

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@ -79,10 +79,8 @@ typedef struct {
void (* _dport_access_stall_other_cpu_end_wrap)(void);
int32_t (* _phy_rf_deinit)(uint32_t module);
void (* _phy_load_cal_and_init)(uint32_t module);
#if CONFIG_IDF_TARGET_ESP32
void (* _phy_common_clock_enable)(void);
void (* _phy_common_clock_disable)(void);
#endif
int32_t (* _read_mac)(uint8_t* mac, uint32_t type);
void (* _timer_arm)(void *timer, uint32_t tmout, bool repeat);
void (* _timer_disarm)(void *timer);
@ -107,9 +105,6 @@ typedef struct {
int32_t (* _get_random)(uint8_t *buf, size_t len);
int32_t (* _get_time)(void *t);
unsigned long (* _random)(void);
#if CONFIG_IDF_TARGET_ESP32S2BETA
uint32_t (* _slowclk_cal_get)(void);
#endif
void (* _log_write)(uint32_t level, const char* tag, const char* format, ...);
void (* _log_writev)(uint32_t level, const char* tag, const char* format, va_list args);
uint32_t (* _log_timestamp)(void);

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@ -327,11 +327,7 @@ typedef struct {
unsigned stbc:2; /**< Space Time Block Code(STBC). 0: non STBC packet; 1: STBC packet */
unsigned fec_coding:1; /**< Flag is set for 11n packets which are LDPC */
unsigned sgi:1; /**< Short Guide Interval(SGI). 0: Long GI; 1: Short GI */
#if CONFIG_IDF_TARGET_ESP32
signed noise_floor:8; /**< noise floor of Radio Frequency Module(RF). unit: 0.25dBm*/
#elif CONFIG_IDF_TARGET_ESP32S2BETA
unsigned :8;
#endif
unsigned ampdu_cnt:8; /**< ampdu cnt */
unsigned channel:4; /**< primary channel on which this packet is received */
unsigned secondary_channel:4; /**< secondary channel on which this packet is received. 0: none; 1: above; 2: below */
@ -340,10 +336,6 @@ typedef struct {
unsigned :32; /**< reserve */
unsigned :31; /**< reserve */
unsigned ant:1; /**< antenna number from which this packet is received. 0: WiFi antenna 0; 1: WiFi antenna 1 */
#if CONFIG_IDF_TARGET_ESP32S2BETA
signed noise_floor:8; /**< noise floor of Radio Frequency Module(RF). unit: 0.25dBm*/
unsigned :24;
#endif
unsigned sig_len:12; /**< length of packet including Frame Check Sequence(FCS) */
unsigned :12; /**< reserve */
unsigned rx_state:8; /**< state of the packet. 0: no error; others: error numbers which are not public */

@ -1 +1 @@
Subproject commit c82065efa12918f734eac2bb4ca88962bbef584b
Subproject commit 9fd1ef517cb7d94fc1b5c92be1a4368903134022

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@ -17,10 +17,6 @@ case $IDF_TARGET in
PREFIX=xtensa-esp32-elf-
LIB_DIR=esp32
;;
esp32s2beta)
PREFIX=xtensa-esp32s2-elf-
LIB_DIR=esp32s2beta
;;
*)
echo "Invalid IDF_TARGET value: \"${IDF_TARGET}\""
exit 1