diff --git a/components/bootloader_support/src/bootloader_efuse_esp32s2beta.c b/components/bootloader_support/src/bootloader_efuse_esp32s2beta.c index b762d2c4f8..6c2c3a9b64 100644 --- a/components/bootloader_support/src/bootloader_efuse_esp32s2beta.c +++ b/components/bootloader_support/src/bootloader_efuse_esp32s2beta.c @@ -16,12 +16,6 @@ #include "bootloader_clock.h" #include "bootloader_common.h" -int bootloader_clock_get_rated_freq_mhz() -{ - /* No known limitation: all chips are 240MHz rated */ - return 240; -} - uint8_t bootloader_common_get_chip_revision(void) { /* No other revisions for ESP32-S2beta */ diff --git a/components/bootloader_support/src/bootloader_flash_config_esp32s2beta.c b/components/bootloader_support/src/bootloader_flash_config_esp32s2beta.c index f6bea6cf4b..8967971215 100644 --- a/components/bootloader_support/src/bootloader_flash_config_esp32s2beta.c +++ b/components/bootloader_support/src/bootloader_flash_config_esp32s2beta.c @@ -71,11 +71,6 @@ void IRAM_ATTR bootloader_flash_clock_config(const esp_image_header_t* pfhdr) esp_rom_spiflash_config_clk(spi_clk_div, 0); } -void IRAM_ATTR bootloader_flash_gpio_config(const esp_image_header_t* pfhdr) -{ - -} - void IRAM_ATTR bootloader_flash_dummy_config(const esp_image_header_t* pfhdr) { int spi_cache_dummy = 0; diff --git a/components/bootloader_support/src/esp32s2beta/bootloader_esp32s2beta.c b/components/bootloader_support/src/esp32s2beta/bootloader_esp32s2beta.c index 066271e4f7..f3e4e24580 100644 --- a/components/bootloader_support/src/esp32s2beta/bootloader_esp32s2beta.c +++ b/components/bootloader_support/src/esp32s2beta/bootloader_esp32s2beta.c @@ -201,7 +201,6 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr) static void IRAM_ATTR bootloader_init_flash_configure(void) { - bootloader_flash_gpio_config(&bootloader_image_hdr); bootloader_flash_dummy_config(&bootloader_image_hdr); bootloader_flash_cs_timing_config(); } @@ -329,7 +328,7 @@ static void bootloader_check_wdt_reset(void) rst_reas[0] = rtc_get_reset_reason(0); if (rst_reas[0] == RTCWDT_SYS_RESET || rst_reas[0] == TG0WDT_SYS_RESET || rst_reas[0] == TG1WDT_SYS_RESET || - rst_reas[0] == TG0WDT_CPU_RESET || rst_reas[0] == TG1WDT_CPU_RESET || rst_reas[0] == RTCWDT_CPU_RESET) { + rst_reas[0] == TG0WDT_CPU_RESET || rst_reas[0] == TG1WDT_CPU_RESET || rst_reas[0] == RTCWDT_CPU_RESET) { ESP_LOGW(TAG, "PRO CPU has been reset by WDT."); wdt_rst = 1; }