From 9b94afdd389b57bf9a335cfba9e955b6bc4dcdff Mon Sep 17 00:00:00 2001 From: Chen Jichang Date: Thu, 11 Jul 2024 14:56:10 +0800 Subject: [PATCH] feat(dedic_gpio): add support for esp32c5 --- components/esp_driver_gpio/src/dedic_gpio.c | 21 ++++--- .../test_apps/gpio_extensions/README.md | 4 +- .../main/test_dedicated_gpio.c | 14 +++-- .../gpio_extensions/pytest_gpio_extensions.py | 1 + .../esp32c5/include/hal/dedic_gpio_cpu_ll.h | 55 +++++++++++++++++++ components/soc/esp32c2/dedic_gpio_periph.c | 1 - components/soc/esp32c3/dedic_gpio_periph.c | 1 - components/soc/esp32c5/dedic_gpio_periph.c | 36 ++++++++++++ .../esp32c5/include/soc/Kconfig.soc_caps.in | 16 ++++++ components/soc/esp32c5/include/soc/soc_caps.h | 8 +-- components/soc/esp32c6/dedic_gpio_periph.c | 1 - components/soc/esp32h2/dedic_gpio_periph.c | 1 - components/soc/esp32s2/dedic_gpio_periph.c | 19 ++----- components/soc/esp32s3/dedic_gpio_periph.c | 19 ++----- .../soc/include/soc/dedic_gpio_periph.h | 19 ++----- .../dedicated_gpio/soft_i2c/README.md | 4 +- .../dedicated_gpio/soft_spi/README.md | 4 +- .../dedicated_gpio/soft_uart/README.md | 4 +- .../components/soft_uart/riscv/soft_uart.S | 6 ++ .../parlio_tx/simple_rgb_led_matrix/README.md | 4 +- tools/ci/check_copyright_ignore.txt | 3 - 21 files changed, 161 insertions(+), 80 deletions(-) create mode 100644 components/hal/esp32c5/include/hal/dedic_gpio_cpu_ll.h create mode 100644 components/soc/esp32c5/dedic_gpio_periph.c diff --git a/components/esp_driver_gpio/src/dedic_gpio.c b/components/esp_driver_gpio/src/dedic_gpio.c index 9c60cfe7e2..bbc66995b2 100644 --- a/components/esp_driver_gpio/src/dedic_gpio.c +++ b/components/esp_driver_gpio/src/dedic_gpio.c @@ -10,22 +10,21 @@ #include #include #include "sdkconfig.h" -#include "esp_compiler.h" #include "esp_heap_caps.h" #include "esp_intr_alloc.h" #include "esp_log.h" #include "esp_check.h" #include "esp_cpu.h" #include "soc/soc_caps.h" -#include "soc/gpio_periph.h" #include "soc/io_mux_reg.h" #include "hal/dedic_gpio_cpu_ll.h" -#include "hal/gpio_hal.h" +#include "esp_private/gpio.h" #include "esp_private/periph_ctrl.h" #include "esp_rom_gpio.h" #include "freertos/FreeRTOS.h" #include "driver/dedic_gpio.h" #include "soc/dedic_gpio_periph.h" + #if SOC_DEDIC_GPIO_ALLOW_REG_ACCESS #include "soc/dedic_gpio_struct.h" #endif @@ -59,7 +58,7 @@ struct dedic_gpio_platform_t { }; struct dedic_gpio_bundle_t { - uint32_t core_id; // CPU core ID, a GPIO bundle must be installed to a specific CPU core + int core_id; // CPU core ID, a GPIO bundle must be installed to a specific CPU core uint32_t out_mask; // mask of output channels in the bank uint32_t in_mask; // mask of input channels in the bank uint32_t out_offset; // offset in the bank (seen from output channel) @@ -104,7 +103,7 @@ err: return ret; } -static void dedic_gpio_break_platform(uint32_t core_id) +static void dedic_gpio_break_platform(int core_id) { if (s_platform[core_id]) { // prevent breaking platform concurrently @@ -151,7 +150,7 @@ static void dedic_gpio_default_isr(void *arg) } } -static esp_err_t dedic_gpio_install_interrupt(uint32_t core_id) +static esp_err_t dedic_gpio_install_interrupt(int core_id) { esp_err_t ret = ESP_OK; if (!s_platform[core_id]->intr_hdl) { @@ -172,7 +171,7 @@ err: return ret; } -static void dedic_gpio_uninstall_interrupt(uint32_t core_id) +static void dedic_gpio_uninstall_interrupt(int core_id) { if (s_platform[core_id]->intr_hdl) { // prevent uninstall interrupt concurrently @@ -187,7 +186,7 @@ static void dedic_gpio_uninstall_interrupt(uint32_t core_id) } } -static void dedic_gpio_set_interrupt(uint32_t core_id, uint32_t channel, dedic_gpio_intr_type_t type) +static void dedic_gpio_set_interrupt(int core_id, uint32_t channel, dedic_gpio_intr_type_t type) { dedic_gpio_ll_set_interrupt_type(s_platform[core_id]->dev, channel, type); if (type != DEDIC_GPIO_INTR_NONE) { @@ -269,13 +268,13 @@ esp_err_t dedic_gpio_new_bundle(const dedic_gpio_bundle_config_t *config, dedic_ // route dedicated GPIO channel signals to GPIO matrix if (config->flags.in_en) { for (size_t i = 0; i < config->array_size; i++) { - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[config->gpio_array[i]], PIN_FUNC_GPIO); + gpio_func_sel(config->gpio_array[i], PIN_FUNC_GPIO); esp_rom_gpio_connect_in_signal(config->gpio_array[i], dedic_gpio_periph_signals.cores[core_id].in_sig_per_channel[in_offset + i], config->flags.in_invert); } } if (config->flags.out_en) { for (size_t i = 0; i < config->array_size; i++) { - gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[config->gpio_array[i]], PIN_FUNC_GPIO); + gpio_func_sel(config->gpio_array[i], PIN_FUNC_GPIO); esp_rom_gpio_connect_out_signal(config->gpio_array[i], dedic_gpio_periph_signals.cores[core_id].out_sig_per_channel[out_offset + i], config->flags.out_invert, false); } #if !SOC_DEDIC_GPIO_OUT_AUTO_ENABLE @@ -314,7 +313,7 @@ esp_err_t dedic_gpio_del_bundle(dedic_gpio_bundle_handle_t bundle) bool recycle_all = false; ESP_GOTO_ON_FALSE(bundle, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument"); - uint32_t core_id = esp_cpu_get_core_id(); + int core_id = esp_cpu_get_core_id(); ESP_GOTO_ON_FALSE(core_id == bundle->core_id, ESP_FAIL, err, TAG, "del bundle on wrong CPU"); portENTER_CRITICAL(&s_platform[core_id]->spinlock); diff --git a/components/esp_driver_gpio/test_apps/gpio_extensions/README.md b/components/esp_driver_gpio/test_apps/gpio_extensions/README.md index 4fc69c16b6..3a9c73a780 100644 --- a/components/esp_driver_gpio/test_apps/gpio_extensions/README.md +++ b/components/esp_driver_gpio/test_apps/gpio_extensions/README.md @@ -1,2 +1,2 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | diff --git a/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_dedicated_gpio.c b/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_dedicated_gpio.c index f0a4ba6576..fb306b523e 100644 --- a/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_dedicated_gpio.c +++ b/components/esp_driver_gpio/test_apps/gpio_extensions/main/test_dedicated_gpio.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "freertos/semphr.h" @@ -60,7 +61,7 @@ TEST_CASE("Dedicated_GPIO_bundle_install/uninstall", "[dedic_gpio]") typedef struct { SemaphoreHandle_t sem; - const int gpios[TEST_GPIO_GROUP_SIZE]; + int gpios[TEST_GPIO_GROUP_SIZE]; } test_dedic_task_context_t; static void test_dedic_gpio_on_specific_core(void *args) @@ -144,6 +145,7 @@ TEST_CASE("Dedicated_GPIO_run_on_multiple_CPU_cores", "[dedic_gpio]") { SemaphoreHandle_t sem = xSemaphoreCreateCounting(SOC_CPU_CORES_NUM, 0); TaskHandle_t task_handle[SOC_CPU_CORES_NUM]; + test_dedic_task_context_t isr_ctx[SOC_CPU_CORES_NUM]; for (int i = 0; i < SOC_CPU_CORES_NUM; i++) { #if CONFIG_IDF_TARGET_ESP32P4 @@ -151,11 +153,11 @@ TEST_CASE("Dedicated_GPIO_run_on_multiple_CPU_cores", "[dedic_gpio]") #else int start_gpio = i * TEST_GPIO_GROUP_SIZE; #endif - test_dedic_task_context_t isr_ctx = { - .sem = sem, - .gpios = {start_gpio, start_gpio + 1, start_gpio + 2, start_gpio + 3} - }; - xTaskCreatePinnedToCore(test_dedic_gpio_on_specific_core, "dedic_gpio_test_tsk", 4096, &isr_ctx, 1, + isr_ctx[i].sem = sem; + const int gpios[TEST_GPIO_GROUP_SIZE] = {start_gpio, start_gpio + 1, start_gpio + 2, start_gpio + 3}; + memcpy(isr_ctx[i].gpios, gpios, sizeof(gpios)); + + xTaskCreatePinnedToCore(test_dedic_gpio_on_specific_core, "dedic_gpio_test_tsk", 4096, &isr_ctx[i], 1, &task_handle[i], i); } diff --git a/components/esp_driver_gpio/test_apps/gpio_extensions/pytest_gpio_extensions.py b/components/esp_driver_gpio/test_apps/gpio_extensions/pytest_gpio_extensions.py index fa4bf41bab..58c95c8f3a 100644 --- a/components/esp_driver_gpio/test_apps/gpio_extensions/pytest_gpio_extensions.py +++ b/components/esp_driver_gpio/test_apps/gpio_extensions/pytest_gpio_extensions.py @@ -24,6 +24,7 @@ def test_gpio_filter(dut: IdfDut) -> None: @pytest.mark.esp32c2 @pytest.mark.esp32c3 +@pytest.mark.esp32c5 @pytest.mark.esp32c6 @pytest.mark.esp32h2 @pytest.mark.esp32s2 diff --git a/components/hal/esp32c5/include/hal/dedic_gpio_cpu_ll.h b/components/hal/esp32c5/include/hal/dedic_gpio_cpu_ll.h new file mode 100644 index 0000000000..00ee9296a3 --- /dev/null +++ b/components/hal/esp32c5/include/hal/dedic_gpio_cpu_ll.h @@ -0,0 +1,55 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#pragma once + +#include +#include "riscv/csr.h" + +/*fast gpio*/ +#define CSR_GPIO_OEN_USER 0x803 +#define CSR_GPIO_IN_USER 0x804 +#define CSR_GPIO_OUT_USER 0x805 + +#ifdef __cplusplus +extern "C" { +#endif + +__attribute__((always_inline)) +static inline void dedic_gpio_cpu_ll_enable_output(uint32_t mask) +{ + RV_WRITE_CSR(CSR_GPIO_OEN_USER, mask); +} + +static inline void dedic_gpio_cpu_ll_write_all(uint32_t value) +{ + RV_WRITE_CSR(CSR_GPIO_OUT_USER, value); +} + +__attribute__((always_inline)) +static inline uint32_t dedic_gpio_cpu_ll_read_in(void) +{ + uint32_t value = RV_READ_CSR(CSR_GPIO_IN_USER); + return value; +} + +__attribute__((always_inline)) +static inline uint32_t dedic_gpio_cpu_ll_read_out(void) +{ + uint32_t value = RV_READ_CSR(CSR_GPIO_OUT_USER); + return value; +} + +__attribute__((always_inline)) +static inline void dedic_gpio_cpu_ll_write_mask(uint32_t mask, uint32_t value) +{ + RV_SET_CSR(CSR_GPIO_OUT_USER, mask & value); + RV_CLEAR_CSR(CSR_GPIO_OUT_USER, mask & ~(value)); +} + +#ifdef __cplusplus +} +#endif diff --git a/components/soc/esp32c2/dedic_gpio_periph.c b/components/soc/esp32c2/dedic_gpio_periph.c index 84070ee47b..4c3f6b93e0 100644 --- a/components/soc/esp32c2/dedic_gpio_periph.c +++ b/components/soc/esp32c2/dedic_gpio_periph.c @@ -8,7 +8,6 @@ #include "soc/dedic_gpio_periph.h" const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { - .module = -1, .irq = -1, .cores = { [0] = { diff --git a/components/soc/esp32c3/dedic_gpio_periph.c b/components/soc/esp32c3/dedic_gpio_periph.c index 711274f893..45e0fd7a23 100644 --- a/components/soc/esp32c3/dedic_gpio_periph.c +++ b/components/soc/esp32c3/dedic_gpio_periph.c @@ -8,7 +8,6 @@ #include "soc/dedic_gpio_periph.h" const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { - .module = -1, .irq = -1, .cores = { [0] = { diff --git a/components/soc/esp32c5/dedic_gpio_periph.c b/components/soc/esp32c5/dedic_gpio_periph.c new file mode 100644 index 0000000000..ef5fc64082 --- /dev/null +++ b/components/soc/esp32c5/dedic_gpio_periph.c @@ -0,0 +1,36 @@ +/* + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "soc/gpio_sig_map.h" +#include "soc/dedic_gpio_periph.h" + +const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { + .irq = -1, + .cores = { + [0] = { + .in_sig_per_channel = { + [0] = CPU_GPIO_IN0_IDX, + [1] = CPU_GPIO_IN1_IDX, + [2] = CPU_GPIO_IN2_IDX, + [3] = CPU_GPIO_IN3_IDX, + [4] = CPU_GPIO_IN4_IDX, + [5] = CPU_GPIO_IN5_IDX, + [6] = CPU_GPIO_IN6_IDX, + [7] = CPU_GPIO_IN7_IDX, + }, + .out_sig_per_channel = { + [0] = CPU_GPIO_OUT0_IDX, + [1] = CPU_GPIO_OUT1_IDX, + [2] = CPU_GPIO_OUT2_IDX, + [3] = CPU_GPIO_OUT3_IDX, + [4] = CPU_GPIO_OUT4_IDX, + [5] = CPU_GPIO_OUT5_IDX, + [6] = CPU_GPIO_OUT6_IDX, + [7] = CPU_GPIO_OUT7_IDX, + } + }, + }, +}; diff --git a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in index 181dc73c47..466607e158 100644 --- a/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32c5/include/soc/Kconfig.soc_caps.in @@ -7,6 +7,10 @@ config SOC_ADC_SUPPORTED bool default y +config SOC_DEDICATED_GPIO_SUPPORTED + bool + default y + config SOC_UART_SUPPORTED bool default y @@ -463,6 +467,18 @@ config SOC_RTCIO_WAKE_SUPPORTED bool default y +config SOC_DEDIC_GPIO_OUT_CHANNELS_NUM + int + default 8 + +config SOC_DEDIC_GPIO_IN_CHANNELS_NUM + int + default 8 + +config SOC_DEDIC_PERIPH_ALWAYS_ENABLE + bool + default y + config SOC_I2C_NUM int default 1 diff --git a/components/soc/esp32c5/include/soc/soc_caps.h b/components/soc/esp32c5/include/soc/soc_caps.h index c608de7ac8..6e02acdff0 100644 --- a/components/soc/esp32c5/include/soc/soc_caps.h +++ b/components/soc/esp32c5/include/soc/soc_caps.h @@ -18,7 +18,7 @@ /*-------------------------- COMMON CAPS ---------------------------------------*/ #define SOC_ADC_SUPPORTED 1 -// #define SOC_DEDICATED_GPIO_SUPPORTED 1 // TODO: [ESP32C5] IDF-8725 +#define SOC_DEDICATED_GPIO_SUPPORTED 1 #define SOC_UART_SUPPORTED 1 #define SOC_GDMA_SUPPORTED 1 #define SOC_AHB_GDMA_SUPPORTED 1 @@ -234,9 +234,9 @@ #define SOC_RTCIO_WAKE_SUPPORTED 1 /*-------------------------- Dedicated GPIO CAPS -----------------------------*/ -// #define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */ -// #define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */ -// #define SOC_DEDIC_PERIPH_ALWAYS_ENABLE (1) /*!< The dedicated GPIO (a.k.a. fast GPIO) is featured by some customized CPU instructions, which is always enabled */ +#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (8) /*!< 8 outward channels on each CPU core */ +#define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (8) /*!< 8 inward channels on each CPU core */ +#define SOC_DEDIC_PERIPH_ALWAYS_ENABLE (1) /*!< The dedicated GPIO (a.k.a. fast GPIO) is featured by some customized CPU instructions, which is always enabled */ /*-------------------------- I2C CAPS ----------------------------------------*/ // ESP32-C5 has 1 I2C diff --git a/components/soc/esp32c6/dedic_gpio_periph.c b/components/soc/esp32c6/dedic_gpio_periph.c index 1321608a3e..58fc3671a7 100644 --- a/components/soc/esp32c6/dedic_gpio_periph.c +++ b/components/soc/esp32c6/dedic_gpio_periph.c @@ -8,7 +8,6 @@ #include "soc/dedic_gpio_periph.h" const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { - .module = -1, .irq = -1, .cores = { [0] = { diff --git a/components/soc/esp32h2/dedic_gpio_periph.c b/components/soc/esp32h2/dedic_gpio_periph.c index 711274f893..45e0fd7a23 100644 --- a/components/soc/esp32h2/dedic_gpio_periph.c +++ b/components/soc/esp32h2/dedic_gpio_periph.c @@ -8,7 +8,6 @@ #include "soc/dedic_gpio_periph.h" const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { - .module = -1, .irq = -1, .cores = { [0] = { diff --git a/components/soc/esp32s2/dedic_gpio_periph.c b/components/soc/esp32s2/dedic_gpio_periph.c index d953ca659e..8ebcb4cfd5 100644 --- a/components/soc/esp32s2/dedic_gpio_periph.c +++ b/components/soc/esp32s2/dedic_gpio_periph.c @@ -1,22 +1,13 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "soc/dedic_gpio_periph.h" #include "soc/gpio_sig_map.h" const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { - .module = PERIPH_DEDIC_GPIO_MODULE, .irq = ETS_DEDICATED_GPIO_INTR_SOURCE, .cores = { [0] = { diff --git a/components/soc/esp32s3/dedic_gpio_periph.c b/components/soc/esp32s3/dedic_gpio_periph.c index 929cc7000e..e4f4166785 100644 --- a/components/soc/esp32s3/dedic_gpio_periph.c +++ b/components/soc/esp32s3/dedic_gpio_periph.c @@ -1,22 +1,13 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include "soc/dedic_gpio_periph.h" #include "soc/gpio_sig_map.h" const dedic_gpio_signal_conn_t dedic_gpio_periph_signals = { - .module = PERIPH_DEDIC_GPIO_MODULE, .irq = -1, .cores = { [0] = { diff --git a/components/soc/include/soc/dedic_gpio_periph.h b/components/soc/include/soc/dedic_gpio_periph.h index f6eeeeb5e7..c0b6720b70 100644 --- a/components/soc/include/soc/dedic_gpio_periph.h +++ b/components/soc/include/soc/dedic_gpio_periph.h @@ -1,16 +1,8 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once @@ -25,7 +17,6 @@ extern "C" { #if SOC_DEDICATED_GPIO_SUPPORTED typedef struct { - const periph_module_t module; // Peripheral module const int irq; // Interrupt resource (-1 means no interrupt supported) struct { const int in_sig_per_channel[SOC_DEDIC_GPIO_IN_CHANNELS_NUM]; diff --git a/examples/peripherals/dedicated_gpio/soft_i2c/README.md b/examples/peripherals/dedicated_gpio/soft_i2c/README.md index d9b5a6697d..48c2226b77 100644 --- a/examples/peripherals/dedicated_gpio/soft_i2c/README.md +++ b/examples/peripherals/dedicated_gpio/soft_i2c/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | # Example: Software I2C Master via Dedicated/Fast GPIOs diff --git a/examples/peripherals/dedicated_gpio/soft_spi/README.md b/examples/peripherals/dedicated_gpio/soft_spi/README.md index beb35c9142..7bfae455bb 100644 --- a/examples/peripherals/dedicated_gpio/soft_spi/README.md +++ b/examples/peripherals/dedicated_gpio/soft_spi/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | -| ----------------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | +| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | # Example: SPI software emulation using dedicated/fast GPIOs diff --git a/examples/peripherals/dedicated_gpio/soft_uart/README.md b/examples/peripherals/dedicated_gpio/soft_uart/README.md index 9d4481ff64..7236a047b8 100644 --- a/examples/peripherals/dedicated_gpio/soft_uart/README.md +++ b/examples/peripherals/dedicated_gpio/soft_uart/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | -| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | +| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | +| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | # Example: UART software emulation using dedicated/fast GPIOs diff --git a/examples/peripherals/dedicated_gpio/soft_uart/components/soft_uart/riscv/soft_uart.S b/examples/peripherals/dedicated_gpio/soft_uart/components/soft_uart/riscv/soft_uart.S index afb0f56be8..afde13ed69 100644 --- a/examples/peripherals/dedicated_gpio/soft_uart/components/soft_uart/riscv/soft_uart.S +++ b/examples/peripherals/dedicated_gpio/soft_uart/components/soft_uart/riscv/soft_uart.S @@ -4,12 +4,18 @@ * SPDX-License-Identifier: CC0-1.0 */ #include "sdkconfig.h" + #include "soc/soc_caps.h" /* RISC-V fast GPIO special registers, taken from "hal/dedic_gpio_cpu_ll.h" */ #define CSR_GPIO_IN_USER 0x804 #define CSR_GPIO_OUT_USER 0x805 /* Special register for machine cycle count */ + +#if SOC_CPU_HAS_CSR_PC #define CSR_PCCR_MACHINE 0x7e2 +#else + #define CSR_PCCR_MACHINE mcycle +#endif .section .text diff --git a/examples/peripherals/parlio/parlio_tx/simple_rgb_led_matrix/README.md b/examples/peripherals/parlio/parlio_tx/simple_rgb_led_matrix/README.md index db62a41730..35ee2e30d4 100644 --- a/examples/peripherals/parlio/parlio_tx/simple_rgb_led_matrix/README.md +++ b/examples/peripherals/parlio/parlio_tx/simple_rgb_led_matrix/README.md @@ -1,5 +1,5 @@ -| Supported Targets | ESP32-C6 | ESP32-H2 | ESP32-P4 | -| ----------------- | -------- | -------- | -------- | +| Supported Targets | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | +| ----------------- | -------- | -------- | -------- | -------- | # Parallel IO TX Example: Simple RGB LED Matrix diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt index b45b0680a9..5a94cf6adb 100644 --- a/tools/ci/check_copyright_ignore.txt +++ b/tools/ci/check_copyright_ignore.txt @@ -590,7 +590,6 @@ components/soc/esp32c3/include/soc/wdev_reg.h components/soc/esp32c3/interrupts.c components/soc/esp32c3/ledc_periph.c components/soc/esp32s2/adc_periph.c -components/soc/esp32s2/dedic_gpio_periph.c components/soc/esp32s2/i2c_periph.c components/soc/esp32s2/include/soc/apb_saradc_reg.h components/soc/esp32s2/include/soc/assist_debug_reg.h @@ -626,7 +625,6 @@ components/soc/esp32s2/include/soc/usb_wrap_reg.h components/soc/esp32s2/include/soc/usb_wrap_struct.h components/soc/esp32s2/include/soc/wdev_reg.h components/soc/esp32s2/ledc_periph.c -components/soc/esp32s3/dedic_gpio_periph.c components/soc/esp32s3/i2c_periph.c components/soc/esp32s3/include/soc/apb_saradc_reg.h components/soc/esp32s3/include/soc/assist_debug_reg.h @@ -684,7 +682,6 @@ components/soc/esp32s3/include/soc/usb_wrap_reg.h components/soc/esp32s3/include/soc/usb_wrap_struct.h components/soc/esp32s3/include/soc/wdev_reg.h components/soc/esp32s3/ledc_periph.c -components/soc/include/soc/dedic_gpio_periph.h components/soc/include/soc/gpio_periph.h components/soc/include/soc/ledc_periph.h components/soc/lldesc.c