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adc: no longer support adc2 continuous mode on esp32c3
Due to HW limitation, we don't support this anymore. On c3, ADC2 under continuous mode is not stable. However, you can enable CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3 to force use ADC2. Refer to errata to know more details: https://www.espressif.com/sites/default/files/documentation/esp32-c3_errata_en.pdf
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@ -19,6 +19,17 @@ menu "Driver configurations"
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For testing, disable this option so that we can measure the output of DAC by internal ADC.
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config ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3
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depends on IDF_TARGET_ESP32C3
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bool "Force use ADC2 continumous mode on ESP32C3"
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default n
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help
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On ESP32C3, ADC2 Digital Controller is not stable. Therefore,
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ADC2 continuous mode is not suggested on ESP32C3
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If you stick to this, you can enable this option to force use ADC2 under above conditions.
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For more details, you can search for errata on espressif website.
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endmenu # ADC Configuration
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menu "SPI configuration"
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@ -576,6 +576,21 @@ esp_err_t adc_digi_controller_config(const adc_digi_config_t *config)
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}
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ADC_CHECK(config->sample_freq_hz <= SOC_ADC_SAMPLE_FREQ_THRES_HIGH && config->sample_freq_hz >= SOC_ADC_SAMPLE_FREQ_THRES_LOW, "ADC sampling frequency out of range", ESP_ERR_INVALID_ARG);
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#if !CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3
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for (int i = 0; i < config->adc_pattern_len; i++) {
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if (config->adc_pattern[i].unit == ADC_NUM_2) {
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//we add this error log to hint users what happened
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ESP_LOGE(ADC_TAG, "ADC2 continuous mode is no longer supported, please use ADC1. Search for errata on espressif website for more details. You can enable CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3 to force use ADC2");
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/**
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* On all continuous mode supported chips, we will always check the unit to see if it's a continuous mode supported unit.
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* However, on ESP32C3 and ESP32S3, we will jump this check, if `CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3` is enabled.
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*/
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ESP_LOGE(ADC_TAG, "Only support using ADC1 DMA mode");
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return ESP_ERR_INVALID_ARG;
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}
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}
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#endif //#if !CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3
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s_adc_digi_ctx->digi_controller_config.conv_limit_en = config->conv_limit_en;
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s_adc_digi_ctx->digi_controller_config.conv_limit_num = config->conv_limit_num;
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s_adc_digi_ctx->digi_controller_config.adc_pattern_len = config->adc_pattern_len;
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@ -58,8 +58,9 @@ ADC Limitations
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.. only:: esp32c3
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- A specific ADC module can only work under one operating mode at any one time, either Continuous Read Mode or Single Read Mode.
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- ADC1 and ADC2 can not work under Singel Read Mode simultaneously. One of them will get blocked until another one finishes.
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- For continuous (DMA) read mode, the ADC sampling frequency (the ``sample_freq_hz`` member of :cpp:type:`adc_digi_config_t`) should be within ``SOC_ADC_SAMPLE_FREQ_THRES_LOW`` and ``SOC_ADC_SAMPLE_FREQ_THRES_HIGH``.
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- For continuous (DMA) read mode, the ADC sampling frequency (the ``sample_freq_hz`` member of :cpp:type:`adc_digi_config_t`) should be within ``SOC_ADC_SAMPLE_FREQ_THRES_LOW`` and ``SOC_ADC_SAMPLE_FREQ_THRES_HIGH``
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- ADC2 continuous (DMA) mode is no longer supported, due to hardware limitation. The results are not stable. This issue can be found in `ESP32C3 Errata <https://www.espressif.com/sites/default/files/documentation/esp32-c3_errata_en.pdf>`. For compatibility, you can enable :ref:`CONFIG_ADC_CONTINUOUS_FORCE_USE_ADC2_ON_C3_S3` to force use ADC2.
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Driver Usage
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------------
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@ -8,7 +8,7 @@
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#define TIMES 256
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static void continuous_adc_init(uint16_t adc1_chan_mask, uint16_t adc2_chan_mask, adc_channel_t *channel, uint8_t channel_num)
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static void continuous_adc_init(uint16_t adc1_chan_mask, adc_channel_t *channel, uint8_t channel_num)
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{
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esp_err_t ret = ESP_OK;
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assert(ret == ESP_OK);
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@ -17,7 +17,7 @@ static void continuous_adc_init(uint16_t adc1_chan_mask, uint16_t adc2_chan_mask
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.max_store_buf_size = 1024,
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.conv_num_each_intr = 256,
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.adc1_chan_mask = adc1_chan_mask,
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.adc2_chan_mask = adc2_chan_mask,
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.adc2_chan_mask = 0,
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};
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ret = adc_digi_initialize(&adc_dma_config);
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assert(ret == ESP_OK);
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@ -61,10 +61,9 @@ static void continuous_read(void *arg)
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memset(result, 0xcc, TIMES);
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uint16_t adc1_chan_mask = BIT(0) | BIT(1);
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uint16_t adc2_chan_mask = BIT(0);
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adc_channel_t channel[3] = {ADC1_CHANNEL_0, ADC1_CHANNEL_1, (ADC2_CHANNEL_0 | 1 << 3)};
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adc_channel_t channel[3] = {ADC1_CHANNEL_0, ADC1_CHANNEL_1};
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continuous_adc_init(adc1_chan_mask, adc2_chan_mask, channel, sizeof(channel) / sizeof(adc_channel_t));
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continuous_adc_init(adc1_chan_mask, channel, sizeof(channel) / sizeof(adc_channel_t));
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adc_digi_start();
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int n = 20;
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