test(newlib): enable and fix newlib tests on P4

This commit is contained in:
Marius Vikhammer 2024-01-17 16:46:32 +08:00
parent 58fb179845
commit 9ab0d95f65
7 changed files with 25 additions and 15 deletions

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@ -54,3 +54,7 @@ config ESP_ROM_HAS_LP_ROM
config ESP_ROM_WITHOUT_REGI2C
bool
default y
config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
bool
default y

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@ -19,3 +19,4 @@
#define ESP_ROM_WDT_INIT_PATCH (1) // ROM version does not configure the clock
#define ESP_ROM_HAS_LP_ROM (1) // ROM also has a LP ROM placed in LP memory
#define ESP_ROM_WITHOUT_REGI2C (1) // ROM has no regi2c APIs
#define ESP_ROM_HAS_NEWLIB_NANO_FORMAT (1) // ROM has the newlib nano version of formatting functions

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@ -1,7 +0,0 @@
# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
components/newlib/test_apps/newlib:
disable:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: not supported yet #TODO: IDF-7862

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@ -1,2 +1,2 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |

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@ -132,7 +132,7 @@ static bool fn_in_rom(void *fn)
/* Older chips have newlib nano in rom as well, but this is not linked in due to us now using 64 bit time_t
and the ROM code was compiled for 32 bit.
*/
#define PRINTF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && (CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2))
#define PRINTF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && (CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4))
#define SSCANF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && CONFIG_IDF_TARGET_ESP32C2)
TEST_CASE("check if ROM or Flash is used for functions", "[newlib]")

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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -45,7 +45,14 @@
#include "esp32p4/rtc.h"
#endif
#if portNUM_PROCESSORS == 2
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
#include "hal/cache_ll.h"
#endif
#if (portNUM_PROCESSORS == 2) && CONFIG_IDF_TARGET_ARCH_XTENSA
// https://github.com/espressif/arduino-esp32/issues/120
/* Test for hardware bug, not needed for newer chips */
#include "soc/rtc_cntl_reg.h"
// This runs on APP CPU:
@ -65,7 +72,7 @@ static void time_adc_test_task(void* arg)
vTaskDelete(NULL);
}
// https://github.com/espressif/arduino-esp32/issues/120
TEST_CASE("Reading RTC registers on APP CPU doesn't affect clock", "[newlib]")
{
SemaphoreHandle_t done = xSemaphoreCreateBinary();
@ -85,7 +92,7 @@ TEST_CASE("Reading RTC registers on APP CPU doesn't affect clock", "[newlib]")
TEST_ASSERT_TRUE(xSemaphoreTake(done, 5000 / portTICK_PERIOD_MS));
}
#endif // portNUM_PROCESSORS == 2
#endif // (portNUM_PROCESSORS == 2) && CONFIG_IDF_TARGET_ARCH_XTENSA
TEST_CASE("test adjtime function", "[newlib]")
{
@ -609,6 +616,12 @@ static void set_initial_condition(type_reboot_t type_reboot, int error_time)
TEST_ASSERT_GREATER_OR_EQUAL(error_time, dt);
s_time_in_reboot = esp_rtc_get_time_us();
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
/* If internal data is behind a cache it might not be written to the physical memory when we crash/reboot
force a full writeback here to ensure this */
cache_ll_writeback_all(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA, CACHE_LL_ID_ALL);
#endif
if (type_reboot == TYPE_REBOOT_ABORT) {
printf("Update boot time based on diff\n");
esp_sync_timekeeping_timers();

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@ -31,7 +31,6 @@ def validate_sbom(dut: Dut) -> None:
assert toolchain_newlib_version == sbom_newlib_version, 'toolchain_newlib_version != sbom_newlib_version'
@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='esp32p4 support TBD') # TODO: IDF-8983
@pytest.mark.generic
@pytest.mark.parametrize(
'config',