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test(newlib): enable and fix newlib tests on P4
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@ -54,3 +54,7 @@ config ESP_ROM_HAS_LP_ROM
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config ESP_ROM_WITHOUT_REGI2C
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bool
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default y
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config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
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bool
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default y
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@ -19,3 +19,4 @@
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#define ESP_ROM_WDT_INIT_PATCH (1) // ROM version does not configure the clock
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#define ESP_ROM_HAS_LP_ROM (1) // ROM also has a LP ROM placed in LP memory
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#define ESP_ROM_WITHOUT_REGI2C (1) // ROM has no regi2c APIs
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#define ESP_ROM_HAS_NEWLIB_NANO_FORMAT (1) // ROM has the newlib nano version of formatting functions
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@ -1,7 +0,0 @@
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# Documentation: .gitlab/ci/README.md#manifest-file-to-control-the-buildtest-apps
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components/newlib/test_apps/newlib:
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disable:
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- if: IDF_TARGET == "esp32p4"
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temporary: true
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reason: not supported yet #TODO: IDF-7862
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@ -1,2 +1,2 @@
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- |
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| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
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| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
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@ -132,7 +132,7 @@ static bool fn_in_rom(void *fn)
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/* Older chips have newlib nano in rom as well, but this is not linked in due to us now using 64 bit time_t
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and the ROM code was compiled for 32 bit.
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*/
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#define PRINTF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && (CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2))
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#define PRINTF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && (CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4))
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#define SSCANF_NANO_IN_ROM (CONFIG_NEWLIB_NANO_FORMAT && CONFIG_IDF_TARGET_ESP32C2)
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TEST_CASE("check if ROM or Flash is used for functions", "[newlib]")
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -45,7 +45,14 @@
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#include "esp32p4/rtc.h"
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#endif
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#if portNUM_PROCESSORS == 2
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#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
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#include "hal/cache_ll.h"
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#endif
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#if (portNUM_PROCESSORS == 2) && CONFIG_IDF_TARGET_ARCH_XTENSA
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// https://github.com/espressif/arduino-esp32/issues/120
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/* Test for hardware bug, not needed for newer chips */
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#include "soc/rtc_cntl_reg.h"
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// This runs on APP CPU:
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@ -65,7 +72,7 @@ static void time_adc_test_task(void* arg)
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vTaskDelete(NULL);
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}
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// https://github.com/espressif/arduino-esp32/issues/120
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TEST_CASE("Reading RTC registers on APP CPU doesn't affect clock", "[newlib]")
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{
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SemaphoreHandle_t done = xSemaphoreCreateBinary();
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@ -85,7 +92,7 @@ TEST_CASE("Reading RTC registers on APP CPU doesn't affect clock", "[newlib]")
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TEST_ASSERT_TRUE(xSemaphoreTake(done, 5000 / portTICK_PERIOD_MS));
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}
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#endif // portNUM_PROCESSORS == 2
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#endif // (portNUM_PROCESSORS == 2) && CONFIG_IDF_TARGET_ARCH_XTENSA
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TEST_CASE("test adjtime function", "[newlib]")
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{
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@ -609,6 +616,12 @@ static void set_initial_condition(type_reboot_t type_reboot, int error_time)
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TEST_ASSERT_GREATER_OR_EQUAL(error_time, dt);
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s_time_in_reboot = esp_rtc_get_time_us();
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#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
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/* If internal data is behind a cache it might not be written to the physical memory when we crash/reboot
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force a full writeback here to ensure this */
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cache_ll_writeback_all(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA, CACHE_LL_ID_ALL);
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#endif
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if (type_reboot == TYPE_REBOOT_ABORT) {
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printf("Update boot time based on diff\n");
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esp_sync_timekeeping_timers();
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@ -31,7 +31,6 @@ def validate_sbom(dut: Dut) -> None:
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assert toolchain_newlib_version == sbom_newlib_version, 'toolchain_newlib_version != sbom_newlib_version'
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@pytest.mark.temp_skip_ci(targets=['esp32p4'], reason='esp32p4 support TBD') # TODO: IDF-8983
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@pytest.mark.generic
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@pytest.mark.parametrize(
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'config',
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