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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
phyinit: Use PHY config to enable, don't need phy_get_romfunc_addr to init
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efbd2805e2
commit
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@ -3,16 +3,14 @@
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#
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COMPONENT_SRCDIRS := . hwcrypto
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LIBS := core rtc phy
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ifdef CONFIG_BT_ENABLED
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LIBS += coexist
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LIBS := core rtc
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ifdef CONFIG_PHY_ENABLED # BT || WIFI
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LIBS += phy coexist
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endif
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ifdef CONFIG_WIFI_ENABLED
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LIBS += net80211 pp wpa smartconfig coexist wps wpa2
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endif
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LIBS := $(sort $(LIBS)) # de-duplicate, we can handle different orders here
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LINKER_SCRIPTS += esp32.common.ld esp32.rom.ld esp32.peripherals.ld
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ifeq ("$(CONFIG_NEWLIB_NANO_FORMAT)","y")
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@ -17,7 +17,6 @@
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#include "rom/ets_sys.h"
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#include "rom/uart.h"
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#include "sdkconfig.h"
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#include "phy.h"
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#include "rtc.h"
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#include "soc/soc.h"
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#include "soc/rtc_cntl_reg.h"
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@ -32,7 +31,6 @@
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void esp_set_cpu_freq(void)
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{
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uint32_t freq_mhz = CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ;
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phy_get_romfunc_addr();
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// freq will be changed to 40MHz in rtc_init_lite,
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// wait uart tx finish, otherwise some uart output will be lost
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@ -25,8 +25,7 @@ extern "C" {
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*/
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/**
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* @brief Initialize function pointer table in PHY library.
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* @note This function should be called before register_chipv7_phy.
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* @brief Return ROM function pointer table from PHY library.
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*/
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void phy_get_romfunc_addr(void);
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@ -27,7 +27,7 @@
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#include "nvs.h"
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#include "sdkconfig.h"
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#ifdef CONFIG_WIFI_ENABLED
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#ifdef CONFIG_PHY_ENABLED
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#include "phy.h"
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#include "phy_init_data.h"
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@ -39,8 +39,7 @@ esp_err_t esp_phy_init(const esp_phy_init_data_t* init_data,
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{
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assert(init_data);
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assert(calibration_data);
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// Initialize PHY pointer table
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phy_get_romfunc_addr();
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REG_SET_BIT(DPORT_CORE_RST_EN_REG, DPORT_MAC_RST);
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REG_CLR_BIT(DPORT_CORE_RST_EN_REG, DPORT_MAC_RST);
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// Enable WiFi peripheral clock
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@ -221,4 +220,4 @@ static esp_err_t store_cal_data_to_nvs_handle(nvs_handle handle,
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return err;
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}
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#endif // CONFIG_WIFI_ENABLED
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#endif // CONFIG_PHY_ENABLED
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