alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-09-19 14:26:01 -04:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

feat(esp_hw_support): support pmu init and sleep for esp32c5

Browse Source 
fix(ci): add efuse header in pmu_sleep
This commit is contained in:
Lou Tianhao 2024-06-20 17:21:52 +08:00
parent 3e70dafa0b
commit 980ec70d0a
14 changed files with 52 additions and 33 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
components/esp_adc/adc_oneshot.c
View File

@ -126,7 +126,7 @@ esp_err_t adc_oneshot_new_unit(const adc_oneshot_unit_init_cfg_t *init_config, a
if (init_config->ulp_mode == ADC_ULP_MODE_DISABLE) { if (init_config->ulp_mode == ADC_ULP_MODE_DISABLE) {
sar_periph_ctrl_adc_oneshot_power_acquire(); sar_periph_ctrl_adc_oneshot_power_acquire();
} else { } else {
#if !CONFIG_IDF_TARGET_ESP32C5// # TODO: IDF-8638, IDF-8640 #if SOC_LIGHT_SLEEP_SUPPORTED
esp_sleep_enable_adc_tsens_monitor(true); esp_sleep_enable_adc_tsens_monitor(true);
#endif #endif
} }
@ -229,7 +229,7 @@ esp_err_t adc_oneshot_del_unit(adc_oneshot_unit_handle_t handle)
if (ulp_mode == ADC_ULP_MODE_DISABLE) { if (ulp_mode == ADC_ULP_MODE_DISABLE) {
sar_periph_ctrl_adc_oneshot_power_release(); sar_periph_ctrl_adc_oneshot_power_release();
} else { } else {
#if !CONFIG_IDF_TARGET_ESP32C5// # TODO: IDF-8638, IDF-8640 #if SOC_LIGHT_SLEEP_SUPPORTED
esp_sleep_enable_adc_tsens_monitor(false); esp_sleep_enable_adc_tsens_monitor(false);
#endif #endif
} }

4
components/esp_driver_gpio/src/gpio.c
View File

@ -975,7 +975,7 @@ esp_err_t gpio_sleep_pupd_config_unapply(gpio_num_t gpio_num)
} }
#endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL #endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED
esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type) esp_err_t gpio_deep_sleep_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
{ {
if (!GPIO_IS_DEEP_SLEEP_WAKEUP_VALID_GPIO(gpio_num)) { if (!GPIO_IS_DEEP_SLEEP_WAKEUP_VALID_GPIO(gpio_num)) {
@ -1015,7 +1015,7 @@ esp_err_t gpio_deep_sleep_wakeup_disable(gpio_num_t gpio_num)
portEXIT_CRITICAL(&gpio_context.gpio_spinlock); portEXIT_CRITICAL(&gpio_context.gpio_spinlock);
return ESP_OK; return ESP_OK;
} }
#endif // SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP #endif // SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED
esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask) esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask)
{ {

2
components/esp_hw_support/CMakeLists.txt
View File

@ -145,8 +145,6 @@ if(NOT BOOTLOADER_BUILD)
if(CONFIG_IDF_TARGET_ESP32C5) if(CONFIG_IDF_TARGET_ESP32C5)
list(REMOVE_ITEM srcs list(REMOVE_ITEM srcs
"sleep_modes.c" # TODO: [ESP32C5] IDF-8638
"sleep_modem.c" # TODO: [ESP32C5] IDF-8638
"sleep_wake_stub.c" # TODO: [ESP32C5] IDF-8638 "sleep_wake_stub.c" # TODO: [ESP32C5] IDF-8638
"sleep_gpio.c" # TODO: [ESP32C5] IDF-8638 "sleep_gpio.c" # TODO: [ESP32C5] IDF-8638
) )

8
components/esp_hw_support/modem_clock.c
View File

@ -411,13 +411,13 @@ void modem_clock_select_lp_clock_source(periph_module_t module, modem_clock_lpcl
default: default:
break; break;
} }
#if SOC_LIGHT_SLEEP_SUPPORTED // TODO: [ESP32C5] IDF-8643 #if SOC_LIGHT_SLEEP_SUPPORTED
modem_clock_lpclk_src_t last_src = MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN]; modem_clock_lpclk_src_t last_src = MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN];
#endif #endif
MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN] = src; MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN] = src;
portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock);
#if SOC_LIGHT_SLEEP_SUPPORTED // TODO: [ESP32C5] IDF-8643 #if SOC_LIGHT_SLEEP_SUPPORTED
/* The power domain of the low-power clock source required by the modem /* The power domain of the low-power clock source required by the modem
* module remains powered on during sleep */ * module remains powered on during sleep */
esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) ( \ esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) ( \
@ -441,7 +441,7 @@ void modem_clock_deselect_lp_clock_source(periph_module_t module)
{ {
assert(IS_MODEM_MODULE(module)); assert(IS_MODEM_MODULE(module));
portENTER_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); portENTER_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock);
#if SOC_LIGHT_SLEEP_SUPPORTED // TODO: [ESP32C5] IDF-8643 #if SOC_LIGHT_SLEEP_SUPPORTED
modem_clock_lpclk_src_t last_src = MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN]; modem_clock_lpclk_src_t last_src = MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN];
#endif #endif
MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN] = MODEM_CLOCK_LPCLK_SRC_INVALID; MODEM_CLOCK_instance()->lpclk_src[module - PERIPH_MODEM_MODULE_MIN] = MODEM_CLOCK_LPCLK_SRC_INVALID;
@ -478,13 +478,13 @@ void modem_clock_deselect_lp_clock_source(periph_module_t module)
} }
portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock); portEXIT_CRITICAL_SAFE(&MODEM_CLOCK_instance()->lock);
#if SOC_LIGHT_SLEEP_SUPPORTED // TODO: [ESP32C5] IDF-8643
esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) ( \ esp_sleep_pd_domain_t pd_domain = (esp_sleep_pd_domain_t) ( \
(last_src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST \ (last_src == MODEM_CLOCK_LPCLK_SRC_RC_FAST) ? ESP_PD_DOMAIN_RC_FAST \
: (last_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL \ : (last_src == MODEM_CLOCK_LPCLK_SRC_MAIN_XTAL) ? ESP_PD_DOMAIN_XTAL \
: (last_src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K \ : (last_src == MODEM_CLOCK_LPCLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K \
: (last_src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K \ : (last_src == MODEM_CLOCK_LPCLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K \
: ESP_PD_DOMAIN_MAX); : ESP_PD_DOMAIN_MAX);
#if SOC_LIGHT_SLEEP_SUPPORTED
esp_sleep_pd_config(pd_domain, ESP_PD_OPTION_OFF); esp_sleep_pd_config(pd_domain, ESP_PD_OPTION_OFF);
#endif #endif
} }

3
components/esp_hw_support/port/esp32c5/CMakeLists.txt
View File

@ -1,8 +1,9 @@
set(srcs "rtc_clk_init.c" set(srcs "rtc_clk_init.c"
"rtc_time.c" "rtc_time.c"
"rtc_clk.c" "rtc_clk.c"
"pmu_init.c"
"pmu_param.c" "pmu_param.c"
"pmu_init.c"
"pmu_sleep.c"
"chip_info.c" "chip_info.c"
) )

2
components/esp_hw_support/port/esp32c5/pmu_sleep.c
View File

@ -15,6 +15,8 @@
#include "soc/rtc.h" #include "soc/rtc.h"
#include "soc/pmu_struct.h" #include "soc/pmu_struct.h"
#include "hal/lp_aon_hal.h" #include "hal/lp_aon_hal.h"
#include "hal/efuse_ll.h"
#include "hal/efuse_hal.h"
#include "esp_private/esp_pmu.h" #include "esp_private/esp_pmu.h"
#include "pmu_param.h" #include "pmu_param.h"

1
components/esp_hw_support/port/esp32c5/private_include/pmu_param.h
View File

@ -13,7 +13,6 @@
#include "soc/pmu_struct.h" #include "soc/pmu_struct.h"
#include "hal/pmu_hal.h" #include "hal/pmu_hal.h"
// TODO: [ESP32C5] IDF-8643
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {

20
components/esp_hw_support/sleep_modes.c
View File

@ -149,7 +149,7 @@
#elif CONFIG_IDF_TARGET_ESP32C6 #elif CONFIG_IDF_TARGET_ESP32C6
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (318) #define DEFAULT_SLEEP_OUT_OVERHEAD_US (318)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (56) #define DEFAULT_HARDWARE_OUT_OVERHEAD_US (56)
#elif CONFIG_IDF_TARGET_ESP32C5 // TODO: [ESP32C5] IDF-8638 #elif CONFIG_IDF_TARGET_ESP32C5
#define DEFAULT_SLEEP_OUT_OVERHEAD_US (318) #define DEFAULT_SLEEP_OUT_OVERHEAD_US (318)
#define DEFAULT_HARDWARE_OUT_OVERHEAD_US (56) #define DEFAULT_HARDWARE_OUT_OVERHEAD_US (56)
#elif CONFIG_IDF_TARGET_ESP32H2 #elif CONFIG_IDF_TARGET_ESP32H2
@ -289,7 +289,7 @@ static esp_err_t timer_wakeup_prepare(int64_t sleep_duration);
#if SOC_TOUCH_SENSOR_SUPPORTED && SOC_TOUCH_SENSOR_VERSION != 1 #if SOC_TOUCH_SENSOR_SUPPORTED && SOC_TOUCH_SENSOR_VERSION != 1
static void touch_wakeup_prepare(void); static void touch_wakeup_prepare(void);
#endif #endif
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED
static void gpio_deep_sleep_wakeup_prepare(void); static void gpio_deep_sleep_wakeup_prepare(void);
#endif #endif
@ -814,7 +814,7 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m
// for !(s_config.wakeup_triggers & RTC_EXT1_TRIG_EN), ext1 wakeup will be turned off in hardware in the real call to sleep // for !(s_config.wakeup_triggers & RTC_EXT1_TRIG_EN), ext1 wakeup will be turned off in hardware in the real call to sleep
#endif #endif
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED
if (deep_sleep && (s_config.wakeup_triggers & RTC_GPIO_TRIG_EN)) { if (deep_sleep && (s_config.wakeup_triggers & RTC_GPIO_TRIG_EN)) {
gpio_deep_sleep_wakeup_prepare(); gpio_deep_sleep_wakeup_prepare();
} }
@ -1668,8 +1668,10 @@ bool esp_sleep_is_valid_wakeup_gpio(gpio_num_t gpio_num)
{ {
#if SOC_RTCIO_PIN_COUNT > 0 #if SOC_RTCIO_PIN_COUNT > 0
return RTC_GPIO_IS_VALID_GPIO(gpio_num); return RTC_GPIO_IS_VALID_GPIO(gpio_num);
#else #elif SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP
return GPIO_IS_DEEP_SLEEP_WAKEUP_VALID_GPIO(gpio_num); return GPIO_IS_DEEP_SLEEP_WAKEUP_VALID_GPIO(gpio_num);
#else
return false;
#endif #endif
} }
@ -1890,7 +1892,7 @@ uint64_t esp_sleep_get_ext1_wakeup_status(void)
#endif // SOC_PM_SUPPORT_EXT1_WAKEUP #endif // SOC_PM_SUPPORT_EXT1_WAKEUP
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED
uint64_t esp_sleep_get_gpio_wakeup_status(void) uint64_t esp_sleep_get_gpio_wakeup_status(void)
{ {
if (esp_sleep_get_wakeup_cause() != ESP_SLEEP_WAKEUP_GPIO) { if (esp_sleep_get_wakeup_cause() != ESP_SLEEP_WAKEUP_GPIO) {
@ -1949,7 +1951,7 @@ esp_err_t esp_deep_sleep_enable_gpio_wakeup(uint64_t gpio_pin_mask, esp_deepslee
return err; return err;
} }
#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP #endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && SOC_DEEP_SLEEP_SUPPORTED
esp_err_t esp_sleep_enable_gpio_wakeup(void) esp_err_t esp_sleep_enable_gpio_wakeup(void)
{ {
@ -2117,7 +2119,7 @@ esp_err_t esp_sleep_pd_config(esp_sleep_pd_domain_t domain, esp_sleep_pd_option_
* the TOP is powered off. If not power down XTAL, power down TOP is meaningless, and * the TOP is powered off. If not power down XTAL, power down TOP is meaningless, and
* the XTAL clock control of some chips(esp32c6/esp32h2) depends on the top domain. * the XTAL clock control of some chips(esp32c6/esp32h2) depends on the top domain.
*/ */
#if SOC_PM_SUPPORT_TOP_PD #if SOC_PM_SUPPORT_TOP_PD && SOC_PAU_SUPPORTED
FORCE_INLINE_ATTR bool top_domain_pd_allowed(void) { FORCE_INLINE_ATTR bool top_domain_pd_allowed(void) {
bool top_pd_allowed = true; bool top_pd_allowed = true;
#if ESP_SLEEP_POWER_DOWN_CPU #if ESP_SLEEP_POWER_DOWN_CPU
@ -2259,13 +2261,13 @@ static uint32_t get_power_down_flags(void)
if (s_config.domain[ESP_PD_DOMAIN_XTAL].pd_option != ESP_PD_OPTION_ON) { if (s_config.domain[ESP_PD_DOMAIN_XTAL].pd_option != ESP_PD_OPTION_ON) {
pd_flags |= RTC_SLEEP_PD_XTAL; pd_flags |= RTC_SLEEP_PD_XTAL;
} }
#if SOC_PM_SUPPORT_TOP_PD #if SOC_PM_SUPPORT_TOP_PD && SOC_PAU_SUPPORTED
if ((s_config.domain[ESP_PD_DOMAIN_TOP].pd_option != ESP_PD_OPTION_ON) && top_domain_pd_allowed()) { if ((s_config.domain[ESP_PD_DOMAIN_TOP].pd_option != ESP_PD_OPTION_ON) && top_domain_pd_allowed()) {
pd_flags |= PMU_SLEEP_PD_TOP; pd_flags |= PMU_SLEEP_PD_TOP;
} }
#endif #endif
#if SOC_PM_SUPPORT_MODEM_PD #if SOC_PM_SUPPORT_MODEM_PD && SOC_PAU_SUPPORTED
if ((s_config.domain[ESP_PD_DOMAIN_MODEM].pd_option != ESP_PD_OPTION_ON) && modem_domain_pd_allowed() if ((s_config.domain[ESP_PD_DOMAIN_MODEM].pd_option != ESP_PD_OPTION_ON) && modem_domain_pd_allowed()
#if SOC_PM_MODEM_RETENTION_BY_REGDMA #if SOC_PM_MODEM_RETENTION_BY_REGDMA
&& clock_domain_pd_allowed() && clock_domain_pd_allowed()

4
components/hal/include/hal/gpio_hal.h
View File

@ -479,7 +479,7 @@ void gpio_hal_sleep_pupd_config_apply(gpio_hal_context_t *hal, uint32_t gpio_num
void gpio_hal_sleep_pupd_config_unapply(gpio_hal_context_t *hal, uint32_t gpio_num); void gpio_hal_sleep_pupd_config_unapply(gpio_hal_context_t *hal, uint32_t gpio_num);
#endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL #endif // CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) && SOC_DEEP_SLEEP_SUPPORTED
/** /**
* @brief Enable GPIO deep-sleep wake-up function. * @brief Enable GPIO deep-sleep wake-up function.
* *
@ -506,7 +506,7 @@ void gpio_hal_sleep_pupd_config_unapply(gpio_hal_context_t *hal, uint32_t gpio_n
* @return True if the pin is enabled to wake up from deep-sleep * @return True if the pin is enabled to wake up from deep-sleep
*/ */
#define gpio_hal_deepsleep_wakeup_is_enabled(hal, gpio_num) gpio_ll_deepsleep_wakeup_is_enabled((hal)->dev, gpio_num) #define gpio_hal_deepsleep_wakeup_is_enabled(hal, gpio_num) gpio_ll_deepsleep_wakeup_is_enabled((hal)->dev, gpio_num)
#endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP #endif //SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) && SOC_DEEP_SLEEP_SUPPORTED
/** /**
* @brief Select a function for the pin in the IOMUX * @brief Select a function for the pin in the IOMUX

2
components/hal/include/hal/rtc_hal.h
View File

@ -84,7 +84,7 @@ typedef struct rtc_cntl_sleep_retent {
#endif #endif
#endif // SOC_PM_SUPPORT_EXT1_WAKEUP #endif // SOC_PM_SUPPORT_EXT1_WAKEUP
#if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) #if SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP && (SOC_RTCIO_PIN_COUNT == 0) && SOC_DEEP_SLEEP_SUPPORTED
#define rtc_hal_gpio_get_wakeup_status() rtc_cntl_ll_gpio_get_wakeup_status() #define rtc_hal_gpio_get_wakeup_status() rtc_cntl_ll_gpio_get_wakeup_status()

16
components/soc/esp32c5/include/soc/Kconfig.soc_caps.in
View File

@ -211,6 +211,14 @@ config SOC_MODEM_CLOCK_SUPPORTED
bool bool
default y default y
config SOC_LIGHT_SLEEP_SUPPORTED
bool
default y
config SOC_PM_SUPPORTED
bool
default y
config SOC_SPIRAM_SUPPORTED config SOC_SPIRAM_SUPPORTED
bool bool
default y default y
@ -1199,6 +1207,14 @@ config SOC_PM_SUPPORT_RTC_PERIPH_PD
bool bool
default y default y
config SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
bool
default y
config SOC_PM_CPU_RETENTION_BY_SW
bool
default y
config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION config SOC_CLK_RC_FAST_SUPPORT_CALIBRATION
bool bool
default y default y

11
components/soc/esp32c5/include/soc/soc_caps.h
View File

@ -59,7 +59,7 @@
#define SOC_IEEE802154_SUPPORTED 1 #define SOC_IEEE802154_SUPPORTED 1
#define SOC_BOD_SUPPORTED 1 #define SOC_BOD_SUPPORTED 1
#define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */ #define SOC_APM_SUPPORTED 1 /*!< Support for APM peripheral */
#define SOC_PMU_SUPPORTED 1 // TODO: [ESP32C5] IDF-8667 #define SOC_PMU_SUPPORTED 1
// #define SOC_PAU_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638 // #define SOC_PAU_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638
#define SOC_LP_TIMER_SUPPORTED 1 #define SOC_LP_TIMER_SUPPORTED 1
// #define SOC_LP_AON_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638 // #define SOC_LP_AON_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638
@ -75,10 +75,11 @@
#define SOC_RNG_SUPPORTED 1 #define SOC_RNG_SUPPORTED 1
// #define SOC_KEY_MANAGER_SUPPORTED 1 // TODO: [ESP32C5] IDF-8621 // #define SOC_KEY_MANAGER_SUPPORTED 1 // TODO: [ESP32C5] IDF-8621
// #define SOC_HUK_SUPPORTED 1 // TODO: [ESP32C5] IDF-8617 // #define SOC_HUK_SUPPORTED 1 // TODO: [ESP32C5] IDF-8617
// #define SOC_LIGHT_SLEEP_SUPPORTED 1 // TODO: [ESP32C5] IDF-8640
// #define SOC_DEEP_SLEEP_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638 // #define SOC_DEEP_SLEEP_SUPPORTED 1 // TODO: [ESP32C5] IDF-8638
#define SOC_MODEM_CLOCK_SUPPORTED 1 #define SOC_MODEM_CLOCK_SUPPORTED 1
// #define SOC_PM_SUPPORTED 1 // TODO: [ESP32C5] IDF-8643 #define SOC_LIGHT_SLEEP_SUPPORTED 1
#define SOC_PM_SUPPORTED 1
#define SOC_SPIRAM_SUPPORTED 1 #define SOC_SPIRAM_SUPPORTED 1
#define SOC_BT_SUPPORTED 1 #define SOC_BT_SUPPORTED 1
#define SOC_PHY_SUPPORTED 1 #define SOC_PHY_SUPPORTED 1
@ -552,9 +553,9 @@
/* macro redefine for pass esp_wifi headers md5sum check */ /* macro redefine for pass esp_wifi headers md5sum check */
// #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE // #define MAC_SUPPORT_PMU_MODEM_STATE SOC_PM_SUPPORT_PMU_MODEM_STATE
// #define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY (1) /*!<Supports CRC only the stub code in RTC memory */ #define SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY (1) /*!<Supports CRC only the stub code in RTC memory */
// #define SOC_PM_CPU_RETENTION_BY_SW (1) #define SOC_PM_CPU_RETENTION_BY_SW (1)
// #define SOC_PM_MODEM_RETENTION_BY_REGDMA (1) // #define SOC_PM_MODEM_RETENTION_BY_REGDMA (1)
// #define SOC_PM_RETENTION_HAS_CLOCK_BUG (1) // #define SOC_PM_RETENTION_HAS_CLOCK_BUG (1)

4
examples/system/esp_timer/README.md
View File

@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
# ESP Timer Example (High Resolution Timer) # ESP Timer Example (High Resolution Timer)

4
examples/system/light_sleep/README.md
View File

@ -1,5 +1,5 @@
| Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 | | Supported Targets | ESP32 | ESP32-C2 | ESP32-C3 | ESP32-C5 | ESP32-C6 | ESP32-H2 | ESP32-P4 | ESP32-S2 | ESP32-S3 |
| ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | | ----------------- | ----- | -------- | -------- | -------- | -------- | -------- | -------- | -------- | -------- |
# Light Sleep Example # Light Sleep Example