diff --git a/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld b/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld
index 9822ee9a02..cfef023bf9 100644
--- a/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld
+++ b/components/bootloader/subproject/main/ld/esp32s3/bootloader.ld
@@ -6,8 +6,8 @@
 
 MEMORY
 {
-  iram_seg (RWX) :                  org = 0x403B8000, len = 0x4000
-  iram_loader_seg (RWX) :           org = 0x403BC000, len = 0x4000
+  iram_seg (RWX) :                  org = 0x403B6000, len = 0x4000
+  iram_loader_seg (RWX) :           org = 0x403BA000, len = 0x6000
   dram_seg (RW) :                   org = 0x3FCD0000, len = 0x4000
 }
 
diff --git a/components/esp32s3/ld/esp32s3.ld b/components/esp32s3/ld/esp32s3.ld
index 33d16c902a..e35dd1c25b 100644
--- a/components/esp32s3/ld/esp32s3.ld
+++ b/components/esp32s3/ld/esp32s3.ld
@@ -11,7 +11,7 @@
 #define SRAM_IRAM_START     0x40370000
 #define SRAM_DRAM_START     0x3FC80000
 #define I_D_SRAM_OFFSET     (SRAM_IRAM_START - SRAM_DRAM_START)
-#define SRAM_DRAM_END       0x403BC000 - I_D_SRAM_OFFSET  /* 2nd stage bootloader iram_loader_seg start address */
+#define SRAM_DRAM_END       0x403BA000 - I_D_SRAM_OFFSET  /* 2nd stage bootloader iram_loader_seg start address */
 
 #define SRAM_IRAM_ORG       (SRAM_IRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)
 #define SRAM_DRAM_ORG       (SRAM_DRAM_START + CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE)