esp_phy: support esp32h2beta2 phy build

This commit is contained in:
zhangwenxu 2022-04-19 17:02:13 +08:00 committed by BOT
parent 8377a3fff1
commit 9440430db2
4 changed files with 13 additions and 255 deletions

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@ -42,7 +42,16 @@ idf_component_register(SRCS "${srcs}"
) )
set(target_name "${idf_target}") set(target_name "${idf_target}")
target_link_libraries(${COMPONENT_LIB} PUBLIC "-L \"${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}\"") if(IDF_TARGET STREQUAL "esp32h2")
if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_2)
target_link_libraries(${COMPONENT_LIB} PUBLIC "-L \"${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}/rev2\"")
endif()
if(CONFIG_IDF_TARGET_ESP32H2_BETA_VERSION_1)
target_link_libraries(${COMPONENT_LIB} PUBLIC "-L \"${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}/rev1\"")
endif()
else()
target_link_libraries(${COMPONENT_LIB} PUBLIC "-L \"${CMAKE_CURRENT_SOURCE_DIR}/lib/${target_name}\"")
endif()
# Override functions in PHY lib with the functions in 'phy_override.c' # Override functions in PHY lib with the functions in 'phy_override.c'
target_link_libraries(${COMPONENT_LIB} INTERFACE "-u include_esp_phy_override") target_link_libraries(${COMPONENT_LIB} INTERFACE "-u include_esp_phy_override")

@ -1 +1 @@
Subproject commit 97e9e8992ea947fa46bc35545000b2c45d7b3060 Subproject commit c0491ee7cc60288244268b04b523637a6e297739

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@ -1684,124 +1684,6 @@ phy_param_addr = 0x40001a84;
phy_get_romfuncs = 0x40001a88; phy_get_romfuncs = 0x40001a88;
chip729_phyrom_version = 0x40001a8c; chip729_phyrom_version = 0x40001a8c;
chip729_phyrom_version_num = 0x40001a90; chip729_phyrom_version_num = 0x40001a90;
rom_get_bias_ref_code = 0x40001a94;
get_rc_dout = 0x40001a98;
rc_cal = 0x40001a9c;
phy_analog_delay_cal = 0x40001aa0;
RFChannelSel = 0x40001aa4;
phy_change_channel = 0x40001aa8;
phy_set_most_tpw = 0x40001aac;
phy_rx_rifs_en = 0x40001ab0;
phy_get_most_tpw = 0x40001ab4;
esp_tx_state_out = 0x40001ab8;
phy_get_adc_rand = 0x40001abc;
phy_internal_delay = 0x40001ac0;
phy_ftm_comp = 0x40001ac4;
phy_11p_set = 0x40001ac8;
phy_current_level_set = 0x40001acc;
phy_bbpll_en_usb = 0x40001ad0;
phy_bt_power_track = 0x40001ad4;
rom_enter_critical_phy = 0x40001ad8;
rom_exit_critical_phy = 0x40001adc;
rom_bb_bss_cbw40 = 0x40001ae0;
rom_set_chan_reg = 0x40001ae4;
abs_temp = 0x40001ae8;
set_chan_cal_interp = 0x40001aec;
loopback_mode_en = 0x40001af0;
get_data_sat = 0x40001af4;
phy_byte_to_word = 0x40001af8;
phy_get_rx_freq = 0x40001afc;
i2c_master_reset = 0x40001b00;
chan14_mic_enable = 0x40001b04;
chan14_mic_cfg = 0x40001b08;
set_adc_rand = 0x40001b0c;
wr_rf_freq_mem = 0x40001b10;
freq_i2c_write_set = 0x40001b14;
write_pll_cap_mem = 0x40001b18;
get_rf_freq_cap = 0x40001b1c;
get_rf_freq_init = 0x40001b20;
freq_get_i2c_data = 0x40001b24;
freq_i2c_data_write = 0x40001b28;
set_chan_freq_hw_init = 0x40001b2c;
phy_en_hw_set_freq = 0x40001b30;
phy_dis_hw_set_freq = 0x40001b34;
register_chipv7_phy_init_param = 0x40001b38;
phy_reg_init = 0x40001b3c;
phy_xpd_rf = 0x40001b40;
phy_close_rf = 0x40001b44;
rf_cal_data_recovery = 0x40001b48;
rf_cal_data_backup = 0x40001b4c;
phy_rfcal_data_check = 0x40001b50;
rom_pwdet_sar2_init = 0x40001b54;
rom_en_pwdet = 0x40001b58;
rom_get_sar_sig_ref = 0x40001b5c;
rom_pwdet_tone_start = 0x40001b60;
rom_get_tone_sar_dout = 0x40001b64;
rom_get_fm_sar_dout = 0x40001b68;
rom_txtone_linear_pwr = 0x40001b6c;
rom_get_power_db = 0x40001b70;
rom_meas_tone_pwr_db = 0x40001b74;
rom_pkdet_vol_start = 0x40001b78;
rom_read_sar_dout = 0x40001b7c;
rom_read_sar2_code = 0x40001b80;
rom_get_sar2_vol = 0x40001b84;
rom_get_pll_vol = 0x40001b88;
rom_tx_pwctrl_bg_init = 0x40001b8c;
rom_phy_pwdet_always_en = 0x40001b90;
rom_phy_pwdet_onetime_en = 0x40001b94;
linear_to_db = 0x40001b98;
rom_get_pll_ref_code = 0x40001b9c;
mhz2ieee = 0x40001ba0;
chan_to_freq = 0x40001ba4;
restart_cal = 0x40001ba8;
write_rfpll_sdm = 0x40001bac;
wait_rfpll_cal_end = 0x40001bb0;
rfpll_set_freq = 0x40001bb4;
set_rf_freq_offset = 0x40001bb8;
set_channel_rfpll_freq = 0x40001bbc;
set_rfpll_freq = 0x40001bc0;
phy_set_freq = 0x40001bc4;
correct_rfpll_offset = 0x40001bc8;
set_chan_freq_sw_start = 0x40001bcc;
pll_vol_cal = 0x40001bd0;
write_pll_cap = 0x40001bd4;
read_pll_cap = 0x40001bd8;
chip_v7_set_chan_misc = 0x40001bdc;
chip_v7_set_chan = 0x40001be0;
chip_v7_set_chan_offset = 0x40001be4;
chip_v7_set_chan_ana = 0x40001be8;
set_chanfreq = 0x40001bec;
gen_rx_gain_table = 0x40001bf0;
wr_rx_gain_mem = 0x40001bf4;
set_rx_gain_param = 0x40001bf8;
set_rx_gain_table = 0x40001bfc;
bt_track_pll_cap = 0x40001c00;
wifi_track_pll_cap = 0x40001c04;
phy_param_track = 0x40001c08;
txpwr_correct = 0x40001c0c;
txpwr_cal_track = 0x40001c10;
tx_pwctrl_background = 0x40001c14;
bt_track_tx_power = 0x40001c18;
wifi_track_tx_power = 0x40001c1c;
bt_txdc_cal = 0x40001c20;
bt_txiq_cal = 0x40001c24;
txiq_cal_init = 0x40001c28;
get_txcap_data = 0x40001c2c;
txdc_cal_init = 0x40001c30;
txdc_cal_v70 = 0x40001c34;
txiq_get_mis_pwr = 0x40001c38;
txiq_cover = 0x40001c3c;
rfcal_txiq = 0x40001c40;
get_power_atten = 0x40001c44;
pwdet_ref_code = 0x40001c48;
pwdet_code_cal = 0x40001c4c;
rfcal_txcap = 0x40001c50;
tx_cap_init = 0x40001c54;
rfcal_pwrctrl = 0x40001c58;
tx_pwctrl_init_cal = 0x40001c5c;
tx_pwctrl_init = 0x40001c60;
bt_tx_pwctrl_init = 0x40001c64;
bt_txpwr_freq = 0x40001c68;
rom_get_i2c_read_mask = 0x40001c6c; rom_get_i2c_read_mask = 0x40001c6c;
rom_get_i2c_mst0_mask = 0x40001c70; rom_get_i2c_mst0_mask = 0x40001c70;
rom_get_i2c_hostid = 0x40001c74; rom_get_i2c_hostid = 0x40001c74;
@ -1818,139 +1700,5 @@ rom_chip_i2c_writeReg = 0x40001c9c;
rom_i2c_writeReg = 0x40001ca0; rom_i2c_writeReg = 0x40001ca0;
rom_i2c_readReg_Mask = 0x40001ca4; rom_i2c_readReg_Mask = 0x40001ca4;
rom_i2c_writeReg_Mask = 0x40001ca8; rom_i2c_writeReg_Mask = 0x40001ca8;
rom_set_txcap_reg = 0x40001cac;
i2c_sar2_init_code = 0x40001cb0;
phy_i2c_init1 = 0x40001cb4;
phy_i2c_init2 = 0x40001cb8;
phy_get_i2c_data = 0x40001cbc;
bias_reg_set = 0x40001cc0;
i2c_bbpll_set = 0x40001cc4;
rom_pbus_force_mode = 0x40001cc8;
rom_pbus_rd_addr = 0x40001ccc;
rom_pbus_rd_shift = 0x40001cd0;
rom_pbus_force_test = 0x40001cd4;
rom_pbus_rd = 0x40001cd8;
rom_pbus_debugmode = 0x40001cdc;
rom_pbus_workmode = 0x40001ce0;
rom_pbus_set_rxgain = 0x40001ce4;
rom_pbus_xpd_rx_off = 0x40001ce8;
rom_pbus_xpd_rx_on = 0x40001cec;
rom_pbus_xpd_tx_off = 0x40001cf0;
rom_pbus_xpd_tx_on = 0x40001cf4;
rom_pbus_set_dco = 0x40001cf8;
rom_set_loopback_gain = 0x40001cfc;
rom_txcal_debuge_mode = 0x40001d00;
rom_txcal_work_mode = 0x40001d04;
set_pbus_mem = 0x40001d08;
rom_disable_agc = 0x40001d0c;
rom_enable_agc = 0x40001d10;
rom_disable_wifi_agc = 0x40001d14;
rom_enable_wifi_agc = 0x40001d18;
rom_write_gain_mem = 0x40001d1c;
rom_bb_bss_cbw40_dig = 0x40001d20;
rom_cbw2040_cfg = 0x40001d24;
rom_mac_tx_chan_offset = 0x40001d28;
rom_tx_paon_set = 0x40001d2c;
rom_i2cmst_reg_init = 0x40001d30;
rom_bt_gain_offset = 0x40001d34;
rom_fe_reg_init = 0x40001d38;
rom_mac_enable_bb = 0x40001d3c;
rom_bb_wdg_cfg = 0x40001d40;
rom_fe_txrx_reset = 0x40001d44;
rom_set_rx_comp = 0x40001d48;
rom_write_chan_freq = 0x40001d4c;
rom_agc_reg_init = 0x40001d50;
rom_bb_reg_init = 0x40001d54;
rom_write_txrate_power_offset = 0x40001d58;
rom_open_i2c_xpd = 0x40001d5c;
phy_disable_cca = 0x40001d60;
phy_enable_cca = 0x40001d64;
force_txon = 0x40001d68;
txiq_set_reg = 0x40001d6c;
rxiq_set_reg = 0x40001d70;
rx_gain_force = 0x40001d74;
set_txclk_en = 0x40001d78;
set_rxclk_en = 0x40001d7c;
start_tx_tone_step = 0x40001d80;
stop_tx_tone = 0x40001d84;
bb_wdg_test_en = 0x40001d88;
noise_floor_auto_set = 0x40001d8c;
read_hw_noisefloor = 0x40001d90;
set_cca = 0x40001d94;
set_rx_sense = 0x40001d98;
phy_rx11blr_cfg = 0x40001d9c;
bb_wdt_rst_enable = 0x40001da0;
bb_wdt_int_enable = 0x40001da4;
bb_wdt_timeout_clear = 0x40001da8;
bb_wdt_get_status = 0x40001dac;
wifi_rifs_mode_en = 0x40001db0;
phy_chan_filt_set = 0x40001db4;
iq_corr_enable = 0x40001db8;
bt_tx_dig_gain = 0x40001dbc;
wifi_tx_dig_reg = 0x40001dc0;
wifi_agc_sat_gain = 0x40001dc4;
phy_bbpll_cal = 0x40001dc8;
phy_xpd_tsens = 0x40001dcc;
phy_freq_mem_backup = 0x40001dd0;
phy_ant_init = 0x40001dd4;
phy_set_bbfreq_init = 0x40001dd8;
wifi_fbw_sel = 0x40001ddc;
phy_rx_sense_set = 0x40001de0;
ant_dft_cfg = 0x40001de4;
ant_wifitx_cfg = 0x40001de8;
ant_wifirx_cfg = 0x40001dec;
ant_bttx_cfg = 0x40001df0;
tx_state_set = 0x40001df4;
phy_chan_dump_cfg = 0x40001df8;
phy_enable_low_rate = 0x40001dfc;
phy_disable_low_rate = 0x40001e00;
phy_close_pa = 0x40001e04;
bt_filter_reg = 0x40001e08;
phy_freq_correct = 0x40001e0c;
set_pbus_reg = 0x40001e10;
phy_dig_reg_backup = 0x40001e14;
iq_est_enable = 0x40001e18;
iq_est_disable = 0x40001e1c;
dc_iq_est = 0x40001e20;
set_cal_rxdc = 0x40001e24;
rxiq_get_mis = 0x40001e28;
rxiq_cover_mg_mp = 0x40001e2c;
rfcal_rxiq = 0x40001e30;
get_rfcal_rxiq_data = 0x40001e34;
pbus_rx_dco_cal = 0x40001e38;
rxdc_est_min = 0x40001e3c;
pbus_rx_dco_cal_1step = 0x40001e40;
set_rx_gain_cal_iq = 0x40001e44;
set_rx_gain_cal_dc = 0x40001e48;
spur_reg_write_one_tone = 0x40001e4c;
spur_cal = 0x40001e50;
spur_coef_cfg = 0x40001e54;
rom_tester_wifi_cali = 0x40001e58;
esp_recover_efuse_data = 0x40001e5c;
rom_temp_to_power = 0x40001e60;
tsens_read_init = 0x40001e64;
code_to_temp = 0x40001e68;
tsens_index_to_dac = 0x40001e6c;
tsens_index_to_offset = 0x40001e70;
tsens_dac_cal = 0x40001e74;
tsens_code_read = 0x40001e78;
tsens_temp_read = 0x40001e7c;
get_temp_init = 0x40001e80;
rom_txbbgain_to_index = 0x40001e84;
rom_index_to_txbbgain = 0x40001e88;
rom_bt_index_to_bb = 0x40001e8c;
rom_bt_bb_to_index = 0x40001e90;
rom_bt_get_tx_gain = 0x40001e94;
rom_get_tx_gain_value = 0x40001e98;
rom_wifi_get_tx_gain = 0x40001e9c;
rom_set_tx_gain_mem = 0x40001ea0;
rom_get_rate_fcc_index = 0x40001ea4;
rom_get_chan_target_power = 0x40001ea8;
rom_wifi_tx_dig_gain = 0x40001eac;
rom_wifi_set_tx_gain = 0x40001eb0;
rom_bt_set_tx_gain = 0x40001eb4;
wifi_11g_rate_chg = 0x40001eb8;
bt_chan_pwr_interp = 0x40001ebc;
bt_tx_gain_init = 0x40001ec0;
/* Data (.data, .bss, .rodata) */ /* Data (.data, .bss, .rodata) */
phy_param_rom = 0x3fcdfe4c; phy_param_rom = 0x3fcdfe4c;

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@ -47,7 +47,8 @@ popd > /dev/null
pushd ${IDF_PATH}/components/esp_phy/lib > /dev/null pushd ${IDF_PATH}/components/esp_phy/lib > /dev/null
phy_targets=$(find . -type d -name 'esp*' -exec basename {} \; | sort) phy_targets=$(find . -type d -name 'esp*' -exec basename {} \; | sort)
for target in ${phy_targets}; do for target in ${phy_targets}; do
for library in ${target}/*.a; do libraries=$(find ${target} -name '*.a')
for library in ${libraries}; do
check_lib_symbols ${library} ${illegal_symbols} check_lib_symbols ${library} ${illegal_symbols}
done done
done done