diff --git a/components/esp_rom/esp32c2/ld/esp32c2.rom.api.ld b/components/esp_rom/esp32c2/ld/esp32c2.rom.api.ld index 8bf453a4d6..4c39a51332 100644 --- a/components/esp_rom/esp32c2/ld/esp32c2.rom.api.ld +++ b/components/esp_rom/esp32c2/ld/esp32c2.rom.api.ld @@ -40,11 +40,16 @@ PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason ); PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set ); PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency ); -PROVIDE( esp_rom_spiflash_attach = spi_flash_attach ); +PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach ); PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock ); PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable); PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea ); +PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix ); +PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs); +PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction ); +PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command ); + PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg ); PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask ); PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg ); diff --git a/components/esp_rom/esp32c3/ld/esp32c3.rom.api.ld b/components/esp_rom/esp32c3/ld/esp32c3.rom.api.ld index 262451eb28..9c7d0903c1 100644 --- a/components/esp_rom/esp32c3/ld/esp32c3.rom.api.ld +++ b/components/esp_rom/esp32c3/ld/esp32c3.rom.api.ld @@ -47,6 +47,11 @@ PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock ); PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable ); PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea ); +PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix ); +PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs); +PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction ); +PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command ); + PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg ); PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask ); PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg ); diff --git a/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.api.ld b/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.api.ld index b5ea467270..2bc1ceb462 100644 --- a/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.api.ld +++ b/components/esp_rom/esp32h2/ld/rev1/esp32h2.rom.api.ld @@ -50,6 +50,11 @@ PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock ); PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable); PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea ); +PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix ); +PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs); +PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction ); +PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command ); + PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg ); PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask ); PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg ); diff --git a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.api.ld b/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.api.ld index b5ea467270..2bc1ceb462 100644 --- a/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.api.ld +++ b/components/esp_rom/esp32h2/ld/rev2/esp32h2.rom.api.ld @@ -50,6 +50,11 @@ PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock ); PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable); PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea ); +PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix ); +PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs); +PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction ); +PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command ); + PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg ); PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask ); PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg ); diff --git a/components/esp_rom/esp32s2/ld/esp32s2.rom.api.ld b/components/esp_rom/esp32s2/ld/esp32s2.rom.api.ld index aa67c87de2..078a648338 100644 --- a/components/esp_rom/esp32s2/ld/esp32s2.rom.api.ld +++ b/components/esp_rom/esp32s2/ld/esp32s2.rom.api.ld @@ -43,3 +43,8 @@ PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency ); PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock ); PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable); + +PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix ); +PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs); +PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction ); +PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command ); diff --git a/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld b/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld index 0b27866678..72156b74c2 100644 --- a/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld +++ b/components/esp_rom/esp32s3/ld/esp32s3.rom.api.ld @@ -46,11 +46,16 @@ PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason ); PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set ); PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency ); -PROVIDE( esp_rom_spiflash_attach = spi_flash_attach ); +PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach ); PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock ); PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable); PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea ); +PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix ); +PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs); +PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction ); +PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command ); + PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg ); PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask ); PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg ); diff --git a/components/esp_rom/include/esp32/rom/spi_flash.h b/components/esp_rom/include/esp32/rom/spi_flash.h index a492c055bc..750ca6df7f 100644 --- a/components/esp_rom/include/esp32/rom/spi_flash.h +++ b/components/esp_rom/include/esp32/rom/spi_flash.h @@ -448,71 +448,6 @@ esp_rom_spiflash_result_t esp_rom_spiflash_write_disable(void); */ esp_rom_spiflash_result_t esp_rom_spiflash_write_enable(esp_rom_spiflash_chip_t *spi); -/** - * @brief Fix the bug in SPI hardware communication with Flash/Ext-SRAM in High Speed. - * Please do not call this function in SDK. - * - * @param uint8_t spi: 0 for SPI0(Cache Access), 1 for SPI1(Flash read/write). - * - * @param uint8_t freqdiv: Pll is 80M, 4 for 20M, 3 for 26.7M, 2 for 40M, 1 for 80M. - * - * @return None - */ -void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); - -/** - * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi); - -/** - * @brief Set SPI Flash pad drivers. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @param uint8_t *drvs: drvs[0]-bit[3:0] for cpiclk, bit[7:4] for spiq, drvs[1]-bit[3:0] for spid, drvs[1]-bit[7:4] for spid - * drvs[2]-bit[3:0] for spihd, drvs[2]-bit[7:4] for spiwp. - * Values usually read from falsh by rom code, function usually callde by rom code. - * if value with bit(3) set, the value is valid, bit[2:0] is the real value. - * - * @return None - */ -void esp_rom_spiflash_set_drvs(uint8_t wp_gpio_num, uint32_t ishspi, uint8_t *drvs); - -/** - * @brief Select SPI Flash function for pads. - * Please do not call this function in SDK. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_padsfunc(uint32_t ishspi); - -/** - * @brief Send CommonCmd to Flash so that is can go into QIO mode, some Flash use different CMD. - * Please do not call this function in SDK. - * - * @param esp_rom_spiflash_common_cmd_t *cmd : A struct to show the action of a command. - * - * @return uint16_t 0 : do not send command any more. - * 1 : go to the next command. - * n > 1 : skip (n - 1) commands. - */ -uint16_t esp_rom_spiflash_common_cmd(esp_rom_spiflash_common_cmd_t *cmd); #ifdef __cplusplus } diff --git a/components/esp_rom/include/esp32c2/rom/spi_flash.h b/components/esp_rom/include/esp32c2/rom/spi_flash.h index c67bf30ec4..bbac79e722 100644 --- a/components/esp_rom/include/esp32c2/rom/spi_flash.h +++ b/components/esp_rom/include/esp32c2/rom/spi_flash.h @@ -437,19 +437,6 @@ esp_rom_spiflash_result_t esp_rom_spiflash_write_enable(esp_rom_spiflash_chip_t */ void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); -/** - * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi); - /** * @brief Set SPI Flash pad drivers. * Please do not call this function in SDK. diff --git a/components/esp_rom/include/esp32c3/rom/spi_flash.h b/components/esp_rom/include/esp32c3/rom/spi_flash.h index 08ec39bdc3..1c75b79eef 100644 --- a/components/esp_rom/include/esp32c3/rom/spi_flash.h +++ b/components/esp_rom/include/esp32c3/rom/spi_flash.h @@ -431,19 +431,6 @@ esp_rom_spiflash_result_t esp_rom_spiflash_write_enable(esp_rom_spiflash_chip_t */ void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); -/** - * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi); - /** * @brief Set SPI Flash pad drivers. * Please do not call this function in SDK. diff --git a/components/esp_rom/include/esp32h2/rom/spi_flash.h b/components/esp_rom/include/esp32h2/rom/spi_flash.h index e93a3f8f11..f972f6861d 100644 --- a/components/esp_rom/include/esp32h2/rom/spi_flash.h +++ b/components/esp_rom/include/esp32h2/rom/spi_flash.h @@ -437,19 +437,6 @@ esp_rom_spiflash_result_t esp_rom_spiflash_write_enable(esp_rom_spiflash_chip_t */ void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); -/** - * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi); - /** * @brief Set SPI Flash pad drivers. * Please do not call this function in SDK. diff --git a/components/esp_rom/include/esp32s2/rom/spi_flash.h b/components/esp_rom/include/esp32s2/rom/spi_flash.h index 3f7bf10ea4..7642791860 100644 --- a/components/esp_rom/include/esp32s2/rom/spi_flash.h +++ b/components/esp_rom/include/esp32s2/rom/spi_flash.h @@ -445,19 +445,6 @@ esp_rom_spiflash_result_t esp_rom_spiflash_write_enable(esp_rom_spiflash_chip_t */ void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); -/** - * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi); - /** * @brief Set SPI Flash pad drivers. * Please do not call this function in SDK. diff --git a/components/esp_rom/include/esp32s3/rom/spi_flash.h b/components/esp_rom/include/esp32s3/rom/spi_flash.h index e9b75fafb0..e5004a5eec 100644 --- a/components/esp_rom/include/esp32s3/rom/spi_flash.h +++ b/components/esp_rom/include/esp32s3/rom/spi_flash.h @@ -468,19 +468,6 @@ esp_rom_spiflash_result_t esp_rom_spiflash_write_enable(esp_rom_spiflash_chip_t */ void esp_rom_spiflash_fix_dummylen(uint8_t spi, uint8_t freqdiv); -/** - * @brief Select SPI Flash to QIO mode when WP pad is read from Flash. - * Please do not call this function in SDK. - * - * @param uint8_t wp_gpio_num: WP gpio number. - * - * @param uint32_t ishspi: 0 for spi, 1 for hspi, flash pad decided by strapping - * else, bit[5:0] spiclk, bit[11:6] spiq, bit[17:12] spid, bit[23:18] spics0, bit[29:24] spihd - * - * @return None - */ -void esp_rom_spiflash_select_qiomode(uint8_t wp_gpio_num, uint32_t ishspi); - /** * @brief Set SPI Flash pad drivers. * Please do not call this function in SDK.