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spi: limit esp32 dma workaround only on esp32
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@ -252,7 +252,8 @@ int spicommon_irqdma_source_for_host(spi_host_device_t host);
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*/
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typedef void(*dmaworkaround_cb_t)(void *arg);
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#if CONFIG_IDF_TARGET_ESP32
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//This workaround is only for esp32
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/**
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* @brief Request a reset for a certain DMA channel
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*
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@ -307,6 +308,7 @@ void spicommon_dmaworkaround_idle(int dmachan);
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* @note This public API is deprecated.
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*/
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void spicommon_dmaworkaround_transfer_active(int dmachan);
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#endif //#if CONFIG_IDF_TARGET_ESP32
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/*******************************************************************************
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* Bus attributes
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@ -783,11 +783,10 @@ static dmaworkaround_cb_t dmaworkaround_cb;
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static void *dmaworkaround_cb_arg;
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static portMUX_TYPE dmaworkaround_mux = portMUX_INITIALIZER_UNLOCKED;
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static int dmaworkaround_waiting_for_chan = 0;
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#endif
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bool IRAM_ATTR spicommon_dmaworkaround_req_reset(int dmachan, dmaworkaround_cb_t cb, void *arg)
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{
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#if CONFIG_IDF_TARGET_ESP32
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int otherchan = (dmachan == 1) ? 2 : 1;
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bool ret;
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portENTER_CRITICAL_ISR(&dmaworkaround_mux);
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@ -804,24 +803,15 @@ bool IRAM_ATTR spicommon_dmaworkaround_req_reset(int dmachan, dmaworkaround_cb_t
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}
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portEXIT_CRITICAL_ISR(&dmaworkaround_mux);
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return ret;
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#else
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//no need to reset
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return true;
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#endif
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}
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bool IRAM_ATTR spicommon_dmaworkaround_reset_in_progress(void)
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{
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#if CONFIG_IDF_TARGET_ESP32
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return (dmaworkaround_waiting_for_chan != 0);
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#else
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return false;
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#endif
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}
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void IRAM_ATTR spicommon_dmaworkaround_idle(int dmachan)
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{
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#if CONFIG_IDF_TARGET_ESP32
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portENTER_CRITICAL_ISR(&dmaworkaround_mux);
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dmaworkaround_channels_busy[dmachan-1] = 0;
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if (dmaworkaround_waiting_for_chan == dmachan) {
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@ -833,14 +823,12 @@ void IRAM_ATTR spicommon_dmaworkaround_idle(int dmachan)
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}
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portEXIT_CRITICAL_ISR(&dmaworkaround_mux);
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#endif
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}
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void IRAM_ATTR spicommon_dmaworkaround_transfer_active(int dmachan)
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{
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#if CONFIG_IDF_TARGET_ESP32
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portENTER_CRITICAL_ISR(&dmaworkaround_mux);
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dmaworkaround_channels_busy[dmachan-1] = 1;
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portEXIT_CRITICAL_ISR(&dmaworkaround_mux);
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#endif
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}
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#endif //#if CONFIG_IDF_TARGET_ESP32
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@ -609,10 +609,13 @@ static void SPI_MASTER_ISR_ATTR spi_intr(void *arg)
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//Okay, transaction is done.
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const int cs = host->cur_cs;
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//Tell common code DMA workaround that our DMA channel is idle. If needed, the code will do a DMA reset.
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#if CONFIG_IDF_TARGET_ESP32
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if (bus_attr->dma_enabled) {
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//This workaround is only for esp32, where tx_dma_chan and rx_dma_chan are always same
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spicommon_dmaworkaround_idle(bus_attr->tx_dma_chan);
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}
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#endif //#if CONFIG_IDF_TARGET_ESP32
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//cur_cs is changed to DEV_NUM_MAX here
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spi_post_trans(host);
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@ -662,11 +665,13 @@ static void SPI_MASTER_ISR_ATTR spi_intr(void *arg)
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if (trans_found) {
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spi_trans_priv_t *const cur_trans_buf = &host->cur_trans_buf;
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#if CONFIG_IDF_TARGET_ESP32
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if (bus_attr->dma_enabled && (cur_trans_buf->buffer_to_rcv || cur_trans_buf->buffer_to_send)) {
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//mark channel as active, so that the DMA will not be reset by the slave
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//This workaround is only for esp32, where tx_dma_chan and rx_dma_chan are always same
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spicommon_dmaworkaround_transfer_active(bus_attr->tx_dma_chan);
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}
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#endif //#if CONFIG_IDF_TARGET_ESP32
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spi_new_trans(device_to_send, cur_trans_buf);
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}
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// Exit of the ISR, handle interrupt re-enable (if sending transaction), retry (if there's coming BG),
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@ -882,10 +887,14 @@ esp_err_t SPI_MASTER_ISR_ATTR spi_device_acquire_bus(spi_device_t *device, TickT
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//configure the device ahead so that we don't need to do it again in the following transactions
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spi_setup_device(host->device[device->id]);
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//the DMA is also occupied by the device, all the slave devices that using DMA should wait until bus released.
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#if CONFIG_IDF_TARGET_ESP32
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if (host->bus_attr->dma_enabled) {
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//This workaround is only for esp32, where tx_dma_chan and rx_dma_chan are always same
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spicommon_dmaworkaround_transfer_active(host->bus_attr->tx_dma_chan);
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}
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#endif //#if CONFIG_IDF_TARGET_ESP32
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return ESP_OK;
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}
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@ -899,11 +908,13 @@ void SPI_MASTER_ISR_ATTR spi_device_release_bus(spi_device_t *dev)
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assert(0);
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}
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#if CONFIG_IDF_TARGET_ESP32
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if (host->bus_attr->dma_enabled) {
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//This workaround is only for esp32, where tx_dma_chan and rx_dma_chan are always same
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spicommon_dmaworkaround_idle(host->bus_attr->tx_dma_chan);
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}
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//Tell common code DMA workaround that our DMA channel is idle. If needed, the code will do a DMA reset.
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#endif //#if CONFIG_IDF_TARGET_ESP32
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//allow clock to be lower than 80MHz when all tasks blocked
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#ifdef CONFIG_PM_ENABLE
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@ -325,11 +325,13 @@ esp_err_t SPI_SLAVE_ATTR spi_slave_transmit(spi_host_device_t host, spi_slave_tr
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return ESP_OK;
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}
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#if CONFIG_IDF_TARGET_ESP32
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static void SPI_SLAVE_ISR_ATTR spi_slave_restart_after_dmareset(void *arg)
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{
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spi_slave_t *host = (spi_slave_t *)arg;
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esp_intr_enable(host->intr);
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}
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#endif //#if CONFIG_IDF_TARGET_ESP32
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//This is run in interrupt context and apart from initialization and destruction, this is the only code
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//touching the host (=spihost[x]) variable. The rest of the data arrives in queues. That is why there are
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@ -352,18 +354,25 @@ static void SPI_SLAVE_ISR_ATTR spi_intr(void *arg)
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spi_slave_hal_store_result(hal);
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host->cur_trans->trans_len = spi_slave_hal_get_rcv_bitlen(hal);
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#if CONFIG_IDF_TARGET_ESP32
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//This workaround is only for esp32
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if (spi_slave_hal_dma_need_reset(hal)) {
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//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
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//On ESP32, actual_tx_dma_chan and actual_rx_dma_chan are always same
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spicommon_dmaworkaround_req_reset(host->tx_dma_chan, spi_slave_restart_after_dmareset, host);
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}
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#endif //#if CONFIG_IDF_TARGET_ESP32
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if (host->cfg.post_trans_cb) host->cfg.post_trans_cb(host->cur_trans);
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//Okay, transaction is done.
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//Return transaction descriptor.
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xQueueSendFromISR(host->ret_queue, &host->cur_trans, &do_yield);
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host->cur_trans = NULL;
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}
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#if CONFIG_IDF_TARGET_ESP32
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//This workaround is only for esp32
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if (use_dma) {
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//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
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//On ESP32, actual_tx_dma_chan and actual_rx_dma_chan are always same
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spicommon_dmaworkaround_idle(host->tx_dma_chan);
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if (spicommon_dmaworkaround_reset_in_progress()) {
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//We need to wait for the reset to complete. Disable int (will be re-enabled on reset callback) and exit isr.
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@ -372,6 +381,7 @@ static void SPI_SLAVE_ISR_ATTR spi_intr(void *arg)
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return;
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}
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}
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#endif //#if CONFIG_IDF_TARGET_ESP32
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//Disable interrupt before checking to avoid concurrency issue.
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esp_intr_disable(host->intr);
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@ -388,10 +398,13 @@ static void SPI_SLAVE_ISR_ATTR spi_intr(void *arg)
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hal->rx_buffer = trans->rx_buffer;
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hal->tx_buffer = trans->tx_buffer;
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#if CONFIG_IDF_TARGET_ESP32
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if (use_dma) {
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//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
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//This workaround is only for esp32
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//On ESP32, actual_tx_dma_chan and actual_rx_dma_chan are always same
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spicommon_dmaworkaround_transfer_active(host->tx_dma_chan);
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}
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#endif //#if CONFIG_IDF_TARGET_ESP32
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spi_slave_hal_prepare_data(hal);
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@ -150,6 +150,7 @@ void spi_slave_hal_store_result(spi_slave_hal_context_t *hal);
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*/
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uint32_t spi_slave_hal_get_rcv_bitlen(spi_slave_hal_context_t *hal);
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#if CONFIG_IDF_TARGET_ESP32
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/**
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* Check whether we need to reset the DMA according to the status of last transactions.
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*
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@ -161,3 +162,4 @@ uint32_t spi_slave_hal_get_rcv_bitlen(spi_slave_hal_context_t *hal);
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* @return true if reset is needed, else false.
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*/
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bool spi_slave_hal_dma_need_reset(const spi_slave_hal_context_t *hal);
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#endif //#if CONFIG_IDF_TARGET_ESP32
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@ -98,6 +98,8 @@ uint32_t spi_slave_hal_get_rcv_bitlen(spi_slave_hal_context_t *hal)
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return hal->rcv_bitlen;
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}
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#if CONFIG_IDF_TARGET_ESP32
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//This workaround is only for esp32
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bool spi_slave_hal_dma_need_reset(const spi_slave_hal_context_t *hal)
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{
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bool ret;
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@ -114,3 +116,4 @@ bool spi_slave_hal_dma_need_reset(const spi_slave_hal_context_t *hal)
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}
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return ret;
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}
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#endif //#if CONFIG_IDF_TARGET_ESP32
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