From 8ffb38265cfd42cba22757aeb9bb4b8d104a2352 Mon Sep 17 00:00:00 2001
From: Ivan Grokhotkov <ivan@espressif.com>
Date: Mon, 18 Nov 2019 13:42:22 +0100
Subject: [PATCH] driver: fix gpio pin_bit_mask truncation in sdspi_host and
 others

Closes https://github.com/espressif/esp-idf/issues/4348
---
 components/driver/sdmmc_host.c                 |  2 +-
 components/driver/sdspi_host.c                 |  8 ++++----
 components/driver/test/test_pwm.c              | 10 +++++-----
 components/sdmmc/test/test_sdio.c              |  2 +-
 examples/peripherals/sdio/host/main/app_main.c |  4 ++--
 5 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/components/driver/sdmmc_host.c b/components/driver/sdmmc_host.c
index fedf294268..d3aa93b87c 100644
--- a/components/driver/sdmmc_host.c
+++ b/components/driver/sdmmc_host.c
@@ -343,7 +343,7 @@ esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t* slot_config)
         // Force D3 high to make slave enter SD mode.
         // Connect to peripheral after width configuration.
         gpio_config_t gpio_conf = {
-            .pin_bit_mask = BIT(pslot->d3_gpio),
+            .pin_bit_mask = BIT64(pslot->d3_gpio),
             .mode = GPIO_MODE_OUTPUT ,
             .pull_up_en = 0,
             .pull_down_en = 0,
diff --git a/components/driver/sdspi_host.c b/components/driver/sdspi_host.c
index 3a36ed7698..a42c23393e 100644
--- a/components/driver/sdspi_host.c
+++ b/components/driver/sdspi_host.c
@@ -315,7 +315,7 @@ esp_err_t sdspi_host_init_slot(int slot, const sdspi_slot_config_t* slot_config)
     gpio_config_t io_conf = {
         .intr_type = GPIO_PIN_INTR_DISABLE,
         .mode = GPIO_MODE_OUTPUT,
-        .pin_bit_mask = 1LL << slot_config->gpio_cs,
+        .pin_bit_mask = 1ULL << slot_config->gpio_cs,
     };
 
     ret = gpio_config(&io_conf);
@@ -333,14 +333,14 @@ esp_err_t sdspi_host_init_slot(int slot, const sdspi_slot_config_t* slot_config)
         .pull_up_en = true
     };
     if (slot_config->gpio_cd != SDSPI_SLOT_NO_CD) {
-        io_conf.pin_bit_mask |= (1 << slot_config->gpio_cd);
+        io_conf.pin_bit_mask |= (1ULL << slot_config->gpio_cd);
         s_slots[slot].gpio_cd = slot_config->gpio_cd;
     } else {
         s_slots[slot].gpio_cd = GPIO_UNUSED;
     }
 
     if (slot_config->gpio_wp != SDSPI_SLOT_NO_WP) {
-        io_conf.pin_bit_mask |= (1 << slot_config->gpio_wp);
+        io_conf.pin_bit_mask |= (1ULL << slot_config->gpio_wp);
         s_slots[slot].gpio_wp = slot_config->gpio_wp;
     } else {
         s_slots[slot].gpio_wp = GPIO_UNUSED;
@@ -360,7 +360,7 @@ esp_err_t sdspi_host_init_slot(int slot, const sdspi_slot_config_t* slot_config)
             .intr_type = GPIO_INTR_LOW_LEVEL,
             .mode = GPIO_MODE_INPUT,
             .pull_up_en = true,
-            .pin_bit_mask = (1 << slot_config->gpio_int),
+            .pin_bit_mask = (1ULL << slot_config->gpio_int),
         };
         ret = gpio_config(&io_conf);
         if (ret != ESP_OK) {
diff --git a/components/driver/test/test_pwm.c b/components/driver/test/test_pwm.c
index 5e2f8526ec..76efc6aef2 100644
--- a/components/driver/test/test_pwm.c
+++ b/components/driver/test/test_pwm.c
@@ -271,7 +271,7 @@ static void cycle_fault_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpw
     gpio_config_t gp;
     gp.intr_type = GPIO_INTR_DISABLE;
     gp.mode = GPIO_MODE_OUTPUT;
-    gp.pin_bit_mask = (1 << FAULT_SIG_NUM);
+    gp.pin_bit_mask = (1ULL << FAULT_SIG_NUM);
     gpio_config(&gp); // gpio configure should be more previous than mcpwm configuration
     gpio_set_level(FAULT_SIG_NUM, !input_sig);
 
@@ -300,7 +300,7 @@ static void oneshot_fault_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mc
     gpio_config_t gp;
     gp.intr_type = GPIO_INTR_DISABLE;
     gp.mode = GPIO_MODE_OUTPUT;
-    gp.pin_bit_mask = (1 << FAULT_SIG_NUM);
+    gp.pin_bit_mask = (1ULL << FAULT_SIG_NUM);
     gpio_config(&gp); // gpio configure should be more previous than mcpwm configuration
     gpio_set_level(FAULT_SIG_NUM, !input_sig);
 
@@ -328,7 +328,7 @@ static void sync_test(mcpwm_unit_t unit, mcpwm_io_signals_t mcpwm_a, mcpwm_io_si
     gpio_config_t gp;
     gp.intr_type = GPIO_INTR_DISABLE;
     gp.mode = GPIO_MODE_OUTPUT;
-    gp.pin_bit_mask = (1 << SYN_SIG_NUM);
+    gp.pin_bit_mask = (1ULL << SYN_SIG_NUM);
     gpio_config(&gp);
     gpio_set_level(SYN_SIG_NUM, 0);
 
@@ -426,10 +426,10 @@ static void gpio_test_signal(void *arg)
 {
 
     printf("intializing test signal...\n");
-    gpio_config_t gp;
+    gpio_config_t gp = {};
     gp.intr_type = GPIO_INTR_DISABLE;
     gp.mode = GPIO_MODE_OUTPUT;
-    gp.pin_bit_mask = 1<<CAP_SIG_NUM;
+    gp.pin_bit_mask = 1ULL << CAP_SIG_NUM;
     gpio_config(&gp);
     for (int i=0; i<1000; i++) {
         //here the period of test signal is 20ms
diff --git a/components/sdmmc/test/test_sdio.c b/components/sdmmc/test/test_sdio.c
index 56213d7136..c035c8f70c 100644
--- a/components/sdmmc/test/test_sdio.c
+++ b/components/sdmmc/test/test_sdio.c
@@ -131,7 +131,7 @@ static void reset_slave()
     const int pin_en = 18;
     const int pin_io0 = 19;
     gpio_config_t gpio_cfg = {
-            .pin_bit_mask = BIT(pin_en) | BIT(pin_io0),
+            .pin_bit_mask = BIT64(pin_en) | BIT64(pin_io0),
             .mode = GPIO_MODE_OUTPUT_OD,
     };
     TEST_ESP_OK(gpio_config(&gpio_cfg));
diff --git a/examples/peripherals/sdio/host/main/app_main.c b/examples/peripherals/sdio/host/main/app_main.c
index b0b62d15df..30feff71c1 100644
--- a/examples/peripherals/sdio/host/main/app_main.c
+++ b/examples/peripherals/sdio/host/main/app_main.c
@@ -126,7 +126,7 @@ esp_err_t slave_reset(esp_slave_context_t *context)
 static void gpio_d2_set_high()
 {
     gpio_config_t d2_config = {
-        .pin_bit_mask = BIT(SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2),
+        .pin_bit_mask = BIT64(SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2),
         .mode = GPIO_MODE_OUTPUT,
         .pull_up_en = true,
     };
@@ -267,7 +267,7 @@ void slave_power_on()
     level_active = 1;
 #endif
     gpio_config_t cfg = {
-        .pin_bit_mask = BIT(GPIO_B1) | BIT(GPIO_B2) | BIT(GPIO_B3),
+        .pin_bit_mask = BIT64(GPIO_B1) | BIT64(GPIO_B2) | BIT64(GPIO_B3),
         .mode = GPIO_MODE_DEF_OUTPUT,
         .pull_up_en = false,
         .pull_down_en = false,