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change(esp_hw_support): update modem to active state backup clock source for esp32c61

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This commit is contained in:
Li Shuai 2024-09-13 17:32:55 +08:00
parent 377f7addad
commit 8f4cb98df0
2 changed files with 6 additions and 6 deletions
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10
components/esp_hw_support/port/esp32c61/pmu_param.c
View File

@ -283,8 +283,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_active_retention_mode = 0, \
.hp_sleep2active_retention_en = 0, \
.hp_modem2active_retention_en = 0, \
.hp_sleep2active_backup_clk_sel = 0, \
.hp_modem2active_backup_clk_sel = 1, \
.hp_sleep2active_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_modem2active_backup_clk_sel = SOC_CPU_CLK_SRC_PLL_F160M, \
.hp_sleep2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 0), \
.hp_modem2active_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 2), \
.hp_sleep2active_backup_en = 0, \
@ -308,7 +308,7 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep2modem_backup_modem_clk_code = 1, \
.hp_modem_retention_mode = 0, \
.hp_sleep2modem_retention_en = 0, \
.hp_sleep2modem_backup_clk_sel = 0, \
.hp_sleep2modem_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_sleep2modem_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(0, 1), \
.hp_sleep2modem_backup_en = 0, \
}, \
@ -332,8 +332,8 @@ const pmu_hp_system_analog_param_t * pmu_hp_system_analog_param_default(pmu_hp_m
.hp_sleep_retention_mode = 0, \
.hp_modem2sleep_retention_en = 0, \
.hp_active2sleep_retention_en = 0, \
.hp_modem2sleep_backup_clk_sel = 0, \
.hp_active2sleep_backup_clk_sel = 0, \
.hp_modem2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_active2sleep_backup_clk_sel = SOC_CPU_CLK_SRC_XTAL, \
.hp_modem2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 1), \
.hp_active2sleep_backup_mode = PMU_HP_RETENTION_REGDMA_CONFIG(1, 0), \
.hp_modem2sleep_backup_en = 0, \

2
components/esp_hw_support/port/esp32c61/private_include/pmu_param.h
View File

@ -469,7 +469,7 @@ typedef struct pmu_sleep_machine_constant {
}, \
.hp = { \
.min_slp_time_us = 450, \
.clock_domain_sync_time_us = 150, \
.clock_domain_sync_time_us = 35, \
.system_dfs_up_work_time_us = 124, \
.analog_wait_time_us = 154, \
.isolate_wait_time_us = 1, \