diff --git a/components/driver/periph_ctrl.c b/components/driver/periph_ctrl.c index 9e0892b29e..9be821e572 100644 --- a/components/driver/periph_ctrl.c +++ b/components/driver/periph_ctrl.c @@ -1,9 +1,9 @@ -// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD +// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at - +// // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by applicable law or agreed to in writing, software @@ -11,301 +11,29 @@ // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. -#include "esp_types.h" -#include "sdkconfig.h" #include "freertos/FreeRTOS.h" -#include "freertos/semphr.h" -#include "freertos/xtensa_api.h" -#include "soc/dport_reg.h" -#include "soc/syscon_reg.h" +#include "hal/clk_gate_ll.h" #include "driver/periph_ctrl.h" static portMUX_TYPE periph_spinlock = portMUX_INITIALIZER_UNLOCKED; -/* Static functions to return register address & mask for clk_en / rst of each peripheral */ -static uint32_t get_clk_en_mask(periph_module_t periph); -static uint32_t get_rst_en_mask(periph_module_t periph, bool enable); -static uint32_t get_clk_en_reg(periph_module_t periph); -static uint32_t get_rst_en_reg(periph_module_t periph); - void periph_module_enable(periph_module_t periph) { portENTER_CRITICAL_SAFE(&periph_spinlock); - DPORT_SET_PERI_REG_MASK(get_clk_en_reg(periph), get_clk_en_mask(periph)); - DPORT_CLEAR_PERI_REG_MASK(get_rst_en_reg(periph), get_rst_en_mask(periph, true)); + periph_ll_enable_clk_clear_rst(periph); portEXIT_CRITICAL_SAFE(&periph_spinlock); } void periph_module_disable(periph_module_t periph) { portENTER_CRITICAL_SAFE(&periph_spinlock); - DPORT_CLEAR_PERI_REG_MASK(get_clk_en_reg(periph), get_clk_en_mask(periph)); - DPORT_SET_PERI_REG_MASK(get_rst_en_reg(periph), get_rst_en_mask(periph, false)); + periph_ll_disable_clk_set_rst(periph); portEXIT_CRITICAL_SAFE(&periph_spinlock); } void periph_module_reset(periph_module_t periph) { portENTER_CRITICAL_SAFE(&periph_spinlock); - DPORT_SET_PERI_REG_MASK(get_rst_en_reg(periph), get_rst_en_mask(periph, false)); - DPORT_CLEAR_PERI_REG_MASK(get_rst_en_reg(periph), get_rst_en_mask(periph, false)); + periph_ll_reset(periph); portEXIT_CRITICAL_SAFE(&periph_spinlock); } - -static uint32_t get_clk_en_mask(periph_module_t periph) -{ - switch(periph) { - case PERIPH_RMT_MODULE: - return DPORT_RMT_CLK_EN; - case PERIPH_LEDC_MODULE: - return DPORT_LEDC_CLK_EN; - case PERIPH_UART0_MODULE: - return DPORT_UART_CLK_EN; - case PERIPH_UART1_MODULE: - return DPORT_UART1_CLK_EN; -#if CONFIG_IDF_TARGET_ESP32 - case PERIPH_UART2_MODULE: - return DPORT_UART2_CLK_EN; -#elif CONFIG_IDF_TARGET_ESP32S2 - case PERIPH_USB_MODULE: - return DPORT_USB_CLK_EN; - case PERIPH_SYSTIMER_MODULE: - return DPORT_SYSTIMER_CLK_EN; -#endif - case PERIPH_I2C0_MODULE: - return DPORT_I2C_EXT0_CLK_EN; - case PERIPH_I2C1_MODULE: - return DPORT_I2C_EXT1_CLK_EN; - case PERIPH_I2S0_MODULE: - return DPORT_I2S0_CLK_EN; - case PERIPH_I2S1_MODULE: - return DPORT_I2S1_CLK_EN; - case PERIPH_TIMG0_MODULE: - return DPORT_TIMERGROUP_CLK_EN; - case PERIPH_TIMG1_MODULE: - return DPORT_TIMERGROUP1_CLK_EN; - case PERIPH_PWM0_MODULE: - return DPORT_PWM0_CLK_EN; - case PERIPH_PWM1_MODULE: - return DPORT_PWM1_CLK_EN; - case PERIPH_PWM2_MODULE: - return DPORT_PWM2_CLK_EN; - case PERIPH_PWM3_MODULE: - return DPORT_PWM3_CLK_EN; - case PERIPH_UHCI0_MODULE: - return DPORT_UHCI0_CLK_EN; - case PERIPH_UHCI1_MODULE: - return DPORT_UHCI1_CLK_EN; - case PERIPH_PCNT_MODULE: - return DPORT_PCNT_CLK_EN; - case PERIPH_SPI_MODULE: - return DPORT_SPI01_CLK_EN; -#if CONFIG_IDF_TARGET_ESP32 - case PERIPH_HSPI_MODULE: - return DPORT_SPI2_CLK_EN; - case PERIPH_VSPI_MODULE: - return DPORT_SPI3_CLK_EN; - case PERIPH_SPI_DMA_MODULE: - return DPORT_SPI_DMA_CLK_EN; -#elif CONFIG_IDF_TARGET_ESP32S2 - case PERIPH_FSPI_MODULE: - return DPORT_SPI2_CLK_EN; - case PERIPH_HSPI_MODULE: - return DPORT_SPI3_CLK_EN; - case PERIPH_SPI2_DMA_MODULE: - return DPORT_SPI2_DMA_CLK_EN; - case PERIPH_SPI3_DMA_MODULE: - return DPORT_SPI3_DMA_CLK_EN; -#endif - case PERIPH_SDMMC_MODULE: - return DPORT_WIFI_CLK_SDIO_HOST_EN; - case PERIPH_SDIO_SLAVE_MODULE: - return DPORT_WIFI_CLK_SDIOSLAVE_EN; - case PERIPH_CAN_MODULE: - return DPORT_CAN_CLK_EN; - case PERIPH_EMAC_MODULE: - return DPORT_WIFI_CLK_EMAC_EN; - case PERIPH_RNG_MODULE: - return DPORT_WIFI_CLK_RNG_EN; - case PERIPH_WIFI_MODULE: -#if CONFIG_IDF_TARGET_ESP32 - return DPORT_WIFI_CLK_WIFI_EN_M; -#elif CONFIG_IDF_TARGET_ESP32S2 - return 0; -#endif - case PERIPH_BT_MODULE: - return DPORT_WIFI_CLK_BT_EN_M; - case PERIPH_WIFI_BT_COMMON_MODULE: - return DPORT_WIFI_CLK_WIFI_BT_COMMON_M; - case PERIPH_BT_BASEBAND_MODULE: - return DPORT_BT_BASEBAND_EN; - case PERIPH_BT_LC_MODULE: - return DPORT_BT_LC_EN; -#if CONFIG_IDF_TARGET_ESP32 - case PERIPH_AES_MODULE: - return DPORT_PERI_EN_AES; - case PERIPH_SHA_MODULE: - return DPORT_PERI_EN_SHA; - case PERIPH_RSA_MODULE: - return DPORT_PERI_EN_RSA; -#endif - default: - return 0; - } -} - -static uint32_t get_rst_en_mask(periph_module_t periph, bool enable) -{ - switch(periph) { - case PERIPH_RMT_MODULE: - return DPORT_RMT_RST; - case PERIPH_LEDC_MODULE: - return DPORT_LEDC_RST; - case PERIPH_UART0_MODULE: - return DPORT_UART_RST; - case PERIPH_UART1_MODULE: - return DPORT_UART1_RST; -#if CONFIG_IDF_TARGET_ESP32 - case PERIPH_UART2_MODULE: - return DPORT_UART2_RST; -#elif CONFIG_IDF_TARGET_ESP32S2 - case PERIPH_USB_MODULE: - return DPORT_USB_RST; - case PERIPH_SYSTIMER_MODULE: - return DPORT_SYSTIMER_RST; -#endif - case PERIPH_I2C0_MODULE: - return DPORT_I2C_EXT0_RST; - case PERIPH_I2C1_MODULE: - return DPORT_I2C_EXT1_RST; - case PERIPH_I2S0_MODULE: - return DPORT_I2S0_RST; - case PERIPH_I2S1_MODULE: - return DPORT_I2S1_RST; - case PERIPH_TIMG0_MODULE: - return DPORT_TIMERGROUP_RST; - case PERIPH_TIMG1_MODULE: - return DPORT_TIMERGROUP1_RST; - case PERIPH_PWM0_MODULE: - return DPORT_PWM0_RST; - case PERIPH_PWM1_MODULE: - return DPORT_PWM1_RST; - case PERIPH_PWM2_MODULE: - return DPORT_PWM2_RST; - case PERIPH_PWM3_MODULE: - return DPORT_PWM3_RST; - case PERIPH_UHCI0_MODULE: - return DPORT_UHCI0_RST; - case PERIPH_UHCI1_MODULE: - return DPORT_UHCI1_RST; - case PERIPH_PCNT_MODULE: - return DPORT_PCNT_RST; - case PERIPH_SPI_MODULE: - return DPORT_SPI01_RST; -#if CONFIG_IDF_TARGET_ESP32 - case PERIPH_HSPI_MODULE: - return DPORT_SPI2_RST; - case PERIPH_VSPI_MODULE: - return DPORT_SPI3_RST; - case PERIPH_SPI_DMA_MODULE: - return DPORT_SPI_DMA_RST; -#elif CONFIG_IDF_TARGET_ESP32S2 - case PERIPH_FSPI_MODULE: - return DPORT_SPI2_RST; - case PERIPH_HSPI_MODULE: - return DPORT_SPI3_RST; - case PERIPH_SPI2_DMA_MODULE: - return DPORT_SPI2_DMA_RST; - case PERIPH_SPI3_DMA_MODULE: - return DPORT_SPI3_DMA_RST; -#endif - case PERIPH_SDMMC_MODULE: - return DPORT_SDIO_HOST_RST; - case PERIPH_SDIO_SLAVE_MODULE: - return DPORT_SDIO_RST; - case PERIPH_CAN_MODULE: - return DPORT_CAN_RST; - case PERIPH_EMAC_MODULE: - return DPORT_EMAC_RST; -#if CONFIG_IDF_TARGET_ESP32 - case PERIPH_AES_MODULE: - if (enable == true) { - // Clear reset on digital signature & secure boot units, otherwise AES unit is held in reset also. - return (DPORT_PERI_EN_AES | DPORT_PERI_EN_DIGITAL_SIGNATURE | DPORT_PERI_EN_SECUREBOOT); - } else { - //Don't return other units to reset, as this pulls reset on RSA & SHA units, respectively. - return DPORT_PERI_EN_AES; - } - case PERIPH_SHA_MODULE: - if (enable == true) { - // Clear reset on secure boot, otherwise SHA is held in reset - return (DPORT_PERI_EN_SHA | DPORT_PERI_EN_SECUREBOOT); - } else { - // Don't assert reset on secure boot, otherwise AES is held in reset - return DPORT_PERI_EN_SHA; - } - case PERIPH_RSA_MODULE: - if (enable == true) { - // Also clear reset on digital signature, otherwise RSA is held in reset - return (DPORT_PERI_EN_RSA | DPORT_PERI_EN_DIGITAL_SIGNATURE); - } else { - // Don't reset digital signature unit, as this resets AES also - return DPORT_PERI_EN_RSA; - } -#endif - case PERIPH_WIFI_MODULE: - case PERIPH_BT_MODULE: - case PERIPH_WIFI_BT_COMMON_MODULE: - case PERIPH_BT_BASEBAND_MODULE: - case PERIPH_BT_LC_MODULE: - return 0; - default: - return 0; - } -} - -static bool is_wifi_clk_peripheral(periph_module_t periph) -{ - /* A small subset of peripherals use WIFI_CLK_EN_REG and - CORE_RST_EN_REG for their clock & reset registers */ - switch(periph) { - case PERIPH_SDMMC_MODULE: - case PERIPH_SDIO_SLAVE_MODULE: - case PERIPH_EMAC_MODULE: - case PERIPH_RNG_MODULE: - case PERIPH_WIFI_MODULE: - case PERIPH_BT_MODULE: - case PERIPH_WIFI_BT_COMMON_MODULE: - case PERIPH_BT_BASEBAND_MODULE: - case PERIPH_BT_LC_MODULE: - return true; - default: - return false; - } -} - -static uint32_t get_clk_en_reg(periph_module_t periph) -{ -#if CONFIG_IDF_TARGET_ESP32 - if (periph == PERIPH_AES_MODULE || periph == PERIPH_SHA_MODULE || periph == PERIPH_RSA_MODULE) { - return DPORT_PERI_CLK_EN_REG; - } else -#endif - { - return is_wifi_clk_peripheral(periph) ? DPORT_WIFI_CLK_EN_REG : DPORT_PERIP_CLK_EN_REG; - } -} - -static uint32_t get_rst_en_reg(periph_module_t periph) -{ -#if CONFIG_IDF_TARGET_ESP32 - if (periph == PERIPH_AES_MODULE || periph == PERIPH_SHA_MODULE || periph == PERIPH_RSA_MODULE) { - return DPORT_PERI_RST_EN_REG; - } else -#endif - { - return is_wifi_clk_peripheral(periph) ? DPORT_CORE_RST_EN_REG : DPORT_PERIP_RST_EN_REG; - } -} - - diff --git a/components/soc/soc/esp32s2/include/soc/periph_defs.h b/components/soc/soc/esp32s2/include/soc/periph_defs.h index c72b5a5a46..5a98443ddb 100644 --- a/components/soc/soc/esp32s2/include/soc/periph_defs.h +++ b/components/soc/soc/esp32s2/include/soc/periph_defs.h @@ -15,8 +15,6 @@ #ifndef _SOC_PERIPH_DEFS_H_ #define _SOC_PERIPH_DEFS_H_ -#include "sdkconfig.h" - #ifdef __cplusplus extern "C" { #endif @@ -25,11 +23,7 @@ typedef enum { PERIPH_LEDC_MODULE = 0, PERIPH_UART0_MODULE, PERIPH_UART1_MODULE, -#ifdef CONFIG_CHIP_IS_ESP32 - PERIPH_UART2_MODULE, -#else PERIPH_USB_MODULE, -#endif PERIPH_I2C0_MODULE, PERIPH_I2C1_MODULE, PERIPH_I2S0_MODULE, @@ -49,16 +43,10 @@ typedef enum { PERIPH_HSPI_MODULE, //SPI3 PERIPH_SPI2_DMA_MODULE, PERIPH_SPI3_DMA_MODULE, - PERIPH_SDMMC_MODULE, - PERIPH_SDIO_SLAVE_MODULE, PERIPH_CAN_MODULE, - PERIPH_EMAC_MODULE, PERIPH_RNG_MODULE, PERIPH_WIFI_MODULE, - PERIPH_BT_MODULE, PERIPH_WIFI_BT_COMMON_MODULE, - PERIPH_BT_BASEBAND_MODULE, - PERIPH_BT_LC_MODULE, PERIPH_SYSTIMER_MODULE, } periph_module_t; diff --git a/components/soc/src/esp32/include/hal/clk_gate_ll.h b/components/soc/src/esp32/include/hal/clk_gate_ll.h new file mode 100644 index 0000000000..7849433bbe --- /dev/null +++ b/components/soc/src/esp32/include/hal/clk_gate_ll.h @@ -0,0 +1,253 @@ +// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include "soc/periph_defs.h" +#include "soc/dport_reg.h" +#include "soc/dport_access.h" + +static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) +{ + switch (periph) { + case PERIPH_LEDC_MODULE: + return DPORT_LEDC_CLK_EN; + case PERIPH_UART0_MODULE: + return DPORT_UART_CLK_EN; + case PERIPH_UART1_MODULE: + return DPORT_UART1_CLK_EN; + case PERIPH_UART2_MODULE: + return DPORT_UART2_CLK_EN; + case PERIPH_I2C0_MODULE: + return DPORT_I2C_EXT0_CLK_EN; + case PERIPH_I2C1_MODULE: + return DPORT_I2C_EXT1_CLK_EN; + case PERIPH_I2S0_MODULE: + return DPORT_I2S0_CLK_EN; + case PERIPH_I2S1_MODULE: + return DPORT_I2S1_CLK_EN; + case PERIPH_TIMG0_MODULE: + return DPORT_TIMERGROUP_CLK_EN; + case PERIPH_TIMG1_MODULE: + return DPORT_TIMERGROUP1_CLK_EN; + case PERIPH_PWM0_MODULE: + return DPORT_PWM0_CLK_EN; + case PERIPH_PWM1_MODULE: + return DPORT_PWM1_CLK_EN; + case PERIPH_PWM2_MODULE: + return DPORT_PWM2_CLK_EN; + case PERIPH_PWM3_MODULE: + return DPORT_PWM3_CLK_EN; + case PERIPH_UHCI0_MODULE: + return DPORT_UHCI0_CLK_EN; + case PERIPH_UHCI1_MODULE: + return DPORT_UHCI1_CLK_EN; + case PERIPH_RMT_MODULE: + return DPORT_RMT_CLK_EN; + case PERIPH_PCNT_MODULE: + return DPORT_PCNT_CLK_EN; + case PERIPH_SPI_MODULE: + return DPORT_SPI01_CLK_EN; + case PERIPH_HSPI_MODULE: + return DPORT_SPI2_CLK_EN; + case PERIPH_VSPI_MODULE: + return DPORT_SPI3_CLK_EN; + case PERIPH_SPI_DMA_MODULE: + return DPORT_SPI_DMA_CLK_EN; + case PERIPH_SDMMC_MODULE: + return DPORT_WIFI_CLK_SDIO_HOST_EN; + case PERIPH_SDIO_SLAVE_MODULE: + return DPORT_WIFI_CLK_SDIOSLAVE_EN; + case PERIPH_CAN_MODULE: + return DPORT_CAN_CLK_EN; + case PERIPH_EMAC_MODULE: + return DPORT_WIFI_CLK_EMAC_EN; + case PERIPH_RNG_MODULE: + return DPORT_WIFI_CLK_RNG_EN; + case PERIPH_WIFI_MODULE: + return DPORT_WIFI_CLK_WIFI_EN_M; + case PERIPH_BT_MODULE: + return DPORT_WIFI_CLK_BT_EN_M; + case PERIPH_WIFI_BT_COMMON_MODULE: + return DPORT_WIFI_CLK_WIFI_BT_COMMON_M; + case PERIPH_BT_BASEBAND_MODULE: + return DPORT_BT_BASEBAND_EN; + case PERIPH_BT_LC_MODULE: + return DPORT_BT_LC_EN; + case PERIPH_AES_MODULE: + return DPORT_PERI_EN_AES; + case PERIPH_SHA_MODULE: + return DPORT_PERI_EN_SHA; + case PERIPH_RSA_MODULE: + return DPORT_PERI_EN_RSA; + default: + return 0; + } +} + +static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable) +{ + switch (periph) { + case PERIPH_LEDC_MODULE: + return DPORT_LEDC_RST; + case PERIPH_UART0_MODULE: + return DPORT_UART_RST; + case PERIPH_UART1_MODULE: + return DPORT_UART1_RST; + case PERIPH_UART2_MODULE: + return DPORT_UART2_RST; + case PERIPH_I2C0_MODULE: + return DPORT_I2C_EXT0_RST; + case PERIPH_I2C1_MODULE: + return DPORT_I2C_EXT1_RST; + case PERIPH_I2S0_MODULE: + return DPORT_I2S0_RST; + case PERIPH_I2S1_MODULE: + return DPORT_I2S1_RST; + case PERIPH_TIMG0_MODULE: + return DPORT_TIMERGROUP_RST; + case PERIPH_TIMG1_MODULE: + return DPORT_TIMERGROUP1_RST; + case PERIPH_PWM0_MODULE: + return DPORT_PWM0_RST; + case PERIPH_PWM1_MODULE: + return DPORT_PWM1_RST; + case PERIPH_PWM2_MODULE: + return DPORT_PWM2_RST; + case PERIPH_PWM3_MODULE: + return DPORT_PWM3_RST; + case PERIPH_UHCI0_MODULE: + return DPORT_UHCI0_RST; + case PERIPH_UHCI1_MODULE: + return DPORT_UHCI1_RST; + case PERIPH_RMT_MODULE: + return DPORT_RMT_RST; + case PERIPH_PCNT_MODULE: + return DPORT_PCNT_RST; + case PERIPH_SPI_MODULE: + return DPORT_SPI01_RST; + case PERIPH_HSPI_MODULE: + return DPORT_SPI2_RST; + case PERIPH_VSPI_MODULE: + return DPORT_SPI3_RST; + case PERIPH_SPI_DMA_MODULE: + return DPORT_SPI_DMA_RST; + case PERIPH_SDMMC_MODULE: + return DPORT_SDIO_HOST_RST; + case PERIPH_SDIO_SLAVE_MODULE: + return DPORT_SDIO_RST; + case PERIPH_CAN_MODULE: + return DPORT_CAN_RST; + case PERIPH_EMAC_MODULE: + return DPORT_EMAC_RST; + case PERIPH_AES_MODULE: + if (enable == true) { + // Clear reset on digital signature & secure boot units, otherwise AES unit is held in reset also. + return (DPORT_PERI_EN_AES | DPORT_PERI_EN_DIGITAL_SIGNATURE | DPORT_PERI_EN_SECUREBOOT); + } else { + //Don't return other units to reset, as this pulls reset on RSA & SHA units, respectively. + return DPORT_PERI_EN_AES; + } + case PERIPH_SHA_MODULE: + if (enable == true) { + // Clear reset on secure boot, otherwise SHA is held in reset + return (DPORT_PERI_EN_SHA | DPORT_PERI_EN_SECUREBOOT); + } else { + // Don't assert reset on secure boot, otherwise AES is held in reset + return DPORT_PERI_EN_SHA; + } + case PERIPH_RSA_MODULE: + if (enable == true) { + // Also clear reset on digital signature, otherwise RSA is held in reset + return (DPORT_PERI_EN_RSA | DPORT_PERI_EN_DIGITAL_SIGNATURE); + } else { + // Don't reset digital signature unit, as this resets AES also + return DPORT_PERI_EN_RSA; + } + default: + return 0; + } +} + +static inline uint32_t periph_ll_get_clk_en_reg(periph_module_t periph) +{ + switch (periph) { + case PERIPH_AES_MODULE: + case PERIPH_SHA_MODULE: + case PERIPH_RSA_MODULE: + return DPORT_PERI_CLK_EN_REG; + case PERIPH_SDMMC_MODULE: + case PERIPH_SDIO_SLAVE_MODULE: + case PERIPH_EMAC_MODULE: + case PERIPH_RNG_MODULE: + case PERIPH_WIFI_MODULE: + case PERIPH_BT_MODULE: + case PERIPH_WIFI_BT_COMMON_MODULE: + case PERIPH_BT_BASEBAND_MODULE: + case PERIPH_BT_LC_MODULE: + return DPORT_WIFI_CLK_EN_REG; + default: + return DPORT_PERIP_CLK_EN_REG; + } +} + +static inline uint32_t periph_ll_get_rst_en_reg(periph_module_t periph) +{ + switch (periph) { + case PERIPH_AES_MODULE: + case PERIPH_SHA_MODULE: + case PERIPH_RSA_MODULE: + return DPORT_PERI_RST_EN_REG; + case PERIPH_SDMMC_MODULE: + case PERIPH_SDIO_SLAVE_MODULE: + case PERIPH_EMAC_MODULE: + case PERIPH_RNG_MODULE: + case PERIPH_WIFI_MODULE: + case PERIPH_BT_MODULE: + case PERIPH_WIFI_BT_COMMON_MODULE: + case PERIPH_BT_BASEBAND_MODULE: + case PERIPH_BT_LC_MODULE: + return DPORT_CORE_RST_EN_REG; + default: + return DPORT_PERIP_RST_EN_REG; + } +} + +static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph) +{ + DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); + DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, true)); +} + +static inline void periph_ll_disable_clk_set_rst(periph_module_t periph) +{ + DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); + DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); +} + +static inline void periph_ll_reset(periph_module_t periph) +{ + DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); + DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); +} + +#ifdef __cplusplus +} +#endif \ No newline at end of file diff --git a/components/soc/src/esp32s2/include/hal/clk_gate_ll.h b/components/soc/src/esp32s2/include/hal/clk_gate_ll.h new file mode 100644 index 0000000000..e2aed3824d --- /dev/null +++ b/components/soc/src/esp32s2/include/hal/clk_gate_ll.h @@ -0,0 +1,196 @@ +// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include "soc/periph_defs.h" +#include "soc/system_reg.h" +#include "soc/syscon_reg.h" +#include "soc/dport_access.h" + +static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) +{ + switch (periph) { + case PERIPH_LEDC_MODULE: + return DPORT_LEDC_CLK_EN; + case PERIPH_UART0_MODULE: + return DPORT_UART_CLK_EN; + case PERIPH_UART1_MODULE: + return DPORT_UART1_CLK_EN; + case PERIPH_USB_MODULE: + return DPORT_USB_CLK_EN; + case PERIPH_I2C0_MODULE: + return DPORT_I2C_EXT0_CLK_EN; + case PERIPH_I2C1_MODULE: + return DPORT_I2C_EXT1_CLK_EN; + case PERIPH_I2S0_MODULE: + return DPORT_I2S0_CLK_EN; + case PERIPH_I2S1_MODULE: + return DPORT_I2S1_CLK_EN; + case PERIPH_TIMG0_MODULE: + return DPORT_TIMERGROUP_CLK_EN; + case PERIPH_TIMG1_MODULE: + return DPORT_TIMERGROUP1_CLK_EN; + case PERIPH_PWM0_MODULE: + return DPORT_PWM0_CLK_EN; + case PERIPH_PWM1_MODULE: + return DPORT_PWM1_CLK_EN; + case PERIPH_PWM2_MODULE: + return DPORT_PWM2_CLK_EN; + case PERIPH_PWM3_MODULE: + return DPORT_PWM3_CLK_EN; + case PERIPH_UHCI0_MODULE: + return DPORT_UHCI0_CLK_EN; + case PERIPH_UHCI1_MODULE: + return DPORT_UHCI1_CLK_EN; + case PERIPH_RMT_MODULE: + return DPORT_RMT_CLK_EN; + case PERIPH_PCNT_MODULE: + return DPORT_PCNT_CLK_EN; + case PERIPH_SPI_MODULE: + return DPORT_SPI01_CLK_EN; + case PERIPH_FSPI_MODULE: + return DPORT_SPI2_CLK_EN; + case PERIPH_HSPI_MODULE: + return DPORT_SPI3_CLK_EN; + case PERIPH_SPI2_DMA_MODULE: + return DPORT_SPI2_DMA_CLK_EN; + case PERIPH_SPI3_DMA_MODULE: + return DPORT_SPI3_DMA_CLK_EN; + case PERIPH_CAN_MODULE: + return DPORT_CAN_CLK_EN; + case PERIPH_RNG_MODULE: + return DPORT_WIFI_CLK_RNG_EN; + case PERIPH_WIFI_MODULE: + return DPORT_WIFI_CLK_WIFI_EN_M; + case PERIPH_WIFI_BT_COMMON_MODULE: + return DPORT_WIFI_CLK_WIFI_BT_COMMON_M; + case PERIPH_SYSTIMER_MODULE: + return DPORT_SYSTIMER_CLK_EN; + default: + return 0; + } +} + +static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool enable) +{ + (void)enable; // unused + + switch (periph) { + case PERIPH_LEDC_MODULE: + return DPORT_LEDC_RST; + case PERIPH_UART0_MODULE: + return DPORT_UART_RST; + case PERIPH_UART1_MODULE: + return DPORT_UART1_RST; + case PERIPH_USB_MODULE: + return DPORT_USB_RST; + case PERIPH_I2C0_MODULE: + return DPORT_I2C_EXT0_RST; + case PERIPH_I2C1_MODULE: + return DPORT_I2C_EXT1_RST; + case PERIPH_I2S0_MODULE: + return DPORT_I2S0_RST; + case PERIPH_I2S1_MODULE: + return DPORT_I2S1_RST; + case PERIPH_TIMG0_MODULE: + return DPORT_TIMERGROUP_RST; + case PERIPH_TIMG1_MODULE: + return DPORT_TIMERGROUP1_RST; + case PERIPH_PWM0_MODULE: + return DPORT_PWM0_RST; + case PERIPH_PWM1_MODULE: + return DPORT_PWM1_RST; + case PERIPH_PWM2_MODULE: + return DPORT_PWM2_RST; + case PERIPH_PWM3_MODULE: + return DPORT_PWM3_RST; + case PERIPH_UHCI0_MODULE: + return DPORT_UHCI0_RST; + case PERIPH_UHCI1_MODULE: + return DPORT_UHCI1_RST; + case PERIPH_RMT_MODULE: + return DPORT_RMT_RST; + case PERIPH_PCNT_MODULE: + return DPORT_PCNT_RST; + case PERIPH_SPI_MODULE: + return DPORT_SPI01_RST; + case PERIPH_FSPI_MODULE: + return DPORT_SPI2_RST; + case PERIPH_HSPI_MODULE: + return DPORT_SPI3_RST; + case PERIPH_SPI2_DMA_MODULE: + return DPORT_SPI2_DMA_RST; + case PERIPH_SPI3_DMA_MODULE: + return DPORT_SPI3_DMA_RST; + case PERIPH_CAN_MODULE: + return DPORT_CAN_RST; + case PERIPH_SYSTIMER_MODULE: + return DPORT_SYSTIMER_RST; + default: + return 0; + } +} + +static inline uint32_t periph_ll_get_clk_en_reg(periph_module_t periph) +{ + switch (periph) { + case PERIPH_RNG_MODULE: + case PERIPH_WIFI_MODULE: + case PERIPH_WIFI_BT_COMMON_MODULE: + return DPORT_WIFI_CLK_EN_REG; + default: + return DPORT_PERIP_CLK_EN_REG; + } +} + +static inline uint32_t periph_ll_get_rst_en_reg(periph_module_t periph) +{ + switch (periph) { + case PERIPH_RNG_MODULE: + case PERIPH_WIFI_MODULE: + case PERIPH_WIFI_BT_COMMON_MODULE: + return DPORT_CORE_RST_EN_REG; + default: + return DPORT_PERIP_RST_EN_REG; + } +} + +static inline void periph_ll_enable_clk_clear_rst(periph_module_t periph) +{ + DPORT_SET_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); + DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, true)); +} + +static inline void periph_ll_disable_clk_set_rst(periph_module_t periph) +{ + DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_clk_en_reg(periph), periph_ll_get_clk_en_mask(periph)); + DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); +} + +static inline void periph_ll_reset(periph_module_t periph) +{ + DPORT_SET_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); + DPORT_CLEAR_PERI_REG_MASK(periph_ll_get_rst_en_reg(periph), periph_ll_get_rst_en_mask(periph, false)); +} + +#ifdef __cplusplus +} +#endif \ No newline at end of file