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Merge branch 'bugfix/temp_disable_s3_ulp' into 'master'

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ulp: temporarily disable ULP support for S3

Closes IDF-4818

See merge request espressif/esp-idf!17553
This commit is contained in:
morris 2022-03-27 12:08:31 +08:00
commit 8f35f16c77
2 changed files with 14 additions and 0 deletions
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6
components/ulp/ulp_fsm/ulp.c
View File

@ -42,6 +42,12 @@ static const char* TAG = "ulp";
esp_err_t ulp_run(uint32_t entry_point) esp_err_t ulp_run(uint32_t entry_point)
{ {
#if CONFIG_IDF_TARGET_ESP32S3
ESP_LOGE(TAG, "ULP temporarily unsupported on ESP32-S3, running sleep + ULP risks causing permanent damage to chip");
abort();
// Fix in-progress: DIG-160
#endif //CONFIG_IDF_TARGET_ESP32S3
#if CONFIG_IDF_TARGET_ESP32 #if CONFIG_IDF_TARGET_ESP32
// disable ULP timer // disable ULP timer
CLEAR_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN); CLEAR_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN);

8
components/ulp/ulp_riscv/ulp_riscv.c
View File

@ -20,6 +20,8 @@
#include "ulp_common.h" #include "ulp_common.h"
#include "esp_rom_sys.h" #include "esp_rom_sys.h"
__attribute__((unused)) static const char* TAG = "ulp-riscv";
static esp_err_t ulp_riscv_config_wakeup_source(ulp_riscv_wakeup_source_t wakeup_source) static esp_err_t ulp_riscv_config_wakeup_source(ulp_riscv_wakeup_source_t wakeup_source)
{ {
esp_err_t ret = ESP_OK; esp_err_t ret = ESP_OK;
@ -46,6 +48,12 @@ esp_err_t ulp_riscv_config_and_run(ulp_riscv_cfg_t* cfg)
{ {
esp_err_t ret = ESP_OK; esp_err_t ret = ESP_OK;
#if CONFIG_IDF_TARGET_ESP32S3
ESP_LOGE(TAG, "ULP temporarily unsupported on ESP32-S3, running sleep + ULP risks causing permanent damage to chip");
abort();
// Fix in-progress: DIG-160
#endif //CONFIG_IDF_TARGET_ESP32S3
#if CONFIG_IDF_TARGET_ESP32S2 #if CONFIG_IDF_TARGET_ESP32S2
/* Reset COCPU when power on. */ /* Reset COCPU when power on. */
SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SHUT_RESET_EN); SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SHUT_RESET_EN);