mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
Merge branch 'bugfix/temp_disable_s3_ulp' into 'master'
ulp: temporarily disable ULP support for S3 Closes IDF-4818 See merge request espressif/esp-idf!17553
This commit is contained in:
commit
8f35f16c77
@ -42,6 +42,12 @@ static const char* TAG = "ulp";
|
||||
|
||||
esp_err_t ulp_run(uint32_t entry_point)
|
||||
{
|
||||
#if CONFIG_IDF_TARGET_ESP32S3
|
||||
ESP_LOGE(TAG, "ULP temporarily unsupported on ESP32-S3, running sleep + ULP risks causing permanent damage to chip");
|
||||
abort();
|
||||
// Fix in-progress: DIG-160
|
||||
#endif //CONFIG_IDF_TARGET_ESP32S3
|
||||
|
||||
#if CONFIG_IDF_TARGET_ESP32
|
||||
// disable ULP timer
|
||||
CLEAR_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_SLP_TIMER_EN);
|
||||
|
@ -20,6 +20,8 @@
|
||||
#include "ulp_common.h"
|
||||
#include "esp_rom_sys.h"
|
||||
|
||||
__attribute__((unused)) static const char* TAG = "ulp-riscv";
|
||||
|
||||
static esp_err_t ulp_riscv_config_wakeup_source(ulp_riscv_wakeup_source_t wakeup_source)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
@ -46,6 +48,12 @@ esp_err_t ulp_riscv_config_and_run(ulp_riscv_cfg_t* cfg)
|
||||
{
|
||||
esp_err_t ret = ESP_OK;
|
||||
|
||||
#if CONFIG_IDF_TARGET_ESP32S3
|
||||
ESP_LOGE(TAG, "ULP temporarily unsupported on ESP32-S3, running sleep + ULP risks causing permanent damage to chip");
|
||||
abort();
|
||||
// Fix in-progress: DIG-160
|
||||
#endif //CONFIG_IDF_TARGET_ESP32S3
|
||||
|
||||
#if CONFIG_IDF_TARGET_ESP32S2
|
||||
/* Reset COCPU when power on. */
|
||||
SET_PERI_REG_MASK(RTC_CNTL_COCPU_CTRL_REG, RTC_CNTL_COCPU_SHUT_RESET_EN);
|
||||
|
Loading…
Reference in New Issue
Block a user