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fix(ble): Fixed macro definition error for 136K clock drift
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@ -766,14 +766,14 @@ static void btdm_sleep_enter_phase1_wrapper(uint32_t lpcycles)
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uint32_t us_to_sleep = btdm_lpcycles_2_hus(lpcycles, NULL) >> 1;
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uint32_t us_to_sleep = btdm_lpcycles_2_hus(lpcycles, NULL) >> 1;
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#define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
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#define BTDM_MIN_TIMER_UNCERTAINTY_US (1800)
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#define BTDM_RTC_SLOW_CLK_RC_DRIFT (7 / 100)
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#define BTDM_RTC_SLOW_CLK_RC_DRIFT_PERCENT 7
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assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
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assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
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// allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
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// allow a maximum time uncertainty to be about 488ppm(1/2048) at least as clock drift
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// and set the timer in advance
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// and set the timer in advance
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uint32_t uncertainty = (us_to_sleep >> 11);
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uint32_t uncertainty = (us_to_sleep >> 11);
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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#if CONFIG_FREERTOS_USE_TICKLESS_IDLE
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if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_RTC) {
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if (rtc_clk_slow_freq_get() == RTC_SLOW_FREQ_RTC) {
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uncertainty = us_to_sleep * BTDM_RTC_SLOW_CLK_RC_DRIFT;
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uncertainty = us_to_sleep * BTDM_RTC_SLOW_CLK_RC_DRIFT_PERCENT / 100;
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}
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}
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#endif
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#endif
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