feat(esp32c5mp): support to build g0 components

components/esp_hw_support/CMakeLists.txt

@@ -140,7 +140,7 @@ if(NOT BOOTLOADER_BUILD)
                     APPEND PROPERTY INTERFACE_LINK_LIBRARIES "-u rv_core_critical_regs_restore")
     endif()
 
-    if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT)
+    if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT AND CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
         list(APPEND srcs "modem_clock.c")
     endif()
 

components/esp_rom/esp32c5/mp/esp32c5/esp_rom_caps.h

@@ -25,7 +25,5 @@
 // TODO: [ESP32C5] IDF-8618
 // #define ESP_ROM_REV0_HAS_NO_ECDSA_INTERFACE (1) // ECO 0 does not have ets_ecdsa_verify symbol, future revision will have it
 #define ESP_ROM_WDT_INIT_PATCH              (1) // ROM version does not configure the clock
-// TODO: [ESP32C5] IDF-8658
-// #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
 #define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init
 #define ESP_ROM_HAS_VERSION                 (1) // ROM has version/eco information

components/hal/CMakeLists.txt

@@ -201,7 +201,7 @@ if(NOT BOOTLOADER_BUILD)
         list(APPEND srcs "aes_hal.c")
     endif()
 
-    if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT)
+    if(CONFIG_SOC_MODEM_CLOCK_IS_INDEPENDENT AND CONFIG_SOC_MODEM_CLOCK_SUPPORTED)
         list(APPEND srcs "${target}/modem_clock_hal.c")
     endif()
 

components/hal/esp32c5/include/hal/modem_lpcon_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -10,15 +10,19 @@
 
 #include <stdlib.h>
 #include <stdbool.h>
+#include "sdkconfig.h"  // TODO: [ESP32C5] IDF-8845 remove
 #include "soc/soc.h"
 #include "hal/assert.h"
+#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
 #include "modem/modem_lpcon_struct.h"
 #include "hal/modem_clock_types.h"
+#endif
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
 __attribute__((always_inline))
 static inline void modem_lpcon_ll_enable_test_clk(modem_lpcon_dev_t *hw, bool en)
 {
@@ -288,6 +292,8 @@ static inline uint32_t modem_lpcon_ll_get_date(modem_lpcon_dev_t *hw)
     return hw->date.val;
 }
 
+#endif
+
 #ifdef __cplusplus
 }
 #endif

components/hal/esp32c5/include/hal/modem_syscon_ll.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -10,15 +10,19 @@
 
 #include <stdlib.h>
 #include <stdbool.h>
+#include "sdkconfig.h"  // TODO: [ESP32C5] IDF-8845 remove
 #include "soc/soc.h"
 #include "hal/assert.h"
+#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
 #include "modem/modem_syscon_struct.h"
 #include "hal/modem_clock_types.h"
+#endif
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
 __attribute__((always_inline))
 static inline void modem_syscon_ll_enable_test_clk(modem_syscon_dev_t *hw, bool en)
 {
@@ -624,6 +628,7 @@ static inline uint32_t modem_syscon_ll_get_date(modem_syscon_dev_t *hw)
 {
     return hw->date.val;
 }
+#endif
 
 #ifdef __cplusplus
 }

components/soc/esp32c5/beta3/include/soc/Kconfig.soc_caps.in

@@ -75,6 +75,10 @@ config SOC_SPI_FLASH_SUPPORTED
     bool
     default y
 
+config SOC_MODEM_CLOCK_SUPPORTED
+    bool
+    default y
+
 config SOC_XTAL_SUPPORT_40M
     bool
     default y

components/soc/esp32c5/beta3/include/soc/soc_caps.h

@@ -74,6 +74,7 @@
 // #define SOC_HUK_SUPPORTED               1  // TODO: [ESP32C5] IDF-8617
 // #define SOC_LIGHT_SLEEP_SUPPORTED       1  // TODO: [ESP32C5] IDF-8640
 // #define SOC_DEEP_SLEEP_SUPPORTED        1  // TODO: [ESP32C5] IDF-8638
+#define SOC_MODEM_CLOCK_SUPPORTED       1     // TODO: [ESP32C5] IDF-8845 need check, it is opened because pll has been used on beta3
 
 /*-------------------------- XTAL CAPS ---------------------------------------*/
 #define SOC_XTAL_SUPPORT_40M            1

components/soc/esp32c6/include/soc/Kconfig.soc_caps.in

@@ -231,6 +231,10 @@ config SOC_DEEP_SLEEP_SUPPORTED
     bool
     default y
 
+config SOC_MODEM_CLOCK_SUPPORTED
+    bool
+    default y
+
 config SOC_XTAL_SUPPORT_40M
     bool
     default y

components/soc/esp32c6/include/soc/soc_caps.h

@@ -74,6 +74,7 @@
 #define SOC_RNG_SUPPORTED               1
 #define SOC_LIGHT_SLEEP_SUPPORTED       1
 #define SOC_DEEP_SLEEP_SUPPORTED        1
+#define SOC_MODEM_CLOCK_SUPPORTED       1
 
 /*-------------------------- XTAL CAPS ---------------------------------------*/
 #define SOC_XTAL_SUPPORT_40M            1

components/soc/esp32h2/include/soc/Kconfig.soc_caps.in

@@ -219,6 +219,10 @@ config SOC_DEEP_SLEEP_SUPPORTED
     bool
     default y
 
+config SOC_MODEM_CLOCK_SUPPORTED
+    bool
+    default y
+
 config SOC_XTAL_SUPPORT_32M
     bool
     default y

components/soc/esp32h2/include/soc/soc_caps.h

@@ -71,6 +71,7 @@
 #define SOC_RNG_SUPPORTED               1
 #define SOC_LIGHT_SLEEP_SUPPORTED       1
 #define SOC_DEEP_SLEEP_SUPPORTED        1
+#define SOC_MODEM_CLOCK_SUPPORTED       1
 
 /*-------------------------- XTAL CAPS ---------------------------------------*/
 #define SOC_XTAL_SUPPORT_32M            1

tools/ci/check_public_headers_exceptions.txt

@@ -99,6 +99,7 @@ components/esp_rom/include/esp32s3/rom/rtc.h
 components/esp_rom/include/esp32c2/rom/rtc.h
 # TODO: IDF-9197
 components/esp_rom/include/esp32c5/beta3/esp32c5/rom/rtc.h
+components/esp_rom/include/esp32c5/mp/esp32c5/rom/rtc.h
 components/esp_rom/include/esp32c6/rom/rtc.h
 components/esp_rom/include/esp32h2/rom/rtc.h
 components/esp_rom/include/esp32p4/rom/rtc.h