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rmt: move RMT item definition from soc to driver

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This commit is contained in:
morris 2022-01-05 16:11:19 +08:00
parent d8f2eaf94e
commit 8cdcb4e291
16 changed files with 182 additions and 333 deletions
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18
components/driver/include/driver/rmt.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -17,7 +17,6 @@ extern "C" {
#include "driver/gpio.h"
#include "freertos/FreeRTOS.h"
#include "freertos/ringbuf.h"
#include "soc/rmt_struct.h"
#include "hal/rmt_types.h"
#define RMT_CHANNEL_FLAGS_AWARE_DFS (1 << 0) /*!< Channel can work during APB clock scaling */
@ -33,6 +32,21 @@ extern "C" {
*/
#define RMT_MEM_ITEM_NUM SOC_RMT_MEM_WORDS_PER_CHANNEL
/**
* @brief Definition of RMT item
*/
typedef struct {
union {
struct {
uint32_t duration0 : 15; /*!< Duration of level0 */
uint32_t level0 : 1; /*!< Level of the first part */
uint32_t duration1 : 15; /*!< Duration of level1 */
uint32_t level1 : 1; /*!< Level of the second part */
};
uint32_t val; /*!< Equivelent unsigned value for the RMT item */
};
} rmt_item32_t;
/**
* @brief Data struct of RMT TX configure parameters
*/

6
components/driver/rmt.c
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -742,7 +742,7 @@ static int IRAM_ATTR rmt_rx_get_mem_len_in_isr(rmt_channel_t channel)
static void IRAM_ATTR rmt_driver_isr_default(void *arg)
{
uint32_t status = 0;
rmt_item32_t volatile *addr = NULL;
rmt_item32_t *addr = NULL;
uint8_t channel = 0;
rmt_hal_context_t *hal = (rmt_hal_context_t *)arg;
portBASE_TYPE HPTaskAwoken = pdFALSE;
@ -829,7 +829,7 @@ static void IRAM_ATTR rmt_driver_isr_default(void *arg)
int item_len = rmt_rx_get_mem_len_in_isr(channel);
rmt_ll_rx_set_mem_owner(rmt_contex.hal.regs, channel, RMT_MEM_OWNER_SW);
if (p_rmt->rx_buf) {
addr = RMTMEM.chan[RMT_ENCODE_RX_CHANNEL(channel)].data32;
addr = (rmt_item32_t *)RMTMEM.chan[RMT_ENCODE_RX_CHANNEL(channel)].data32;
#if SOC_RMT_SUPPORT_RX_PINGPONG
if (item_len > p_rmt->rx_item_start_idx) {
item_len = item_len - p_rmt->rx_item_start_idx;

27
components/hal/esp32/include/hal/rmt_ll.h
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@ -1,16 +1,8 @@
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdbool.h>
@ -22,6 +14,13 @@
extern "C" {
#endif
typedef struct rmt_mem_t {
struct {
uint32_t data32[64];
} chan[8];
} rmt_mem_t;
extern rmt_mem_t RMTMEM;
#define RMT_LL_HW_BASE (&RMT)
#define RMT_LL_MEM_BASE (&RMTMEM)
@ -87,7 +86,7 @@ static inline void rmt_ll_tx_start(rmt_dev_t *dev, uint32_t channel)
static inline void rmt_ll_tx_stop(rmt_dev_t *dev, uint32_t channel)
{
RMTMEM.chan[channel].data32[0].val = 0;
RMTMEM.chan[channel].data32[0] = 0;
dev->conf_ch[channel].conf1.tx_start = 0;
dev->conf_ch[channel].conf1.mem_rd_rst = 1;
dev->conf_ch[channel].conf1.mem_rd_rst = 0;

8
components/hal/esp32c3/include/hal/rmt_ll.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -16,6 +16,12 @@
extern "C" {
#endif
typedef struct rmt_mem_t {
struct {
uint32_t data32[48];
} chan[4];
} rmt_mem_t;
extern rmt_mem_t RMTMEM;
#define RMT_LL_MAX_LOOP_COUNT (1023)/*!< Max loop count that hardware is supported */

9
components/hal/esp32h2/include/hal/rmt_ll.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -16,6 +16,13 @@
extern "C" {
#endif
typedef struct rmt_mem_t {
struct {
uint32_t data32[48];
} chan[4];
} rmt_mem_t;
extern rmt_mem_t RMTMEM;
#define RMT_LL_MAX_LOOP_COUNT (1023)/*!< Max loop count that hardware is supported */
#define RMT_LL_HW_BASE (&RMT)

9
components/hal/esp32s2/include/hal/rmt_ll.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -15,6 +15,13 @@
extern "C" {
#endif
typedef struct rmt_mem_t {
struct {
uint32_t data32[64];
} chan[4];
} rmt_mem_t;
extern rmt_mem_t RMTMEM;
#define RMT_LL_MAX_LOOP_COUNT (1023)/*!< Max loop count that hardware is supported */
#define RMT_LL_HW_BASE (&RMT)

9
components/hal/esp32s3/include/hal/rmt_ll.h
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@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -15,6 +15,13 @@
extern "C" {
#endif
typedef struct rmt_mem_t {
struct {
uint32_t data32[48];
} chan[8];
} rmt_mem_t;
extern rmt_mem_t RMTMEM;
#define RMT_LL_MAX_LOOP_COUNT (1023)/*!< Max loop count that hardware is supported */
#define RMT_LL_HW_BASE (&RMT)
#define RMT_LL_MEM_BASE (&RMTMEM)

37
components/hal/include/hal/rmt_hal.h
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@ -1,16 +1,8 @@
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#ifdef __cplusplus
@ -18,16 +10,17 @@ extern "C" {
#endif
#include <stdint.h>
#include "soc/soc_caps.h"
#include "soc/rmt_struct.h"
typedef struct rmt_dev_t *rmt_soc_handle_t; // RMT SOC layer handle
typedef struct rmt_mem_t *rmt_mem_handle_t; // RMT memory handle
/**
* @brief HAL context type of RMT driver
*
*/
typedef struct {
rmt_dev_t *regs; /*!< RMT Register base address */
rmt_mem_t *mem; /*!< RMT Memory base address */
rmt_soc_handle_t regs; /*!< RMT Register base address */
rmt_mem_handle_t mem; /*!< RMT Memory base address */
} rmt_hal_context_t;
#define RMT_MEM_OWNER_SW (0) /*!< RMT Memory ownership belongs to software side */
@ -97,16 +90,6 @@ void rmt_hal_set_rx_filter_thres(rmt_hal_context_t *hal, uint32_t channel, uint3
*/
void rmt_hal_set_rx_idle_thres(rmt_hal_context_t *hal, uint32_t channel, uint32_t base_clk_hz, uint32_t thres_us);
/**
* @brief Receive a frame from RMT channel
*
* @param hal: RMT HAL context
* @param channel: RMT channel number
* @param buf: buffer to store received RMT frame
* @return number of items that get received
*/
uint32_t rmt_hal_receive(rmt_hal_context_t *hal, uint32_t channel, rmt_item32_t *buf);
#ifdef __cplusplus
}
#endif

36
components/hal/rmt_hal.c
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@ -1,16 +1,8 @@
// Copyright 2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "hal/rmt_hal.h"
#include "hal/rmt_ll.h"
#include "soc/soc_caps.h"
@ -68,21 +60,3 @@ void rmt_hal_set_rx_idle_thres(rmt_hal_context_t *hal, uint32_t channel, uint32_
uint32_t thres = (uint32_t)(base_clk_hz / 1e6 * thres_us);
rmt_ll_rx_set_idle_thres(hal->regs, channel, thres);
}
uint32_t rmt_hal_receive(rmt_hal_context_t *hal, uint32_t channel, rmt_item32_t *buf)
{
uint32_t len = 0;
rmt_ll_rx_set_mem_owner(hal->regs, channel, RMT_MEM_OWNER_SW);
for (len = 0; len < SOC_RMT_MEM_WORDS_PER_CHANNEL; len++) {
buf[len].val = hal->mem->chan[channel].data32[len].val;
if (!(buf[len].val & 0x7FFF)) {
break;
} else if (!(buf[len].val & 0x7FFF0000)) {
len++;
break;
}
}
rmt_ll_rx_set_mem_owner(hal->regs, channel, RMT_MEM_OWNER_HW);
rmt_ll_rx_reset_pointer(hal->regs, channel);
return len;
}

72
components/soc/esp32/include/soc/rmt_struct.h
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@ -1,18 +1,9 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _SOC_RMT_STRUCT_H_
#define _SOC_RMT_STRUCT_H_
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
@ -20,11 +11,11 @@
extern "C" {
#endif
typedef volatile struct rmt_dev_s {
uint32_t data_ch[8]; /*The R/W ram address for channel0-7 by apb fifo access.
typedef struct rmt_dev_t {
volatile uint32_t data_ch[8]; /*The R/W ram address for channel0-7 by apb fifo access.
Note that in some circumstances, data read from the FIFO may get lost. As RMT memory area accesses using the RMTMEM method do not have this issue
and provide all the functionality that the FIFO register has, it is encouraged to use that instead.*/
struct {
volatile struct {
union {
struct {
uint32_t div_cnt: 8; /*This register is used to configure the frequency divider's factor in channel0-7.*/
@ -57,9 +48,9 @@ typedef volatile struct rmt_dev_s {
uint32_t val;
} conf1;
} conf_ch[8];
uint32_t status_ch[8]; /*The status for channel0-7*/
uint32_t apb_mem_addr_ch[8]; /*The ram relative address in channel0-7 by apb fifo access (using fifo is discouraged, please see the note above at data_ch[] item)*/
union {
volatile uint32_t status_ch[8]; /*The status for channel0-7*/
volatile uint32_t apb_mem_addr_ch[8]; /*The ram relative address in channel0-7 by apb fifo access (using fifo is discouraged, please see the note above at data_ch[] item)*/
volatile union {
struct {
uint32_t ch0_tx_end: 1; /*The interrupt raw bit for channel 0 turns to high level when the transmit process is done.*/
uint32_t ch0_rx_end: 1; /*The interrupt raw bit for channel 0 turns to high level when the receive process is done.*/
@ -96,7 +87,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_raw;
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1; /*The interrupt state bit for channel 0's mt_ch0_tx_end_int_raw when mt_ch0_tx_end_int_ena is set to 0.*/
uint32_t ch0_rx_end: 1; /*The interrupt state bit for channel 0's rmt_ch0_rx_end_int_raw when rmt_ch0_rx_end_int_ena is set to 0.*/
@ -133,7 +124,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_st;
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1; /*Set this bit to enable rmt_ch0_tx_end_int_st.*/
uint32_t ch0_rx_end: 1; /*Set this bit to enable rmt_ch0_rx_end_int_st.*/
@ -170,7 +161,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_ena;
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1; /*Set this bit to clear the rmt_ch0_rx_end_int_raw..*/
uint32_t ch0_rx_end: 1; /*Set this bit to clear the rmt_ch0_tx_end_int_raw.*/
@ -207,21 +198,21 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_clr;
union {
volatile union {
struct {
uint32_t low: 16; /*This register is used to configure carrier wave's low level value for channel0-7.*/
uint32_t high:16; /*This register is used to configure carrier wave's high level value for channel0-7.*/
uint32_t high: 16; /*This register is used to configure carrier wave's high level value for channel0-7.*/
};
uint32_t val;
} carrier_duty_ch[8];
union {
volatile union {
struct {
uint32_t limit: 9; /*When channel0-7 sends more than reg_rmt_tx_lim_ch0 data then channel0-7 produce the relative interrupt.*/
uint32_t reserved9: 23;
};
uint32_t val;
} tx_lim_ch[8];
union {
volatile union {
struct {
uint32_t fifo_mask: 1; /*Set this bit to enable RMTMEM and disable apb fifo access (using fifo is discouraged, please see the note above at data_ch[] item)*/
uint32_t mem_tx_wrap_en: 1; /*when data need to be send is more than channel's mem can store then set this bit to enable reuse of mem this bit is used together with reg_rmt_tx_lim_chn.*/
@ -231,32 +222,11 @@ typedef volatile struct rmt_dev_s {
} apb_conf;
uint32_t reserved_f4;
uint32_t reserved_f8;
uint32_t date; /*This is the version register.*/
volatile uint32_t date; /*This is the version register.*/
} rmt_dev_t;
extern rmt_dev_t RMT;
typedef struct rmt_item32_s {
union {
struct {
uint32_t duration0 :15;
uint32_t level0 :1;
uint32_t duration1 :15;
uint32_t level1 :1;
};
uint32_t val;
};
} rmt_item32_t;
//Allow access to RMT memory using RMTMEM.chan[0].data32[8]
typedef volatile struct rmt_mem_s {
struct {
rmt_item32_t data32[64];
} chan[8];
} rmt_mem_t;
extern rmt_mem_t RMTMEM;
#ifdef __cplusplus
}
#endif
#endif /* _SOC_RMT_STRUCT_H_ */

80
components/soc/esp32c3/include/soc/rmt_struct.h
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@ -1,18 +1,9 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _SOC_RMT_STRUCT_H_
#define _SOC_RMT_STRUCT_H_
/*
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
@ -20,9 +11,9 @@
extern "C" {
#endif
typedef volatile struct rmt_dev_s {
uint32_t data_ch[4]; /**/
union {
typedef struct rmt_dev_t {
volatile uint32_t data_ch[4];
volatile union {
struct {
uint32_t tx_start: 1;
uint32_t mem_rd_rst: 1;
@ -44,7 +35,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} tx_conf[2];
struct {
volatile struct {
union {
struct {
uint32_t div_cnt: 8;
@ -73,7 +64,7 @@ typedef volatile struct rmt_dev_s {
uint32_t val;
} conf1;
} rx_conf[2];
union {
volatile union {
struct {
uint32_t mem_raddr_ex: 9;
uint32_t state: 3;
@ -85,7 +76,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} tx_status[2];
union {
volatile union {
struct {
uint32_t mem_waddr_ex: 9;
uint32_t reserved9: 3;
@ -99,7 +90,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} rx_status[2];
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1;
uint32_t ch1_tx_end: 1;
@ -119,7 +110,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_raw;
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1;
uint32_t ch1_tx_end: 1;
@ -139,7 +130,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_st;
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1;
uint32_t ch1_tx_end: 1;
@ -159,7 +150,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_ena;
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1;
uint32_t ch1_tx_end: 1;
@ -179,21 +170,21 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_clr;
union {
volatile union {
struct {
uint32_t low: 16;
uint32_t high: 16;
};
uint32_t val;
} tx_carrier[2];
union {
volatile union {
struct {
uint32_t low_thres: 16;
uint32_t high_thres: 16;
};
uint32_t val;
} rx_carrier[2];
union {
volatile union {
struct {
uint32_t limit: 9;
uint32_t tx_loop_num: 10;
@ -203,14 +194,14 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} tx_lim[2];
union {
volatile union {
struct {
uint32_t rx_lim: 9;
uint32_t reserved9: 23;
};
uint32_t val;
} rx_lim[2];
union {
volatile union {
struct {
uint32_t fifo_mask: 1;
uint32_t mem_clk_force_on: 1;
@ -226,7 +217,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} sys_conf;
union {
volatile union {
struct {
uint32_t ch0: 1;
uint32_t ch1: 1;
@ -235,7 +226,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} tx_sim;
union {
volatile union {
struct {
uint32_t ch0: 1;
uint32_t ch1: 1;
@ -267,7 +258,7 @@ typedef volatile struct rmt_dev_s {
uint32_t reserved_c0;
uint32_t reserved_c4;
uint32_t reserved_c8;
union {
volatile union {
struct {
uint32_t date: 28;
uint32_t reserved28: 4;
@ -278,29 +269,6 @@ typedef volatile struct rmt_dev_s {
extern rmt_dev_t RMT;
typedef struct {
union {
struct {
uint32_t duration0 : 15;
uint32_t level0 : 1;
uint32_t duration1 : 15;
uint32_t level1 : 1;
};
uint32_t val;
};
} rmt_item32_t;
//Allow access to RMT memory using RMTMEM.chan[0].data32[8]
typedef volatile struct rmt_mem_s {
struct {
rmt_item32_t data32[48];
} chan[4];
} rmt_mem_t;
extern rmt_mem_t RMTMEM;
#ifdef __cplusplus
}
#endif
#endif /* _SOC_RMT_STRUCT_H_ */

64
components/soc/esp32h2/include/soc/rmt_struct.h
View File

@ -1,10 +1,9 @@
/*
* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _SOC_RMT_STRUCT_H_
#define _SOC_RMT_STRUCT_H_
#pragma once
#include <stdint.h>
@ -12,9 +11,9 @@
extern "C" {
#endif
typedef volatile struct rmt_dev_s {
uint32_t data_ch[4]; /**/
union {
typedef struct rmt_dev_t {
volatile uint32_t data_ch[4];
volatile union {
struct {
uint32_t tx_start: 1;
uint32_t mem_rd_rst: 1;
@ -36,7 +35,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} tx_conf[2];
struct {
volatile struct {
union {
struct {
uint32_t div_cnt: 8;
@ -65,7 +64,7 @@ typedef volatile struct rmt_dev_s {
uint32_t val;
} conf1;
} rx_conf[2];
union {
volatile union {
struct {
uint32_t mem_raddr_ex: 9;
uint32_t state: 3;
@ -77,7 +76,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} tx_status[2];
union {
volatile union {
struct {
uint32_t mem_waddr_ex: 9;
uint32_t reserved9: 3;
@ -91,7 +90,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} rx_status[2];
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1;
uint32_t ch1_tx_end: 1;
@ -111,7 +110,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_raw;
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1;
uint32_t ch1_tx_end: 1;
@ -131,7 +130,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_st;
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1;
uint32_t ch1_tx_end: 1;
@ -151,7 +150,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_ena;
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1;
uint32_t ch1_tx_end: 1;
@ -171,21 +170,21 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_clr;
union {
volatile union {
struct {
uint32_t low: 16;
uint32_t high: 16;
};
uint32_t val;
} tx_carrier[2];
union {
volatile union {
struct {
uint32_t low_thres: 16;
uint32_t high_thres: 16;
};
uint32_t val;
} rx_carrier[2];
union {
volatile union {
struct {
uint32_t limit: 9;
uint32_t tx_loop_num: 10;
@ -195,14 +194,14 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} tx_lim[2];
union {
volatile union {
struct {
uint32_t rx_lim: 9;
uint32_t reserved9: 23;
};
uint32_t val;
} rx_lim[2];
union {
volatile union {
struct {
uint32_t fifo_mask: 1;
uint32_t mem_clk_force_on: 1;
@ -218,7 +217,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} sys_conf;
union {
volatile union {
struct {
uint32_t ch0: 1;
uint32_t ch1: 1;
@ -227,7 +226,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} tx_sim;
union {
volatile union {
struct {
uint32_t ch0: 1;
uint32_t ch1: 1;
@ -259,7 +258,7 @@ typedef volatile struct rmt_dev_s {
uint32_t reserved_c0;
uint32_t reserved_c4;
uint32_t reserved_c8;
union {
volatile union {
struct {
uint32_t date: 28;
uint32_t reserved28: 4;
@ -270,29 +269,6 @@ typedef volatile struct rmt_dev_s {
extern rmt_dev_t RMT;
typedef struct {
union {
struct {
uint32_t duration0 : 15;
uint32_t level0 : 1;
uint32_t duration1 : 15;
uint32_t level1 : 1;
};
uint32_t val;
};
} rmt_item32_t;
//Allow access to RMT memory using RMTMEM.chan[0].data32[8]
typedef volatile struct rmt_mem_s {
struct {
rmt_item32_t data32[48];
} chan[4];
} rmt_mem_t;
extern rmt_mem_t RMTMEM;
#ifdef __cplusplus
}
#endif
#endif /* _SOC_RMT_STRUCT_H_ */

78
components/soc/esp32s2/include/soc/rmt_struct.h
View File

@ -1,18 +1,9 @@
// Copyright 2017-2018 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _SOC_RMT_STRUCT_H_
#define _SOC_RMT_STRUCT_H_
/*
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdint.h>
@ -20,9 +11,9 @@
extern "C" {
#endif
typedef volatile struct rmt_dev_s {
uint32_t data_ch[4]; /* Data FIFO, Can only be accessed by PeriBus2 */
struct {
typedef struct rmt_dev_t {
volatile uint32_t data_ch[4]; /* Data FIFO, Can only be accessed by PeriBus2 */
volatile struct {
union {
struct {
uint32_t div_cnt: 8;
@ -56,7 +47,7 @@ typedef volatile struct rmt_dev_s {
uint32_t val;
} conf1;
} conf_ch[4];
union {
volatile union {
struct {
uint32_t mem_waddr_ex: 9;
uint32_t reserved9: 1;
@ -72,7 +63,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} status_ch[4];
union {
volatile union {
struct {
uint32_t waddr: 9;
uint32_t reserved9: 1;
@ -81,7 +72,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} apb_mem_addr_ch[4];
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1;
uint32_t ch0_rx_end: 1;
@ -111,7 +102,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_raw;
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1;
uint32_t ch0_rx_end: 1;
@ -141,7 +132,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_st;
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1;
uint32_t ch0_rx_end: 1;
@ -171,7 +162,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_ena;
union {
volatile union {
struct {
uint32_t ch0_tx_end: 1;
uint32_t ch0_rx_end: 1;
@ -201,14 +192,14 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} int_clr;
union {
volatile union {
struct {
uint32_t low: 16;
uint32_t high: 16;
};
uint32_t val;
} carrier_duty_ch[4];
union {
volatile union {
struct {
uint32_t limit: 9;
uint32_t tx_loop_num: 10;
@ -219,7 +210,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} tx_lim_ch[4];
union {
volatile union {
struct {
uint32_t fifo_mask: 1;
uint32_t mem_tx_wrap_en: 1;
@ -231,7 +222,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} apb_conf;
union {
volatile union {
struct {
uint32_t ch0: 1;
uint32_t ch1: 1;
@ -242,7 +233,7 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} tx_sim;
union {
volatile union {
struct {
uint32_t ch0: 1;
uint32_t ch1: 1;
@ -252,10 +243,10 @@ typedef volatile struct rmt_dev_s {
};
uint32_t val;
} ref_cnt_rst;
union {
volatile union {
struct {
uint32_t carrier_low_thres_ch: 16;
uint32_t carrier_high_thres_ch:16;
uint32_t carrier_high_thres_ch: 16;
};
uint32_t val;
} ch_rx_carrier_rm[4];
@ -283,32 +274,11 @@ typedef volatile struct rmt_dev_s {
uint32_t reserved_f0;
uint32_t reserved_f4;
uint32_t reserved_f8;
uint32_t date; /* Version Control Register */
volatile uint32_t date;
} rmt_dev_t;
extern rmt_dev_t RMT;
typedef struct {
union {
struct {
uint32_t duration0 :15;
uint32_t level0 :1;
uint32_t duration1 :15;
uint32_t level1 :1;
};
uint32_t val;
};
} rmt_item32_t;
//Allow access to RMT memory using RMTMEM.chan[0].data32[8]
typedef volatile struct rmt_mem_s {
struct {
rmt_item32_t data32[64];
} chan[4];
} rmt_mem_t;
extern rmt_mem_t RMTMEM;
#ifdef __cplusplus
}
#endif
#endif /* _SOC_RMT_STRUCT_H_ */

52
components/soc/esp32s3/include/soc/rmt_struct.h
View File

@ -1,16 +1,7 @@
/** Copyright 2021 Espressif Systems (Shanghai) PTE LTD
/*
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
@ -123,7 +114,11 @@ typedef union {
* synchronization bit for CHANNELn
*/
uint32_t conf_update_n: 1;
uint32_t reserved_25: 7;
/** dma_access_en_n : WT; bitpos: [25]; default: 0;
* DMA access control bit for CHANNELn
*/
uint32_t dma_access_en_n: 1;
uint32_t reserved_26: 6;
};
uint32_t val;
} rmt_chnconf0_reg_t;
@ -143,7 +138,10 @@ typedef struct {
* than this register value, received process is finished.
*/
uint32_t idle_thres_m: 15;
uint32_t reserved_23: 1;
/** dma_access_en_m : WT; bitpos: [23]; default: 0;
* DMA access control bit for CHANNELm
*/
uint32_t dma_access_en_m: 1;
/** mem_size_m : R/W; bitpos: [27:24]; default: 1;
* This register is used to configure the maximum size of memory allocated to CHANNELm.
*/
@ -1064,7 +1062,7 @@ typedef union {
} rmt_date_reg_t;
typedef struct {
typedef struct rmt_dev_t {
volatile rmt_chndata_reg_t chndata[4];
volatile rmt_chmdata_reg_t chmdata[4];
volatile rmt_chnconf0_reg_t chnconf0[4];
@ -1089,31 +1087,7 @@ typedef struct {
_Static_assert(sizeof(rmt_dev_t) == 0xd0, "Invalid size of rmt_dev_t structure");
#endif
typedef struct {
union {
struct {
uint32_t duration0 : 15;
uint32_t level0 : 1;
uint32_t duration1 : 15;
uint32_t level1 : 1;
};
uint32_t val;
};
} rmt_item32_t;
typedef struct {
struct {
volatile rmt_item32_t data32[48];
} chan[8];
} rmt_mem_t;
#ifndef __cplusplus
_Static_assert(sizeof(rmt_item32_t) == 0x04, "Invalid size of rmt_item32_t structure");
_Static_assert(sizeof(rmt_mem_t) == 0x04 * 8 * 48, "Invalid size of rmt_mem_t structure");
#endif
extern rmt_dev_t RMT;
extern rmt_mem_t RMTMEM;
#ifdef __cplusplus
}

7
tools/ci/check_copyright_ignore.txt
View File

@ -973,7 +973,6 @@ components/hal/esp32/include/hal/i2s_ll.h
components/hal/esp32/include/hal/interrupt_controller_ll.h
components/hal/esp32/include/hal/mpu_ll.h
components/hal/esp32/include/hal/pcnt_ll.h
components/hal/esp32/include/hal/rmt_ll.h
components/hal/esp32/include/hal/rtc_cntl_ll.h
components/hal/esp32/include/hal/rtc_io_ll.h
components/hal/esp32/include/hal/rwdt_ll.h
@ -1129,7 +1128,6 @@ components/hal/include/hal/mpu_hal.h
components/hal/include/hal/mpu_types.h
components/hal/include/hal/pcnt_hal.h
components/hal/include/hal/pcnt_types.h
components/hal/include/hal/rmt_hal.h
components/hal/include/hal/rmt_types.h
components/hal/include/hal/rtc_io_types.h
components/hal/include/hal/sdio_slave_hal.h
@ -1166,7 +1164,6 @@ components/hal/platform_port/include/hal/assert.h
components/hal/platform_port/include/hal/check.h
components/hal/platform_port/include/hal/log.h
components/hal/platform_port/include/hal/misc.h
components/hal/rmt_hal.c
components/hal/rtc_io_hal.c
components/hal/sdio_slave_hal.c
components/hal/sha_hal.c
@ -1615,7 +1612,6 @@ components/soc/esp32/include/soc/pcnt_struct.h
components/soc/esp32/include/soc/pid.h
components/soc/esp32/include/soc/reset_reasons.h
components/soc/esp32/include/soc/rmt_reg.h
components/soc/esp32/include/soc/rmt_struct.h
components/soc/esp32/include/soc/rtc_cntl_reg.h
components/soc/esp32/include/soc/rtc_cntl_struct.h
components/soc/esp32/include/soc/rtc_i2c_reg.h
@ -1696,7 +1692,6 @@ components/soc/esp32c3/include/soc/nrx_reg.h
components/soc/esp32c3/include/soc/periph_defs.h
components/soc/esp32c3/include/soc/reset_reasons.h
components/soc/esp32c3/include/soc/rmt_reg.h
components/soc/esp32c3/include/soc/rmt_struct.h
components/soc/esp32c3/include/soc/rtc_cntl_reg.h
components/soc/esp32c3/include/soc/rtc_cntl_struct.h
components/soc/esp32c3/include/soc/rtc_i2c_reg.h
@ -1832,7 +1827,6 @@ components/soc/esp32s2/include/soc/pcnt_reg.h
components/soc/esp32s2/include/soc/pcnt_struct.h
components/soc/esp32s2/include/soc/reset_reasons.h
components/soc/esp32s2/include/soc/rmt_reg.h
components/soc/esp32s2/include/soc/rmt_struct.h
components/soc/esp32s2/include/soc/rtc_cntl_reg.h
components/soc/esp32s2/include/soc/rtc_cntl_struct.h
components/soc/esp32s2/include/soc/rtc_i2c_reg.h
@ -1938,7 +1932,6 @@ components/soc/esp32s3/include/soc/peri_backup_reg.h
components/soc/esp32s3/include/soc/peri_backup_struct.h
components/soc/esp32s3/include/soc/reset_reasons.h
components/soc/esp32s3/include/soc/rmt_reg.h
components/soc/esp32s3/include/soc/rmt_struct.h
components/soc/esp32s3/include/soc/rtc_gpio_channel.h
components/soc/esp32s3/include/soc/rtc_i2c_reg.h
components/soc/esp32s3/include/soc/rtc_i2c_struct.h

3
tools/unit-test-app/components/test_utils/ref_clock_impl_rmt_pcnt.c
View File

@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2017-2021 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2017-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -24,6 +24,7 @@
#include "freertos/FreeRTOS.h"
#include "esp_intr_alloc.h"
#include "esp_private/periph_ctrl.h"
#include "driver/rmt.h"
#include "soc/gpio_sig_map.h"
#include "soc/gpio_periph.h"
#include "soc/soc_caps.h"