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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
fix: remove wno format in hal component
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parent
5b4469f973
commit
8c6ddb776c
@ -261,7 +261,6 @@ idf_component_register(SRCS ${srcs}
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PRIV_INCLUDE_DIRS ${priv_include}
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REQUIRES soc esp_rom
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LDFRAGMENTS linker.lf)
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target_compile_options(${COMPONENT_LIB} PRIVATE "-Wno-format")
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if(CONFIG_HAL_DEFAULT_ASSERTION_LEVEL EQUAL 1)
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target_link_libraries(${COMPONENT_LIB} INTERFACE "-u abort")
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@ -94,14 +94,14 @@ static void adc_hal_onetime_start(adc_unit_t unit, uint32_t clk_src_freq_hz)
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delay = (1000 * 1000) / digi_clk + 1;
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//3 ADC digital controller clock cycle
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delay = delay * 3;
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HAL_EARLY_LOGD("adc_hal", "clk_src_freq_hz: %d, digi_clk: %d, delay: %d", clk_src_freq_hz, digi_clk, delay);
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HAL_EARLY_LOGD("adc_hal", "clk_src_freq_hz: %"PRIu32", digi_clk: %"PRIu32", delay: %"PRIu32"", clk_src_freq_hz, digi_clk, delay);
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//This coefficient (8) is got from test, and verified from DT. When digi_clk is not smaller than ``APB_CLK_FREQ/8``, no delay is needed.
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if (digi_clk >= APB_CLK_FREQ/8) {
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delay = 0;
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}
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HAL_EARLY_LOGD("adc_hal", "delay: %d", delay);
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HAL_EARLY_LOGD("adc_hal", "delay: %"PRIu32"", delay);
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adc_oneshot_ll_start(false);
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esp_rom_delay_us(delay);
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adc_oneshot_ll_start(true);
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@ -56,7 +56,7 @@ uint32_t lcd_hal_cal_pclk_freq(lcd_hal_context_t *hal, uint32_t src_freq_hz, uin
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b /= d;
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}
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HAL_EARLY_LOGD("lcd_hal", "n=%d,a=%d,b=%d,mo=%d", n, a, b, mo);
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HAL_EARLY_LOGD("lcd_hal", "n=%"PRIu32",a=%"PRIu32",b=%"PRIu32",mo=%"PRIu32"", n, a, b, mo);
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lcd_ll_set_group_clock_coeff(hal->dev, n, a, b);
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lcd_ll_set_pixel_clock_prescale(hal->dev, mo);
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -7,6 +7,7 @@
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// The HAL layer for SDIO slave (common part)
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#include <string.h>
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#include <inttypes.h>
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#include "soc/slc_struct.h"
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#include "soc/hinf_struct.h"
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#include "hal/sdio_slave_types.h"
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@ -318,11 +319,11 @@ static void send_new_packet(sdio_slave_context_t *hal)
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// update pkt_len register to allow host reading.
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sdio_slave_ll_send_write_len(hal->slc, end_desc->pkt_len);
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HAL_EARLY_LOGV(TAG, "send_length_write: %d, last_len: %08X", end_desc->pkt_len, sdio_slave_ll_send_read_len(hal->host));
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HAL_EARLY_LOGV(TAG, "send_length_write: %"PRIu32", last_len: %08"PRIX32"", end_desc->pkt_len, sdio_slave_ll_send_read_len(hal->host));
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send_set_state(hal, STATE_SENDING);
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HAL_EARLY_LOGD(TAG, "restart new send: %p->%p, pkt_len: %d", start_desc, end_desc, end_desc->pkt_len);
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HAL_EARLY_LOGD(TAG, "restart new send: %p->%p, pkt_len: %"PRIu32"", start_desc, end_desc, end_desc->pkt_len);
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}
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static esp_err_t send_check_new_packet(sdio_slave_context_t *hal)
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@ -668,7 +669,7 @@ void sdio_slave_hal_load_buf(sdio_slave_context_t *hal, sdio_slave_ll_desc_t *de
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static inline void show_queue_item(sdio_slave_ll_desc_t *item)
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{
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HAL_EARLY_LOGI(TAG, "=> %p: size: %d(%d), eof: %d, owner: %d", item, item->size, item->length, item->eof, item->owner);
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HAL_EARLY_LOGI(TAG, "=> %p: size: %"PRIu32"(%"PRIu32"), eof: %"PRIu32", owner: %"PRIu32"", item, item->size, item->length, item->eof, item->owner);
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HAL_EARLY_LOGI(TAG, " buf: %p, stqe_next: %p", item->buf, item->qe.stqe_next);
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}
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@ -1,4 +1,3 @@
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idf_component_register(SRC_DIRS "."
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PRIV_INCLUDE_DIRS "${include_dirs}"
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PRIV_REQUIRES cmock test_utils)
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target_compile_options(${COMPONENT_LIB} PRIVATE "-Wno-format")
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