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efuse: Prevent burning XTS_AES and ECDSA keys into BLOCK9 (BLOCK_KEY5)
eFuse module has a hardware bug. It is related to ESP32-C3, C6, S3, H2 chips: - BLOCK9 (BLOCK_KEY5) can not be used by XTS_AES keys. For H2 chips, the BLOCK9 (BLOCK_KEY5) can not be used by ECDSA keys. S2 does not have such a hardware bug.
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@ -301,6 +301,20 @@ esp_err_t esp_efuse_write_key(esp_efuse_block_t block, esp_efuse_purpose_t purpo
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unsigned idx = block - EFUSE_BLK_KEY0;
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ESP_EFUSE_CHK(esp_efuse_write_field_blob(s_table[idx].key, key, key_size_bytes * 8));
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ESP_EFUSE_CHK(esp_efuse_set_key_dis_write(block));
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#if SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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if (block == EFUSE_BLK9 && (
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#if SOC_FLASH_ENCRYPTION_XTS_AES_256
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
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#endif
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY)) {
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ESP_LOGE(TAG, "BLOCK9 can not have the %d purpose because of HW bug (see TRM for more details)", purpose);
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err = ESP_ERR_NOT_SUPPORTED;
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goto err_exit;
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}
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#endif // SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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if (purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY ||
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#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
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@ -48,6 +48,23 @@ TEST_CASE("Test keys and purposes, rd, wr, wr_key_purposes are in the initial st
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}
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}
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#if CONFIG_EFUSE_VIRTUAL
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#if SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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TEST_CASE("Test efuse API blocks burning XTS and ECDSA keys into BLOCK9", "[efuse]")
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{
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uint8_t key[32] = {0};
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esp_efuse_purpose_t purpose = ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY;
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TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_write_key(EFUSE_BLK9, purpose, &key, sizeof(key)));
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#if SOC_FLASH_ENCRYPTION_XTS_AES_256
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purpose = ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1;
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TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_write_key(EFUSE_BLK9, purpose, &key, sizeof(key)));
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purpose = ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2;
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TEST_ESP_ERR(ESP_ERR_NOT_SUPPORTED, esp_efuse_write_key(EFUSE_BLK9, purpose, &key, sizeof(key)));
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#endif
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}
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#endif // SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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#endif // CONFIG_EFUSE_VIRTUAL
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// If using efuse is real, then turn off writing tests.
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#if CONFIG_EFUSE_VIRTUAL || CONFIG_IDF_ENV_FPGA
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@ -117,14 +134,29 @@ TEST_CASE("Test esp_efuse_write_key for virt mode", "[efuse]")
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TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_key(EFUSE_BLK_KEY0, tmp_purpose, &rd_key, 33));
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TEST_ESP_ERR(ESP_ERR_INVALID_ARG, esp_efuse_write_key(EFUSE_BLK10, tmp_purpose, &rd_key, sizeof(rd_key)));
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for (esp_efuse_purpose_t purpose = ESP_EFUSE_KEY_PURPOSE_RESERVED; purpose < ESP_EFUSE_KEY_PURPOSE_MAX; ++purpose) {
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for (esp_efuse_purpose_t g_purpose = ESP_EFUSE_KEY_PURPOSE_USER; g_purpose < ESP_EFUSE_KEY_PURPOSE_MAX; ++g_purpose) {
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if (g_purpose == ESP_EFUSE_KEY_PURPOSE_USER) {
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continue;
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}
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esp_efuse_utility_reset();
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esp_efuse_utility_update_virt_blocks();
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esp_efuse_utility_debug_dump_blocks();
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TEST_ASSERT_FALSE(esp_efuse_find_purpose(purpose, NULL));
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TEST_ASSERT_FALSE(esp_efuse_find_purpose(g_purpose, NULL));
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for (esp_efuse_block_t num_key = (EFUSE_BLK_KEY_MAX - 1); num_key >= EFUSE_BLK_KEY0; --num_key) {
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esp_efuse_purpose_t purpose = g_purpose;
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#if SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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if (num_key == EFUSE_BLK9 && (
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#ifdef SOC_FLASH_ENCRYPTION_XTS_AES_256
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_1 ||
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_256_KEY_2 ||
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#endif //#ifdef SOC_EFUSE_SUPPORT_XTS_AES_256_KEYS
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purpose == ESP_EFUSE_KEY_PURPOSE_XTS_AES_128_KEY)) {
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printf("BLOCK9 can not have the %d purpose, use RESERVED instead\n", purpose);
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purpose = ESP_EFUSE_KEY_PURPOSE_RESERVED;
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}
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#endif // SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK
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int id = num_key - EFUSE_BLK_KEY0;
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TEST_ASSERT_EQUAL(id + 1, esp_efuse_count_unused_key_blocks());
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test_write_key(num_key, purpose);
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@ -266,6 +266,9 @@
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#define SOC_TWAI_BRP_MAX 16384
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#define SOC_TWAI_SUPPORTS_RX_STATUS 1
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/*-------------------------- eFuse CAPS----------------------------*/
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#define SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK 1 // AES-XTS key purpose not supported for this block
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/*-------------------------- Flash Encryption CAPS----------------------------*/
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#define SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX (32)
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@ -250,6 +250,9 @@
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#define SOC_TWAI_BRP_MAX 16384
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#define SOC_TWAI_SUPPORTS_RX_STATUS 1
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/*-------------------------- eFuse CAPS----------------------------*/
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#define SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK 1 // AES-XTS and ECDSA key purposes not supported for this block
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/*-------------------------- Flash Encryption CAPS----------------------------*/
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#define SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX (32)
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@ -325,6 +325,8 @@
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#define SOC_PM_SUPPORT_DEEPSLEEP_VERIFY_STUB_ONLY (1)
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/*-------------------------- eFuse CAPS----------------------------*/
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#define SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK 1 // AES-XTS key purpose not supported for this block
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/*-------------------------- Flash Encryption CAPS----------------------------*/
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#define SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX (64)
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