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SPI: SPI master clock calculation: n has a minimum of 2 to allow for both a low and a high cycle. Fixes https://github.com/espressif/esp-idf/issues/491
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@ -300,7 +300,7 @@ static int spi_set_clock(spi_dev_t *hw, int fapb, int hz, int duty_cycle) {
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int bestpre=-1;
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int bestpre=-1;
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int besterr=0;
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int besterr=0;
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int errval;
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int errval;
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for (n=1; n<=64; n++) {
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for (n=2; n<=64; n++) { //Start at 2: we need to be able to set h/l so we have at least one high and one low pulse.
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//Effectively, this does pre=round((fapb/n)/hz).
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//Effectively, this does pre=round((fapb/n)/hz).
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pre=((fapb/n)+(hz/2))/hz;
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pre=((fapb/n)+(hz/2))/hz;
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if (pre<=0) pre=1;
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if (pre<=0) pre=1;
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