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feat(soc/usb): Add USB UTMI PHY struct and LL for the ESP32-P4
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components/hal/esp32p4/include/hal/usb_utmi_ll.h
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components/hal/esp32p4/include/hal/usb_utmi_ll.h
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdbool.h>
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#include "esp_attr.h"
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#include "soc/lp_clkrst_struct.h"
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#include "soc/hp_sys_clkrst_struct.h"
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#include "soc/usb_utmi_struct.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* ----------------------------- RCC Functions ----------------------------- */
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/**
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* @brief Enable the bus clock for the USB UTMI PHY and USB_DWC_HS controller
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*
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* @param clk_en True to enable, false to disable
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*/
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FORCE_INLINE_ATTR void usb_utmi_ll_enable_bus_clock(bool clk_en)
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{
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// Enable/disable system clock for USB_UTMI and USB_DWC_HS
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HP_SYS_CLKRST.soc_clk_ctrl1.reg_usb_otg20_sys_clk_en = clk_en;
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// Enable PHY ref clock (48MHz) for USB UTMI PHY
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LP_AON_CLKRST.hp_usb_clkrst_ctrl1.usb_otg20_phyref_clk_en = clk_en;
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}
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// HP_SYS_CLKRST.soc_clk_ctrlx and LP_AON_CLKRST.hp_usb_clkrst_ctrlx are shared registers, so this function must be used in an atomic way
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#define usb_utmi_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; usb_utmi_ll_enable_bus_clock(__VA_ARGS__)
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/**
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* @brief Reset the USB UTMI PHY and USB_DWC_HS controller
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*/
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FORCE_INLINE_ATTR void usb_utmi_ll_reset_register(void)
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{
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// Reset the USB_UTMI and USB_DWC_HS
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LP_AON_CLKRST.hp_usb_clkrst_ctrl1.rst_en_usb_otg20 = 1;
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LP_AON_CLKRST.hp_usb_clkrst_ctrl1.rst_en_usb_otg20 = 0;
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}
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// P_AON_CLKRST.hp_usb_clkrst_ctrlx are shared registers, so this function must be used in an atomic way
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#define usb_utmi_ll_reset_register(...) (void)__DECLARE_RCC_ATOMIC_ENV; usb_utmi_ll_reset_register(__VA_ARGS__)
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#ifdef __cplusplus
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}
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#endif
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132
components/soc/esp32p4/include/soc/usb_utmi_struct.h
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components/soc/esp32p4/include/soc/usb_utmi_struct.h
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef union {
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struct {
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/** clk_gate_rx : R/W; bitpos: [0]; default 2'b0;
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* Clock Gating Control Signal for Rx.
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* 2'b0 Lower power consumption
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* 2'b1 Lowest power consumption mode
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* 2'b2 Normal power consumption mode
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*/
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uint32_t clk_gate_rx:2;
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/** clk_gate_tx : R/W; bitpos: [2]; default: 1'b0;
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* Clock Gating Control Signal for Rx.
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* 1'b0 Low power consumption mode
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* 1'b1 Normal power consumption mode
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*/
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uint32_t clk_gate_tx:1;
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/** adj_res_fs : Reserved; bitpos: [3]; default: 0;
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* Fine tune the 45ohm termination resistor (FS)
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* Reserved
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*/
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uint32_t adj_res_fs:2;
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/** adj_res_hs : R/W; bitpos: [5]; default: 3'b100;
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* Fine tune the 45ohm termination resistor (HS)
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* 3'b000 40 Ohm
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* 3'b100 45 Ohm
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* 3'b110 50 Ohm
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*/
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uint32_t adj_res_hs:3;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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} usb_utmi_fc_00_reg_t;
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typedef union {
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struct {
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/** adj_vref_sq : R/W; bitpos: [0]; default: 4'b0010;
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* Squelch detection threshold voltage control bits
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* 4'b0000 92 mV
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* 4'b0010 124 mV
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* 4'b0011 152 mV
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*/
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uint32_t adj_vref_sq:4;
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/** adj_pw_hs : R/W; bitpos: [4]; default: 4'b1111;
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* Super power saving with reduced output swing mode control bits (for HS mode only)
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* 4'b0001 100 mV output swing
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* 4'b0011 200 mV output swing
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* 4'b0111 300 mV output swing
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* 4'b1111 400 mV output swing
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*/
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uint32_t adj_pw_hs:4;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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} usb_utmi_fc_01_reg_t;
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typedef union {
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struct {
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/** adj_iref_res : R/W; bitpos: [0]; default: 4'b0111
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* Internal bias current adjustment control bits
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* 4'b0000 125 uA
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* 4'b0111 100 uA
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* 4'b1111 78 uA
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*/
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uint32_t adj_iref_res:4;
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/** adj_vsw_hs : R/W; bitpos: [4]; default: 3'b100
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* Output eye shape adjustment control bits
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* 3'b000 320 mV
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* 3'b100 400 mV
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* 3'b111 460 mV
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*/
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uint32_t adj_vsw_hs:3;
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uint32_t reserved_7:25;
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};
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uint32_t val;
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} usb_utmi_fc_02_reg_t;
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typedef union {
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struct {
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/** adj_pll : R/W; bitpos: [0]; default: 4'b0101
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* PLL adjustment signal
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*/
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uint32_t adj_pll:4;
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/** adj_osc : R/W; bitpos: [4]; default: 2'b00
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* PLL adjustment signal
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*/
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uint32_t adj_osc:2;
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uint32_t reserved_6:26;
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};
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uint32_t val;
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} usb_utmi_fc_03_reg_t;
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typedef union {
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struct {
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/** reserved_out5 : R/W; bitpos: [0]; default: 8'b0
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* RESERVED_OUT5
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*/
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uint32_t reserved_out5:8;
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uint32_t reserved_8:24;
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};
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uint32_t val;
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} usb_utmi_fc_04_reg_t;
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typedef struct usb_utmi_dev_t {
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volatile usb_utmi_fc_00_reg_t fc_00;
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volatile usb_utmi_fc_01_reg_t fc_01;
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volatile usb_utmi_fc_02_reg_t fc_02;
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volatile usb_utmi_fc_03_reg_t fc_03;
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usb_utmi_fc_04_reg_t fc_04;
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} usb_utmi_dev_t;
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extern usb_utmi_dev_t USB_UTMI;
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#ifndef __cplusplus
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_Static_assert(sizeof(usb_utmi_dev_t) == 0x14, "Invalid size of usb_utmi_dev_t structure");
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#endif
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#ifdef __cplusplus
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}
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#endif
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@ -108,6 +108,7 @@ PROVIDE ( DMA2D = 0x50088000 );
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PROVIDE ( USB_WRAP = 0x50080000 );
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PROVIDE ( USB_DWC_HS = 0x50000000 );
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PROVIDE ( USB_DWC_FS = 0x50040000 );
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PROVIDE ( USB_UTMI = 0x5009C000 );
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PROVIDE ( EMAC_MAC = 0x50098000 );
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PROVIDE ( EMAC_DMA = 0x50099000 );
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