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Merge branch 'bugfix/change_clock_name_v5.0' into 'release/v5.0'

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mcpwm: fix wrong return value in the legacy MCPWM driver (5.0)

See merge request espressif/esp-idf!20693
This commit is contained in:
morris 2022-10-28 10:02:40 +08:00
commit 8481fbf752
7 changed files with 48 additions and 17 deletions
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2
components/driver/deprecated/driver/mcpwm.h
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@ -472,7 +472,7 @@ uint32_t mcpwm_capture_signal_get_value(mcpwm_unit_t mcpwm_num, mcpwm_capture_si
* @param cap_sig capture channel of whose edge is to be determined
*
* @return
* Capture signal edge: 1 - positive edge, 2 - negtive edge
* Capture signal edge: 1 - positive edge, 2 - negative edge, 0 - Invalid
*/
uint32_t mcpwm_capture_signal_get_edge(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig);

25
components/driver/deprecated/mcpwm_legacy.c
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@ -427,7 +427,10 @@ esp_err_t mcpwm_init(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, const mcpw
uint32_t mcpwm_get_frequency(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num)
{
MCPWM_TIMER_CHECK(mcpwm_num, timer_num);
if (mcpwm_num >= MCPWM_UNIT_MAX || timer_num >= MCPWM_TIMER_MAX) {
ESP_LOGE(TAG, "Invalid MCPWM timer instance");
return 0;
}
mcpwm_hal_context_t *hal = &context[mcpwm_num].hal;
mcpwm_critical_enter(mcpwm_num);
int real_group_prescale = mcpwm_ll_group_get_clock_prescale(hal->dev);
@ -441,9 +444,12 @@ uint32_t mcpwm_get_frequency(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num)
float mcpwm_get_duty(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_generator_t gen)
{
if (mcpwm_num >= MCPWM_UNIT_MAX || timer_num >= MCPWM_TIMER_MAX || gen >= MCPWM_GEN_MAX) {
ESP_LOGE(TAG, "Invalid MCPWM generator instance");
return 0;
}
//the driver currently always use the timer x for operator x
const int op = timer_num;
MCPWM_GEN_CHECK(mcpwm_num, timer_num, gen);
mcpwm_hal_context_t *hal = &context[mcpwm_num].hal;
mcpwm_critical_enter(mcpwm_num);
float duty = 100.0 * mcpwm_ll_operator_get_compare_value(hal->dev, op, gen) / mcpwm_ll_timer_get_peak(hal->dev, timer_num, false);
@ -453,9 +459,12 @@ float mcpwm_get_duty(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_gene
uint32_t mcpwm_get_duty_in_us(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, mcpwm_operator_t gen)
{
if (mcpwm_num >= MCPWM_UNIT_MAX || timer_num >= MCPWM_TIMER_MAX || gen >= MCPWM_GEN_MAX) {
ESP_LOGE(TAG, "Invalid MCPWM generator instance");
return 0;
}
//the driver currently always use the timer x for operator x
const int op = timer_num;
MCPWM_GEN_CHECK(mcpwm_num, timer_num, gen);
mcpwm_hal_context_t *hal = &context[mcpwm_num].hal;
mcpwm_critical_enter(mcpwm_num);
int real_group_prescale = mcpwm_ll_group_get_clock_prescale(hal->dev);
@ -851,16 +860,18 @@ esp_err_t mcpwm_capture_disable_channel(mcpwm_unit_t mcpwm_num, mcpwm_capture_ch
uint32_t MCPWM_ISR_ATTR mcpwm_capture_signal_get_value(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig)
{
ESP_RETURN_ON_FALSE(mcpwm_num < SOC_MCPWM_GROUPS, ESP_ERR_INVALID_ARG, TAG, MCPWM_GROUP_NUM_ERROR);
ESP_RETURN_ON_FALSE(cap_sig < SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER, ESP_ERR_INVALID_ARG, TAG, MCPWM_CAPTURE_ERROR);
if (mcpwm_num >= MCPWM_UNIT_MAX || cap_sig >= SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER) {
return 0;
}
mcpwm_hal_context_t *hal = &context[mcpwm_num].hal;
return mcpwm_ll_capture_get_value(hal->dev, cap_sig);
}
uint32_t MCPWM_ISR_ATTR mcpwm_capture_signal_get_edge(mcpwm_unit_t mcpwm_num, mcpwm_capture_signal_t cap_sig)
{
ESP_RETURN_ON_FALSE(mcpwm_num < SOC_MCPWM_GROUPS, ESP_ERR_INVALID_ARG, TAG, MCPWM_GROUP_NUM_ERROR);
ESP_RETURN_ON_FALSE(cap_sig < SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER, ESP_ERR_INVALID_ARG, TAG, MCPWM_CAPTURE_ERROR);
if (mcpwm_num >= MCPWM_UNIT_MAX || cap_sig >= SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER) {
return 0;
}
mcpwm_hal_context_t *hal = &context[mcpwm_num].hal;
return mcpwm_ll_capture_get_edge(hal->dev, cap_sig) == MCPWM_CAP_EDGE_NEG ? 2 : 1;
}

12
components/driver/include/driver/mcpwm_cap.h
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@ -94,6 +94,18 @@ esp_err_t mcpwm_capture_timer_start(mcpwm_cap_timer_handle_t cap_timer);
*/
esp_err_t mcpwm_capture_timer_stop(mcpwm_cap_timer_handle_t cap_timer);
/**
* @brief Get MCPWM capture timer resolution, in Hz
*
* @param[in] cap_timer MCPWM capture timer, allocated by `mcpwm_new_capture_timer()`
* @param[out] out_resolution Returned capture timer resolution, in Hz
* @return
* - ESP_OK: Get capture timer resolution successfully
* - ESP_ERR_INVALID_ARG: Get capture timer resolution failed because of invalid argument
* - ESP_FAIL: Get capture timer resolution failed because of other error
*/
esp_err_t mcpwm_capture_timer_get_resolution(mcpwm_cap_timer_handle_t cap_timer, uint32_t *out_resolution);
/**
* @brief MCPWM Capture timer sync phase configuration
*/

7
components/driver/mcpwm/mcpwm_cap.c
View File

@ -185,6 +185,13 @@ esp_err_t mcpwm_capture_timer_stop(mcpwm_cap_timer_handle_t cap_timer)
return ESP_OK;
}
esp_err_t mcpwm_capture_timer_get_resolution(mcpwm_cap_timer_handle_t cap_timer, uint32_t *out_resolution)
{
ESP_RETURN_ON_FALSE(cap_timer && out_resolution, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
*out_resolution = cap_timer->resolution_hz;
return ESP_OK;
}
static esp_err_t mcpwm_capture_channel_register_to_timer(mcpwm_cap_channel_t *cap_channel, mcpwm_cap_timer_t *cap_timer)
{
int cap_chan_id = -1;

10
components/driver/test_apps/mcpwm/main/test_mcpwm_cap.c
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@ -74,7 +74,7 @@ TEST_CASE("mcpwm_capture_ext_gpio", "[mcpwm]")
printf("install mcpwm capture timer\r\n");
mcpwm_cap_timer_handle_t cap_timer = NULL;
mcpwm_capture_timer_config_t cap_timer_config = {
.clk_src = MCPWM_CAPTURE_CLK_SRC_APB,
.clk_src = MCPWM_CAPTURE_CLK_SRC_DEFAULT,
.group_id = 0,
};
TEST_ESP_OK(mcpwm_new_capture_timer(&cap_timer_config, &cap_timer));
@ -115,8 +115,8 @@ TEST_CASE("mcpwm_capture_ext_gpio", "[mcpwm]")
gpio_set_level(cap_gpio, 0);
vTaskDelay(pdMS_TO_TICKS(100));
printf("capture value: Pos=%"PRIu32", Neg=%"PRIu32"\r\n", cap_value[0], cap_value[1]);
// Capture timer is clocked from APB by default
uint32_t clk_src_res = esp_clk_apb_freq();
uint32_t clk_src_res;
mcpwm_capture_timer_get_resolution(cap_timer, &clk_src_res);
TEST_ASSERT_UINT_WITHIN(100000, clk_src_res / 10, cap_value[1] - cap_value[0]);
printf("uninstall capture channel and timer\r\n");
@ -183,8 +183,8 @@ TEST_CASE("mcpwm_capture_software_catch", "[mcpwm]")
TEST_ASSERT_EQUAL(2, test_callback_data.cap_data_index);
uint32_t delta = test_callback_data.cap_data[1] - test_callback_data.cap_data[0];
esp_rom_printf("duration=%u ticks\r\n", delta);
// Capture timer is clocked from APB by default
uint32_t clk_src_res = esp_clk_apb_freq();
uint32_t clk_src_res;
mcpwm_capture_timer_get_resolution(cap_timer, &clk_src_res);
TEST_ASSERT_UINT_WITHIN(80000, clk_src_res / 100, delta);
printf("uninstall capture channel and timer\r\n");

7
components/soc/esp32/include/soc/clk_tree_defs.h
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@ -108,6 +108,7 @@ typedef enum {
// For digital domain: peripherals, WIFI, BLE
SOC_MOD_CLK_APB, /*!< APB_CLK is highly dependent on the CPU_CLK source */
SOC_MOD_CLK_PLL_D2, /*!< PLL_D2_CLK is derived from PLL, it has a fixed divider of 2 */
SOC_MOD_CLK_PLL_F160M, /*!< PLL_F160M_CLK is derived from PLL, and has a fixed frequency of 160MHz */
SOC_MOD_CLK_XTAL32K, /*!< XTAL32K_CLK comes from the external 32kHz crystal, passing a clock gating to the peripherals */
SOC_MOD_CLK_RC_FAST, /*!< RC_FAST_CLK comes from the internal 8MHz rc oscillator, passing a clock gating to the peripherals */
SOC_MOD_CLK_RC_FAST_D256, /*!< RC_FAST_D256_CLK comes from the internal 8MHz rc oscillator, divided by 256, and passing a clock gating to the peripherals */
@ -207,14 +208,14 @@ typedef enum {
/**
* @brief Array initializer for all supported clock sources of MCPWM Timer
*/
#define SOC_MCPWM_TIMER_CLKS {SOC_MOD_CLK_PLL_D2}
#define SOC_MCPWM_TIMER_CLKS {SOC_MOD_CLK_PLL_F160M}
/**
* @brief Type of MCPWM timer clock source
*/
typedef enum {
MCPWM_TIMER_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_D2, /*!< Select PLL_D2 (160MHz) as the source clock */
MCPWM_TIMER_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_D2, /*!< Select PLL_D2 as the default clock choice */
MCPWM_TIMER_CLK_SRC_PLL160M = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the source clock */
MCPWM_TIMER_CLK_SRC_DEFAULT = SOC_MOD_CLK_PLL_F160M, /*!< Select PLL_F160M as the default clock choice */
} soc_periph_mcpwm_timer_clk_src_t;
/**

2
docs/en/api-reference/peripherals/mcpwm.rst
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@ -806,7 +806,7 @@ The MCPWM capture channel can inform the user when there's a valid edge detected
- :cpp:member:`mcpwm_capture_event_callbacks_t::on_cap` sets callback function for the capture channel when a valid edge is detected.
The callback function will provide event specific data of type :cpp:type:`mcpwm_capture_event_data_t`, so that you can get the the edge of the capture signal in :cpp:member:`mcpwm_capture_event_data_t::cap_edge` and the count value of that moment in :cpp:member:`mcpwm_capture_event_data_t::cap_value`.
The callback function will provide event specific data of type :cpp:type:`mcpwm_capture_event_data_t`, so that you can get the edge of the capture signal in :cpp:member:`mcpwm_capture_event_data_t::cap_edge` and the count value of that moment in :cpp:member:`mcpwm_capture_event_data_t::cap_value`. To convert the capture count into timestamp, you need to know the resolution of the capture timer by calling :cpp:func:`mcpwm_capture_timer_get_resolution`.
The callback function is called within the ISR context, so is should **not** attempt to block (e.g., make sure that only FreeRTOS APIs with ``ISR`` suffix is called within the function).