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freertos: fix gnu asm extensions.

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The llvm asm pasrser doesn't support some gnu asm extensions,
like using "&" with macro arguments. So, replace such code with
code which could be compiled by llvm.
This commit is contained in:
Andrei Safronov 2022-07-21 11:04:40 +03:00
parent cab6b6d182
commit 847462a578
2 changed files with 17 additions and 14 deletions
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8
components/freertos/FreeRTOS-Kernel-SMP/portable/xtensa/xtensa_vectors.S
View File

@ -218,7 +218,7 @@
/* Get mask of pending, enabled interrupts at this level into a2. */ /* Get mask of pending, enabled interrupts at this level into a2. */
.L_xt_user_int_&level&: .L_xt_user_int_\level :
rsr a2, INTENABLE rsr a2, INTENABLE
rsr a3, INTERRUPT rsr a3, INTERRUPT
movi a4, \mask movi a4, \mask
@ -327,14 +327,14 @@
#ifdef XT_USE_SWPRI #ifdef XT_USE_SWPRI
j 8f j 8f
#else #else
j .L_xt_user_int_&level& /* check for more interrupts */ j .L_xt_user_int_\level /* check for more interrupts */
#endif #endif
#ifdef XT_RTOS_TIMER_INT #ifdef XT_RTOS_TIMER_INT
7: 7:
.ifeq XT_TIMER_INTPRI - \level .ifeq XT_TIMER_INTPRI - \level
.L_xt_user_int_timer_&level&: .L_xt_user_int_timer_\level :
/* /*
Interrupt handler for the RTOS tick timer if at this level. Interrupt handler for the RTOS tick timer if at this level.
We'll be reading the interrupt state again after this call We'll be reading the interrupt state again after this call
@ -355,7 +355,7 @@
#ifdef XT_USE_SWPRI #ifdef XT_USE_SWPRI
j 8f j 8f
#else #else
j .L_xt_user_int_&level& /* check for more interrupts */ j .L_xt_user_int_\level /* check for more interrupts */
#endif #endif
#ifdef XT_USE_SWPRI #ifdef XT_USE_SWPRI

23
components/freertos/FreeRTOS-Kernel/portable/xtensa/xtensa_vectors.S
View File

@ -216,7 +216,7 @@
/* Get mask of pending, enabled interrupts at this level into a2. */ /* Get mask of pending, enabled interrupts at this level into a2. */
.L_xt_user_int_&level&: .L_xt_user_int_\level :
rsr a2, INTENABLE rsr a2, INTENABLE
rsr a3, INTERRUPT rsr a3, INTERRUPT
movi a4, \mask movi a4, \mask
@ -325,14 +325,14 @@
#ifdef XT_USE_SWPRI #ifdef XT_USE_SWPRI
j 8f j 8f
#else #else
j .L_xt_user_int_&level& /* check for more interrupts */ j .L_xt_user_int_\level /* check for more interrupts */
#endif #endif
#ifdef XT_RTOS_TIMER_INT #ifdef XT_RTOS_TIMER_INT
7: 7:
.ifeq XT_TIMER_INTPRI - \level .ifeq XT_TIMER_INTPRI - \level
.L_xt_user_int_timer_&level&: .L_xt_user_int_timer_\level :
/* /*
Interrupt handler for the RTOS tick timer if at this level. Interrupt handler for the RTOS tick timer if at this level.
We'll be reading the interrupt state again after this call We'll be reading the interrupt state again after this call
@ -353,7 +353,7 @@
#ifdef XT_USE_SWPRI #ifdef XT_USE_SWPRI
j 8f j 8f
#else #else
j .L_xt_user_int_&level& /* check for more interrupts */ j .L_xt_user_int_\level /* check for more interrupts */
#endif #endif
#ifdef XT_USE_SWPRI #ifdef XT_USE_SWPRI
@ -592,8 +592,9 @@ _xt_user_exc:
/* If level 1 interrupt then jump to the dispatcher */ /* If level 1 interrupt then jump to the dispatcher */
rsr a0, EXCCAUSE rsr a0, EXCCAUSE
beqi a0, EXCCAUSE_LEVEL1INTERRUPT, _xt_lowint1 bnei a0, EXCCAUSE_LEVEL1INTERRUPT, _xt_handle_exc
j _xt_lowint1
_xt_handle_exc:
/* Handle any coprocessor exceptions. Rely on the fact that exception /* Handle any coprocessor exceptions. Rely on the fact that exception
numbers above EXCCAUSE_CP0_DISABLED all relate to the coprocessors. numbers above EXCCAUSE_CP0_DISABLED all relate to the coprocessors.
*/ */
@ -961,7 +962,9 @@ locking.
* to force cp restore to next thread * to force cp restore to next thread
*/ */
#ifndef CONFIG_FREERTOS_FPU_IN_ISR #ifndef CONFIG_FREERTOS_FPU_IN_ISR
beq a15, a2, .L_goto_done /* new owner == old, we're done */ bne a15, a2, .L_switch_context
j .L_goto_done /* new owner == old, we're done */
.L_switch_context:
#endif #endif
/* If no old owner then nothing to save. */ /* If no old owner then nothing to save. */
@ -1678,7 +1681,7 @@ _Level6Vector:
.global xt_nmi .global xt_nmi
.align 4 .align 4
_NMIExceptionVector: _NMIExceptionVector:
wsr a0, EXCSAVE + XCHAL_NMILEVEL _ /* preserve a0 */ wsr a0, EXCSAVE + XCHAL_NMILEVEL /* preserve a0 */
call0 xt_nmi /* load interrupt handler */ call0 xt_nmi /* load interrupt handler */
/* never returns here - call0 is used as a jump (see note at top) */ /* never returns here - call0 is used as a jump (see note at top) */
@ -1799,9 +1802,9 @@ _xt_alloca_exc:
wsr a2, PS /* update PS.OWB to new window base */ wsr a2, PS /* update PS.OWB to new window base */
rsync rsync
_bbci.l a4, 31, _WindowUnderflow4 bbci.l a4, 31, _WindowUnderflow4
rotw -1 /* original a0 goes to a8 */ rotw -1 /* original a0 goes to a8 */
_bbci.l a8, 30, _WindowUnderflow8 bbci.l a8, 30, _WindowUnderflow8
rotw -1 rotw -1
j _WindowUnderflow12 j _WindowUnderflow12