docs: updated documents related to wakeup source, ulp, flash-encryption and memory types

docs/en/api-guides/memory-types.rst

@@ -119,7 +119,11 @@ Jump table optimizations can be re-enabled for individual source files that don'
 IROM (code executed from flash)
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-If a function is not explicitly placed into :ref:`iram` or RTC memory, it is placed into flash. The mechanism by which Flash MMU is used to allow code execution from flash is described in *{IDF_TARGET_NAME} Technical Reference Manual* > *Memory Management and Protection Units (MMU, MPU)* [`PDF <{IDF_TARGET_TRM_EN_URL}#mpummu>`__]. As IRAM is limited, most of an application's binary code must be placed into IROM instead.
+If a function is not explicitly placed into :ref:`iram` or RTC memory, it is placed into flash. As IRAM is limited, most of an application's binary code must be placed into IROM instead.
+
+.. only:: esp32
+
+    The mechanism by which Flash MMU is used to allow code execution from flash is described in *{IDF_TARGET_NAME} Technical Reference Manual* > *Memory Management and Protection Units (MMU, MPU)* [`PDF <{IDF_TARGET_TRM_EN_URL}#mpummu>`__].
 
 During :doc:`startup`, the bootloader (which runs from IRAM) configures the MMU flash cache to map the app's instruction code region to the instruction space. Flash accessed via the MMU is cached using some internal SRAM and accessing cached flash data is as fast as accessing other types of internal memory.
 

docs/en/api-reference/system/ulp_instruction_set.rst

@@ -191,8 +191,8 @@ The detailed description of all instructions is presented below:
     label:   nop                        // definition of variable label
 
 
-**AND** - Logical AND of two operands
--------------------------------------
+**AND** - Bitwise logical AND of two operands
+---------------------------------------------
 
 **Syntax**
     **AND** *Rdst, Rsrc1, Rsrc2*
@@ -209,7 +209,7 @@ The detailed description of all instructions is presented below:
   2 cycles to execute, 4 cycles to fetch next instruction
 
 **Description**
-  The instruction does a logical AND of a source register and another source register or a 16-bit signed value and stores the result to the destination register.
+  The instruction does a bitwise logical AND of a source register and another source register or a 16-bit signed value and stores the result to the destination register.
 
 **Examples**::
 
@@ -226,8 +226,8 @@ The detailed description of all instructions is presented below:
     label:  nop                     // definition of variable label
 
 
-**OR** - Logical OR of two operands
------------------------------------
+**OR** - Bitwise logical OR of two operands
+-------------------------------------------
 
 **Syntax**
   **OR** *Rdst, Rsrc1, Rsrc2*
@@ -244,7 +244,7 @@ The detailed description of all instructions is presented below:
   2 cycles to execute, 4 cycles to fetch next instruction
 
 **Description**
-  The instruction does a logical OR of a source register and another source register or a 16-bit signed value and stores the result to the destination register.
+  The instruction does a bitwise logical OR of a source register and another source register or a 16-bit signed value and stores the result to the destination register.
 
 **Examples**::
 

docs/en/security/flash-encryption.rst

@@ -243,8 +243,8 @@ Flash Encryption Configuration
 
 The following flash encryption modes are available:
 
-- :ref:`flash-enc-development-mode` - recommended for use ONLY DURING DEVELOPMENT, as it does not prevent modification and readout of encrypted flash contents.
-- :ref:`flash-enc-release-mode` - recommended for manufacturing and production to prevent physical readout of encrypted flash contents.
+- :ref:`flash-enc-development-mode` - recommended for use only during development. In this mode, it is still possible to flash new plaintext firmware to the device, and the bootloader will transparently encrypt this firmware using the key stored in hardware. This allows, indirectly, to read out the plaintext of the firmware in flash.
+- :ref:`flash-enc-release-mode` - recommended for manufacturing and production. In this mode, flashing plaintext firmware to the device without knowing the encryption key is no longer possible.
 
 This section provides information on the mentioned flash encryption modes and step by step instructions on how to use them.
 

docs/zh_CN/api-guides/memory-types.rst

@@ -119,7 +119,11 @@ IRAM（指令 RAM）
 IROM（代码从 flash 中运行）
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-如果一个函数没有被显式地声明放在 IRAM 或者 RTC 存储器中，则它会放在 flash 中。允许从 flash 中执行代码的 Flash MMU 机制可参考 {IDF_TARGET_NAME} 技术参考手册* > *存储器管理和保护单元 (MMU, MPU)* [`PDF <{IDF_TARGET_TRM_CN_URL}#mpummu>`__]。由于 IRAM 空间有限，应用程序的大部分二进制代码都需要放入 IROM 中。
+如果一个函数没有被显式地声明放在 IRAM 或者 RTC 存储器中，则它会放在 flash 中。由于 IRAM 空间有限，应用程序的大部分二进制代码都需要放入 IROM 中。
+
+.. only:: esp32
+
+    允许从 flash 中执行代码的 Flash MMU 机制可参考 {IDF_TARGET_NAME} 技术参考手册* > *存储器管理和保护单元 (MMU, MPU)* [`PDF <{IDF_TARGET_TRM_CN_URL}#mpummu>`__]。
 
 在 :doc:`启动 <startup>` 过程中，从 IRAM 中运行的引导加载程序配置 MMU flash 缓存，将应用程序的指令代码区域映射到指令空间。通过 MMU 访问的 flash 使用一些内部 SRAM 进行缓存，访问缓存的 flash 数据与访问其他类型的内部存储器一样快。
 

docs/zh_CN/security/flash-encryption.rst

@@ -243,8 +243,8 @@ Flash 加密设置
 
 提供以下 flash 加密模式：
 
-- :ref:`flash-enc-development-mode` - 建议仅在开发过程中使用，因为它不会阻止修改和读取加密的 flash 内容。
-- :ref:`flash-enc-release-mode` - 建议用于制造和生产，以防止物理读取加密的 flash 内容。
+- :ref:`flash-enc-development-mode` - 建议仅在开发过程中使用。因为在这种模式下，仍然可以将新的明文固件烧录到设备，并且引导加载程序将使用存储在硬件中的密钥对该固件进行透明加密。此操作间接允许从 flash 中读出固件明文。
+- :ref:`flash-enc-release-mode` - 推荐用于制造和生产。因为在这种模式下，如果不知道加密密钥，则不可能将明文固件烧录到设备。
 
 本节将详细介绍上述 flash 加密模式，并且逐步说明如何使用它们。