From 82bcd4dc7f27ddd198e595896465e77bf318ca5e Mon Sep 17 00:00:00 2001
From: wuzhenghui <wuzhenghui@espressif.com>
Date: Mon, 5 Jun 2023 21:17:40 +0800
Subject: [PATCH] bugfix: fix esp32s3 psram access failed when dfs is enabled

---
 components/esp_hw_support/sleep_modes.c       |  6 ++++--
 components/esp_pm/CMakeLists.txt              |  2 +-
 components/esp_pm/pm_impl.c                   | 19 ++++++++++++++++++-
 .../spi_flash/spi_flash_timing_tuning.c       |  4 ++--
 4 files changed, 25 insertions(+), 6 deletions(-)

diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c
index 654a8042cb..dd7d22b42a 100644
--- a/components/esp_hw_support/sleep_modes.c
+++ b/components/esp_hw_support/sleep_modes.c
@@ -550,8 +550,10 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags)
     rtc_clk_cpu_freq_set_config(&cpu_freq_config);
 
 #if SOC_SPI_MEM_SUPPORT_TIME_TUNING
-    // Restore mspi clock freq
-    spi_timing_change_speed_mode_cache_safe(false);
+    if (cpu_freq_config.source == RTC_CPU_FREQ_SRC_PLL) {
+        // Restore mspi clock freq
+        spi_timing_change_speed_mode_cache_safe(false);
+    }
 #endif
 
     if (!deep_sleep) {
diff --git a/components/esp_pm/CMakeLists.txt b/components/esp_pm/CMakeLists.txt
index 5c68058e97..40307acbe3 100644
--- a/components/esp_pm/CMakeLists.txt
+++ b/components/esp_pm/CMakeLists.txt
@@ -1,4 +1,4 @@
 idf_component_register(SRCS "pm_locks.c" "pm_trace.c" "pm_impl.c"
                        INCLUDE_DIRS include
-                       PRIV_REQUIRES esp_system driver
+                       PRIV_REQUIRES esp_system driver spi_flash
                        LDFRAGMENTS linker.lf)
diff --git a/components/esp_pm/pm_impl.c b/components/esp_pm/pm_impl.c
index 72c6fdb4fd..ca08ecb610 100644
--- a/components/esp_pm/pm_impl.c
+++ b/components/esp_pm/pm_impl.c
@@ -17,6 +17,7 @@
 #include "esp_private/crosscore_int.h"
 
 #include "soc/rtc.h"
+#include "soc/soc_caps.h"
 #include "hal/cpu_hal.h"
 #include "hal/uart_ll.h"
 #include "hal/uart_types.h"
@@ -32,6 +33,10 @@
 #include "esp_private/pm_trace.h"
 #include "esp_private/esp_timer_private.h"
 
+#if SOC_SPI_MEM_SUPPORT_TIME_TUNING
+#include "esp_private/spi_flash_os.h"
+#endif
+
 #include "esp_sleep.h"
 
 #include "sdkconfig.h"
@@ -501,7 +506,19 @@ static void IRAM_ATTR do_switch(pm_mode_t new_mode)
         if (switch_down) {
             on_freq_update(old_ticks_per_us, new_ticks_per_us);
         }
-        rtc_clk_cpu_freq_set_config_fast(&new_config);
+
+        if (new_config.source == RTC_CPU_FREQ_SRC_PLL) {
+            rtc_clk_cpu_freq_set_config_fast(&new_config);
+#if SOC_SPI_MEM_SUPPORT_TIME_TUNING
+            spi_timing_change_speed_mode_cache_safe(false);
+#endif
+        } else {
+#if SOC_SPI_MEM_SUPPORT_TIME_TUNING
+            spi_timing_change_speed_mode_cache_safe(true);
+#endif
+            rtc_clk_cpu_freq_set_config_fast(&new_config);
+        }
+
         if (!switch_down) {
             on_freq_update(old_ticks_per_us, new_ticks_per_us);
         }
diff --git a/components/spi_flash/spi_flash_timing_tuning.c b/components/spi_flash/spi_flash_timing_tuning.c
index 2c5b4183a6..445284268d 100644
--- a/components/spi_flash/spi_flash_timing_tuning.c
+++ b/components/spi_flash/spi_flash_timing_tuning.c
@@ -470,8 +470,8 @@ void spi_timing_enter_mspi_high_speed_mode(bool control_spi1)
 
 void spi_timing_change_speed_mode_cache_safe(bool switch_down)
 {
-    Cache_Freeze_ICache_Enable(1);
-    Cache_Freeze_DCache_Enable(1);
+    Cache_Freeze_ICache_Enable(CACHE_FREEZE_ACK_BUSY);
+    Cache_Freeze_DCache_Enable(CACHE_FREEZE_ACK_BUSY);
     if (switch_down) {
         //enter MSPI low speed mode, extra delays should be removed
         spi_timing_enter_mspi_low_speed_mode(false);