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Merge branch 'bugfix/extram_stack_coredump_v5.0' into 'release/v5.0'

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coredump: add support for stacks in external RAM (backport v5.0)

See merge request espressif/esp-idf!22410
This commit is contained in:
Ivan Grokhotkov 2023-02-20 20:32:19 +08:00
commit 82458fd31d
5 changed files with 20 additions and 7 deletions
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11
components/espcoredump/Kconfig
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@ -14,7 +14,6 @@ menu "Core dump"
config ESP_COREDUMP_ENABLE_TO_FLASH config ESP_COREDUMP_ENABLE_TO_FLASH
bool "Flash" bool "Flash"
depends on !SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
select FREERTOS_ENABLE_TASK_SNAPSHOT select FREERTOS_ENABLE_TASK_SNAPSHOT
select ESP_COREDUMP_ENABLE select ESP_COREDUMP_ENABLE
config ESP_COREDUMP_ENABLE_TO_UART config ESP_COREDUMP_ENABLE_TO_UART
@ -79,9 +78,19 @@ menu "Core dump"
Config delay (in ms) before printing core dump to UART. Config delay (in ms) before printing core dump to UART.
Delay can be interrupted by pressing Enter key. Delay can be interrupted by pressing Enter key.
config ESP_COREDUMP_USE_STACK_SIZE
bool
default y if ESP_COREDUMP_ENABLE_TO_FLASH && SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
default n
help
Force the use of a custom DRAM stack for coredump when Task stacks can be in PSRAM.
config ESP_COREDUMP_STACK_SIZE config ESP_COREDUMP_STACK_SIZE
int "Reserved stack size" int "Reserved stack size"
depends on ESP_COREDUMP_ENABLE depends on ESP_COREDUMP_ENABLE
range 0 4096 if !ESP_COREDUMP_USE_STACK_SIZE
range 1280 4096 if ESP_COREDUMP_USE_STACK_SIZE
default 0 default 0
help help
Size of the memory to be reserved for core dump stack. If 0 core dump process will run on Size of the memory to be reserved for core dump stack. If 0 core dump process will run on

10
components/espcoredump/src/core_dump_common.c
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@ -115,7 +115,13 @@ FORCE_INLINE_ATTR void esp_core_dump_report_stack_usage(void)
esp_core_dump_restore_sp(&s_stack_context); esp_core_dump_restore_sp(&s_stack_context);
} }
#else #else // CONFIG_ESP_COREDUMP_STACK_SIZE > 0
/* Here, we are not going to use a custom stack for coredump. Make sure the current configuration doesn't require one. */
#if CONFIG_ESP_COREDUMP_USE_STACK_SIZE
#pragma error "CONFIG_ESP_COREDUMP_STACK_SIZE must not be 0 in the current configuration"
#endif // ESP_COREDUMP_USE_STACK_SIZE
FORCE_INLINE_ATTR void esp_core_dump_setup_stack(void) FORCE_INLINE_ATTR void esp_core_dump_setup_stack(void)
{ {
/* If we are in ISR set watchpoint to the end of ISR stack */ /* If we are in ISR set watchpoint to the end of ISR stack */
@ -133,7 +139,7 @@ FORCE_INLINE_ATTR void esp_core_dump_setup_stack(void)
FORCE_INLINE_ATTR void esp_core_dump_report_stack_usage(void) FORCE_INLINE_ATTR void esp_core_dump_report_stack_usage(void)
{ {
} }
#endif #endif // CONFIG_ESP_COREDUMP_STACK_SIZE > 0
static void* s_exc_frame = NULL; static void* s_exc_frame = NULL;

2
components/espcoredump/src/port/riscv/core_dump_port.c
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@ -306,10 +306,10 @@ bool esp_core_dump_check_task(core_dump_task_header_t *task)
*/ */
bool esp_core_dump_mem_seg_is_sane(uint32_t addr, uint32_t sz) bool esp_core_dump_mem_seg_is_sane(uint32_t addr, uint32_t sz)
{ {
//TODO: external SRAM not supported yet
return (esp_ptr_in_dram((void *)addr) && esp_ptr_in_dram((void *)(addr+sz-1))) return (esp_ptr_in_dram((void *)addr) && esp_ptr_in_dram((void *)(addr+sz-1)))
|| (esp_ptr_in_rtc_slow((void *)addr) && esp_ptr_in_rtc_slow((void *)(addr+sz-1))) || (esp_ptr_in_rtc_slow((void *)addr) && esp_ptr_in_rtc_slow((void *)(addr+sz-1)))
|| (esp_ptr_in_rtc_dram_fast((void *)addr) && esp_ptr_in_rtc_dram_fast((void *)(addr+sz-1))) || (esp_ptr_in_rtc_dram_fast((void *)addr) && esp_ptr_in_rtc_dram_fast((void *)(addr+sz-1)))
|| (esp_ptr_external_ram((void *)addr) && esp_ptr_external_ram((void *)(addr+sz-1)))
|| (esp_ptr_in_iram((void *)addr) && esp_ptr_in_iram((void *)(addr+sz-1))); || (esp_ptr_in_iram((void *)addr) && esp_ptr_in_iram((void *)(addr+sz-1)));
} }

2
components/espcoredump/src/port/xtensa/core_dump_port.c
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@ -336,10 +336,10 @@ bool esp_core_dump_check_stack(core_dump_task_header_t *task)
*/ */
bool esp_core_dump_mem_seg_is_sane(uint32_t addr, uint32_t sz) bool esp_core_dump_mem_seg_is_sane(uint32_t addr, uint32_t sz)
{ {
//TODO: external SRAM not supported yet
return (esp_ptr_in_dram((void *)addr) && esp_ptr_in_dram((void *)(addr+sz-1))) return (esp_ptr_in_dram((void *)addr) && esp_ptr_in_dram((void *)(addr+sz-1)))
|| (esp_ptr_in_rtc_slow((void *)addr) && esp_ptr_in_rtc_slow((void *)(addr+sz-1))) || (esp_ptr_in_rtc_slow((void *)addr) && esp_ptr_in_rtc_slow((void *)(addr+sz-1)))
|| (esp_ptr_in_rtc_dram_fast((void *)addr) && esp_ptr_in_rtc_dram_fast((void *)(addr+sz-1))) || (esp_ptr_in_rtc_dram_fast((void *)addr) && esp_ptr_in_rtc_dram_fast((void *)(addr+sz-1)))
|| (esp_ptr_external_ram((void *)addr) && esp_ptr_external_ram((void *)(addr+sz-1)))
|| (esp_ptr_in_iram((void *)addr) && esp_ptr_in_iram((void *)(addr+sz-1))); || (esp_ptr_in_iram((void *)addr) && esp_ptr_in_iram((void *)(addr+sz-1)));
} }

2
components/spi_flash/spi_flash_os_func_noos.c
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@ -64,8 +64,6 @@ static IRAM_ATTR esp_err_t start(void *arg)
static IRAM_ATTR esp_err_t end(void *arg) static IRAM_ATTR esp_err_t end(void *arg)
{ {
#if CONFIG_IDF_TARGET_ESP32 #if CONFIG_IDF_TARGET_ESP32
Cache_Flush(0);
Cache_Flush(1);
Cache_Read_Enable(0); Cache_Read_Enable(0);
Cache_Read_Enable(1); Cache_Read_Enable(1);
#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3