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https://github.com/espressif/esp-idf.git
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Merge branch 'bugfix/extram_stack_coredump_v5.0' into 'release/v5.0'
coredump: add support for stacks in external RAM (backport v5.0) See merge request espressif/esp-idf!22410
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commit
82458fd31d
@ -14,7 +14,6 @@ menu "Core dump"
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config ESP_COREDUMP_ENABLE_TO_FLASH
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bool "Flash"
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depends on !SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
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select FREERTOS_ENABLE_TASK_SNAPSHOT
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select ESP_COREDUMP_ENABLE
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config ESP_COREDUMP_ENABLE_TO_UART
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@ -79,9 +78,19 @@ menu "Core dump"
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Config delay (in ms) before printing core dump to UART.
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Delay can be interrupted by pressing Enter key.
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config ESP_COREDUMP_USE_STACK_SIZE
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bool
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default y if ESP_COREDUMP_ENABLE_TO_FLASH && SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
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default n
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help
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Force the use of a custom DRAM stack for coredump when Task stacks can be in PSRAM.
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config ESP_COREDUMP_STACK_SIZE
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int "Reserved stack size"
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depends on ESP_COREDUMP_ENABLE
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range 0 4096 if !ESP_COREDUMP_USE_STACK_SIZE
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range 1280 4096 if ESP_COREDUMP_USE_STACK_SIZE
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default 0
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help
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Size of the memory to be reserved for core dump stack. If 0 core dump process will run on
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@ -115,7 +115,13 @@ FORCE_INLINE_ATTR void esp_core_dump_report_stack_usage(void)
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esp_core_dump_restore_sp(&s_stack_context);
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}
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#else
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#else // CONFIG_ESP_COREDUMP_STACK_SIZE > 0
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/* Here, we are not going to use a custom stack for coredump. Make sure the current configuration doesn't require one. */
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#if CONFIG_ESP_COREDUMP_USE_STACK_SIZE
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#pragma error "CONFIG_ESP_COREDUMP_STACK_SIZE must not be 0 in the current configuration"
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#endif // ESP_COREDUMP_USE_STACK_SIZE
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FORCE_INLINE_ATTR void esp_core_dump_setup_stack(void)
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{
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/* If we are in ISR set watchpoint to the end of ISR stack */
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@ -133,7 +139,7 @@ FORCE_INLINE_ATTR void esp_core_dump_setup_stack(void)
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FORCE_INLINE_ATTR void esp_core_dump_report_stack_usage(void)
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{
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}
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#endif
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#endif // CONFIG_ESP_COREDUMP_STACK_SIZE > 0
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static void* s_exc_frame = NULL;
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@ -306,10 +306,10 @@ bool esp_core_dump_check_task(core_dump_task_header_t *task)
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*/
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bool esp_core_dump_mem_seg_is_sane(uint32_t addr, uint32_t sz)
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{
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//TODO: external SRAM not supported yet
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return (esp_ptr_in_dram((void *)addr) && esp_ptr_in_dram((void *)(addr+sz-1)))
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|| (esp_ptr_in_rtc_slow((void *)addr) && esp_ptr_in_rtc_slow((void *)(addr+sz-1)))
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|| (esp_ptr_in_rtc_dram_fast((void *)addr) && esp_ptr_in_rtc_dram_fast((void *)(addr+sz-1)))
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|| (esp_ptr_external_ram((void *)addr) && esp_ptr_external_ram((void *)(addr+sz-1)))
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|| (esp_ptr_in_iram((void *)addr) && esp_ptr_in_iram((void *)(addr+sz-1)));
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}
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@ -336,10 +336,10 @@ bool esp_core_dump_check_stack(core_dump_task_header_t *task)
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*/
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bool esp_core_dump_mem_seg_is_sane(uint32_t addr, uint32_t sz)
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{
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//TODO: external SRAM not supported yet
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return (esp_ptr_in_dram((void *)addr) && esp_ptr_in_dram((void *)(addr+sz-1)))
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|| (esp_ptr_in_rtc_slow((void *)addr) && esp_ptr_in_rtc_slow((void *)(addr+sz-1)))
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|| (esp_ptr_in_rtc_dram_fast((void *)addr) && esp_ptr_in_rtc_dram_fast((void *)(addr+sz-1)))
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|| (esp_ptr_external_ram((void *)addr) && esp_ptr_external_ram((void *)(addr+sz-1)))
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|| (esp_ptr_in_iram((void *)addr) && esp_ptr_in_iram((void *)(addr+sz-1)));
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}
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@ -64,8 +64,6 @@ static IRAM_ATTR esp_err_t start(void *arg)
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static IRAM_ATTR esp_err_t end(void *arg)
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{
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#if CONFIG_IDF_TARGET_ESP32
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Cache_Flush(0);
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Cache_Flush(1);
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Cache_Read_Enable(0);
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Cache_Read_Enable(1);
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#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
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