Merge branch 'bugfix/esp32s2_wakeup_from_light_sleep_fix' into 'master'

esp32s2 light sleep fix

Closes IDFCI-122

See merge request espressif/esp-idf!10269

components/esp_system/port/soc/esp32s2/clk.c

@@ -35,6 +35,7 @@
 #include "driver/periph_ctrl.h"
 #include "bootloader_clock.h"
 #include "soc/syscon_reg.h"
+#include "hal/clk_gate_ll.h"
 
 static const char *TAG = "clk";
 
@@ -313,6 +314,8 @@ __attribute__((weak)) void esp_perip_clk_init(void)
     DPORT_CLEAR_PERI_REG_MASK(DPORT_BT_LPCK_DIV_FRAC_REG, DPORT_LPCLK_SEL_8M);
     DPORT_SET_PERI_REG_MASK(DPORT_BT_LPCK_DIV_FRAC_REG, DPORT_LPCLK_SEL_RTC_SLOW);
 
+    periph_ll_reset(PERIPH_SYSTIMER_MODULE);
+
     /* Enable RNG clock. */
     periph_module_enable(PERIPH_RNG_MODULE);
 }

components/esp_system/test/test_sleep.c

@@ -69,6 +69,7 @@ TEST_CASE("light sleep followed by deep sleep", "[deepsleep][reset=DEEPSLEEP_RES
     esp_light_sleep_start();
     esp_deep_sleep_start();
 }
+#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
 
 TEST_CASE("wake up from light sleep using timer", "[deepsleep]")
 {
@@ -81,7 +82,6 @@ TEST_CASE("wake up from light sleep using timer", "[deepsleep]")
                (tv_stop.tv_usec - tv_start.tv_usec) * 1e-3f;
     TEST_ASSERT_INT32_WITHIN(500, 2000, (int) dt);
 }
-#endif // !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
 
 static void test_light_sleep(void* arg)
 {

components/newlib/port/esp_time_impl.c

@@ -50,7 +50,7 @@
 // Offset between FRC timer and the RTC.
 // Initialized after reset or light sleep.
 #if defined(CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER) && defined(CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER)
-uint64_t s_microseconds_offset;
+uint64_t s_microseconds_offset = 0;
 #endif
 
 #ifndef CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER