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Dedicated GPIO: add software UART implementation for Xtensa targets
The software UART example is now compatible with Xtensa targets that have dedicated GPIOs. In other words, this example is now compatible with ESP32-S2 and ESP32-S3.
This commit is contained in:
Omar Chebib
parent
7da760dbd3
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801f934ac9
@ -20,6 +20,3 @@ examples/peripherals/dedicated_gpio/soft_uart:
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- if: SOC_DEDICATED_GPIO_SUPPORTED != 1
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temporary: false
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reason: Target doesn't support dedicated GPIO
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- if: IDF_TARGET in ["esp32s2", "esp32s3"]
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temporary: true
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reason: Xtensa targets not supported yet
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@ -1,5 +1,5 @@
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| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 |
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| ----------------- | -------- | -------- | -------- | -------- |
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| Supported Targets | ESP32-C2 | ESP32-C3 | ESP32-C6 | ESP32-H2 | ESP32-S2 | ESP32-S3 |
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| ----------------- | -------- | -------- | -------- | -------- | -------- | -------- |
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# Example: UART software emulation using dedicated/fast GPIOs
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@ -22,7 +22,7 @@ Due to the tight timing requirements of SW bit banging, the `asm_emulate_uart` f
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### Hardware Required
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* A development board with a RISC-V Espressif SoC (e.g., ESP32-C3 or ESP32-C2)
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* A development board with one of the supported chips (see the list above.)
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* A USB cable for Power supply and programming
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* Some jumper wires to connect the UART to an external UART-to-USB adapter.
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@ -34,7 +34,7 @@ Due to the strict timing requirements of the UART emulation, the UART emulation
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### Build and flash the project
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* Set the target of the project to a RISC-V-based one. For example:
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* Set the target of the project to a compatible one. For example:
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```
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idf.py set-target esp32c3
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```
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@ -1,9 +1,15 @@
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set(srcs "soft_uart.c")
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if(CONFIG_IDF_TARGET_ARCH_RISCV)
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list(APPEND srcs "riscv/soft_uart.S")
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elseif(CONFIG_IDF_TARGET_ARCH_XTENSA)
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message(FATAL_ERROR "Xtensa targets not supported yet")
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# During CMake early expansion, Kconfig constants are not defined yet, thus, to
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# avoid having CMake falsely fail on all targets, do not send FATAL_ERROR at that moment
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if(CONFIG_SOC_DEDICATED_GPIO_SUPPORTED)
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if(CONFIG_IDF_TARGET_ARCH_RISCV)
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list(APPEND srcs "riscv/soft_uart.S")
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else()
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list(APPEND srcs "xtensa/soft_uart.S")
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endif()
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elseif(NOT CMAKE_BUILD_EARLY_EXPANSION)
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message(FATAL_ERROR "Target doesn't support dedicated gpios")
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endif()
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@ -0,0 +1,156 @@
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/*
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* SPDX-FileCopyrightText: 2010-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: CC0-1.0
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*/
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#include "sdkconfig.h"
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#if CONFIG_IDF_TARGET_ESP32S2
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.macro WRITE_GPIO_OUT mask value
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wr_mask_gpio_out \value, \mask
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.endm
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.macro READ_GPIO_IN reg
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get_gpio_in \reg
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.endm
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#else // CONFIG_IDF_TARGET_ESP32S3
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.macro WRITE_GPIO_OUT mask value
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ee.wr_mask_gpio_out \value, \mask
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.endm
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.macro READ_GPIO_IN reg
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ee.get_gpio_in \reg
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.endm
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#endif
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.section .text
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/**
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* @brief Send bytes on the emulated UART.
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*
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* @param tx_buffer (a2) Buffer to send on the TX line. Guaranteed not NULL by the caller.
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* @param tx_size (a3) Size of tx_buffer. Guaranteed not 0 by the caller.
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* @param tx_bit (a4) Offset of TX I/O in the dedicated GPIO register.
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* @param baudrate (a5) CPU clock cycles taken by each bit.
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*
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* The C signature of this routine would be:
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* void emulate_uart_send(const uint8_t* tx, uint32_t tx_size, uint32_t tx_bit, uint32_t baudrate_delay);
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*/
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.global emulate_uart_send
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.type emulate_uart_send, @function
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emulate_uart_send:
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entry a1, 16
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/* Convert tx_bit into a bitmask */
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ssl a4
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movi a4, 1
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sll a4, a4
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/* Set the line to high */
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movi a7, 0xff
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WRITE_GPIO_OUT a4, a7
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mov a10, a5
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/* By calling delay here, we guarantee that in the following code, the next register window will
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* be free, as such, there won't be any window overflow */
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call8 uart_delay
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uart_send_loop:
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/* Start bit, clear/reset TX bit */
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movi a7, 0
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WRITE_GPIO_OUT a4, a7
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/* Wait for the given amount of CPU cycles */
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mov a10, a5
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call8 uart_delay
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/* Load the next byte and send it on the line */
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l8ui a6, a2, 0
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/* Use the upper bits of a6 to keep track of the remaining bits to send */
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movi a7, 0xff00
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or a6, a6, a7
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uart_send_next_bit:
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/* Take the LSB of a6 */
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mov a7, a4
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bbci a6, 0, uart_send_bit_0
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j uart_send_bit_end
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uart_send_bit_0:
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movi a7, 0
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uart_send_bit_end:
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WRITE_GPIO_OUT a4, a7
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srli a6, a6, 1
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/* Check if we still have bits to send */
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movi a7, 0x100
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/* Wait for the given amount of CPU cycles */
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mov a10, a5
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call8 uart_delay
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bge a6, a7, uart_send_next_bit
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/* Increment the tx_buffer and continue */
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addi a2, a2, 1
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addi a3, a3, -1
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/* Stop bit, set TX bit */
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WRITE_GPIO_OUT a4, a4
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mov a10, a5
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call8 uart_delay
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bnez a3, uart_send_loop
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retw
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/* Register a2 contains the number of cycles to wait */
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.align 4
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uart_delay:
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entry a1, 16
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rsr.ccount a3
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add a2, a2, a3
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uart_delay_loop:
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rsr.ccount a3
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blt a3, a2, uart_delay_loop
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retw
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/**
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* @brief Receive bytes from the emulated UART.
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*
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* @param rx_buffer (a2) Buffer to store the received bytes in. Guaranteed not NULL by the caller.
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* @param rx_size (a3) Size of rx_buffer. Guaranteed not 0 by the caller.
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* @param rx_bit (a4) Offset of RX I/O in the dedicated GPIO register.
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* @param baudrate (a5) CPU clock cycles taken by each bit.
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*
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* The C signature of this routine would be:
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* void emulate_uart_receive(uint8_t *rx_buffer, uint32_t tx_size, uint32_t rx_bit, uint32_t baudrate_delay);
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*/
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.global emulate_uart_receive
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.type emulate_uart_receive, @function
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emulate_uart_receive:
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entry a1, 16
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read_next_byte:
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/* a6 contains the current bit being received */
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movi a6, 0x1
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/* Wait for the start bit (0) */
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wait_start_bit:
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READ_GPIO_IN a7
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bbs a7, a4, wait_start_bit
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/* a7 will now store the final byte */
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movi a7, 0
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/* Wait 1.5 baudrate cycle, this will let us read the next bit in the middle on its period */
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srli a10, a5, 1
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call8 uart_delay
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read_next_bit:
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mov a10, a5
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call8 uart_delay
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/* Read the RX line and store the bit */
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READ_GPIO_IN a8
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bbc a8, a4, read_not_set_bit
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/* Write the bit 1 in the final byte */
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or a7, a7, a6
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read_not_set_bit:
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slli a6, a6, 1
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movi a8, 0x100
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bne a6, a8, read_next_bit
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/* Save the received bit in the buffer */
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s8i a7, a2, 0
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addi a2, a2, 1
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/* Wait a baudrate period to make sure stop bit is being sent */
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mov a10, a5
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call8 uart_delay
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/* Check if we have received all the characters */
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addi a3, a3, -1
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bnez a3, read_next_byte
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retw
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