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https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
fixed incorrect Tx power mappings for ESP32C3 chip
This commit is contained in:
wangmengyang
bot
parent
f00d7ee9d0
commit
7dd5568cb7
@ -126,10 +126,20 @@ config BT_CTRL_RX_ANTENNA_INDEX_EFF
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choice BT_CTRL_DFT_TX_POWER_LEVEL
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prompt "BLE default Tx power level"
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default BT_CTRL_DFT_TX_POWER_LEVEL_P9
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default BT_CTRL_DFT_TX_POWER_LEVEL_P3
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help
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Specify default Tx power level
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config BT_CTRL_DFT_TX_POWER_LEVEL_N27
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bool "-27dBm"
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config BT_CTRL_DFT_TX_POWER_LEVEL_N24
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bool "-24dBm"
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config BT_CTRL_DFT_TX_POWER_LEVEL_N21
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bool "-21dBm"
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config BT_CTRL_DFT_TX_POWER_LEVEL_N18
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bool "-18dBm"
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config BT_CTRL_DFT_TX_POWER_LEVEL_N15
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bool "-15dBm"
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config BT_CTRL_DFT_TX_POWER_LEVEL_N12
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bool "-12dBm"
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config BT_CTRL_DFT_TX_POWER_LEVEL_N9
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@ -146,18 +156,32 @@ choice BT_CTRL_DFT_TX_POWER_LEVEL
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bool "+6dBm"
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config BT_CTRL_DFT_TX_POWER_LEVEL_P9
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bool "+9dBm"
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config BT_CTRL_DFT_TX_POWER_LEVEL_P12
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bool "+12dBm"
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config BT_CTRL_DFT_TX_POWER_LEVEL_P15
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bool "+15dBm"
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config BT_CTRL_DFT_TX_POWER_LEVEL_P18
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bool "+18dBm"
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endchoice
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config BT_CTRL_DFT_TX_POWER_LEVEL_EFF
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int
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default 0 if BT_CTRL_DFT_TX_POWER_LEVEL_N12
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default 1 if BT_CTRL_DFT_TX_POWER_LEVEL_N9
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default 2 if BT_CTRL_DFT_TX_POWER_LEVEL_N6
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default 3 if BT_CTRL_DFT_TX_POWER_LEVEL_N3
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default 4 if BT_CTRL_DFT_TX_POWER_LEVEL_N0
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default 5 if BT_CTRL_DFT_TX_POWER_LEVEL_P3
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default 6 if BT_CTRL_DFT_TX_POWER_LEVEL_P6
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default 7 if BT_CTRL_DFT_TX_POWER_LEVEL_P9
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default 0 if BT_CTRL_DFT_TX_POWER_LEVEL_N27
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default 1 if BT_CTRL_DFT_TX_POWER_LEVEL_N24
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default 2 if BT_CTRL_DFT_TX_POWER_LEVEL_N21
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default 3 if BT_CTRL_DFT_TX_POWER_LEVEL_N18
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default 4 if BT_CTRL_DFT_TX_POWER_LEVEL_N15
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default 5 if BT_CTRL_DFT_TX_POWER_LEVEL_N12
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default 6 if BT_CTRL_DFT_TX_POWER_LEVEL_N9
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default 7 if BT_CTRL_DFT_TX_POWER_LEVEL_N6
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default 8 if BT_CTRL_DFT_TX_POWER_LEVEL_N3
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default 9 if BT_CTRL_DFT_TX_POWER_LEVEL_N0
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default 10 if BT_CTRL_DFT_TX_POWER_LEVEL_P3
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default 11 if BT_CTRL_DFT_TX_POWER_LEVEL_P6
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default 12 if BT_CTRL_DFT_TX_POWER_LEVEL_P9
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default 13 if BT_CTRL_DFT_TX_POWER_LEVEL_P12
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default 14 if BT_CTRL_DFT_TX_POWER_LEVEL_P15
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default 15 if BT_CTRL_DFT_TX_POWER_LEVEL_P18
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default 0
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config BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP
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@ -212,6 +212,7 @@ extern void btdm_controller_disable(void);
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extern uint8_t btdm_controller_get_mode(void);
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extern const char *btdm_controller_get_compile_version(void);
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extern void btdm_rf_bb_init_phase2(void); // shall be called after PHY/RF is enabled
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/* Sleep */
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extern void btdm_controller_enable_sleep(bool enable);
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extern uint8_t btdm_controller_get_sleep_mode(void);
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@ -1334,14 +1335,51 @@ esp_bt_controller_status_t esp_bt_controller_get_status(void)
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/* extra functions */
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esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
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{
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ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return OK", __func__);
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return ESP_OK;
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esp_err_t stat = ESP_FAIL;
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switch (power_type) {
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case ESP_BLE_PWR_TYPE_ADV:
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case ESP_BLE_PWR_TYPE_SCAN:
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case ESP_BLE_PWR_TYPE_DEFAULT:
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if (ble_txpwr_set(power_type, power_level) == 0) {
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stat = ESP_OK;
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}
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break;
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default:
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stat = ESP_ERR_NOT_SUPPORTED;
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break;
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}
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return stat;
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}
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esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
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{
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ESP_LOGW(BTDM_LOG_TAG, "%s not implemented, return 0", __func__);
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return 0;
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esp_power_level_t lvl;
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switch (power_type) {
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case ESP_BLE_PWR_TYPE_ADV:
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case ESP_BLE_PWR_TYPE_SCAN:
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lvl = (esp_power_level_t)ble_txpwr_get(power_type);
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break;
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case ESP_BLE_PWR_TYPE_CONN_HDL0:
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case ESP_BLE_PWR_TYPE_CONN_HDL1:
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case ESP_BLE_PWR_TYPE_CONN_HDL2:
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case ESP_BLE_PWR_TYPE_CONN_HDL3:
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case ESP_BLE_PWR_TYPE_CONN_HDL4:
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case ESP_BLE_PWR_TYPE_CONN_HDL5:
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case ESP_BLE_PWR_TYPE_CONN_HDL6:
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case ESP_BLE_PWR_TYPE_CONN_HDL7:
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case ESP_BLE_PWR_TYPE_CONN_HDL8:
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case ESP_BLE_PWR_TYPE_DEFAULT:
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lvl = (esp_power_level_t)ble_txpwr_get(ESP_BLE_PWR_TYPE_DEFAULT);
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break;
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default:
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lvl = ESP_PWR_LVL_INVALID;
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break;
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}
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return lvl;
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}
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esp_err_t esp_bt_sleep_enable (void)
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@ -1 +1 @@
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Subproject commit 5ba622687683fb898194d42eed020a60070887d6
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Subproject commit ea1a71ba0572bfc9960d2c801d13057ab8219dc5
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@ -26,7 +26,7 @@ extern "C" {
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#endif
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#define ESP_BT_CTRL_CONFIG_MAGIC_VAL 0x5A5AA5A5
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#define ESP_BT_CTRL_CONFIG_VERSION 0x02101290
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#define ESP_BT_CTRL_CONFIG_VERSION 0x02103080
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#define ESP_BT_HCI_TL_MAGIC_VALUE 0xfadebead
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#define ESP_BT_HCI_TL_VERSION 0x00010000
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@ -133,6 +133,8 @@ enum {
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#define CFG_NASK CFG_MASK_BIT_SCAN_DUPLICATE_OPTION
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#define BLE_HW_TARGET_CODE_ESP32C3_CHIP_ECO0 (0x01010000)
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#define BT_CONTROLLER_INIT_CONFIG_DEFAULT() { \
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.magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL, \
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.version = ESP_BT_CTRL_CONFIG_VERSION, \
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@ -158,6 +160,7 @@ enum {
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.normal_adv_size = NORMAL_SCAN_DUPLICATE_CACHE_SIZE, \
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.mesh_adv_size = MESH_DUPLICATE_SCAN_CACHE_SIZE, \
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.coex_phy_coded_tx_rx_time_limit = CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF, \
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.hw_target_code = BLE_HW_TARGET_CODE_ESP32C3_CHIP_ECO0, \
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};
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#else
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@ -221,6 +224,7 @@ typedef struct {
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uint16_t normal_adv_size; /*!< Normal adv size for scan duplicate */
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uint16_t mesh_adv_size; /*!< Mesh adv size for scan duplicate */
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uint8_t coex_phy_coded_tx_rx_time_limit; /*!< limit on max tx/rx time in case of connection using CODED-PHY with Wi-Fi coexistence */
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uint32_t hw_target_code; /*!< hardware target */
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} esp_bt_controller_config_t;
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/**
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@ -263,22 +267,23 @@ typedef enum {
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* @brief Bluetooth TX power level(index), it's just a index corresponding to power(dbm).
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*/
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typedef enum {
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ESP_PWR_LVL_N12 = 0, /*!< Corresponding to -12dbm */
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ESP_PWR_LVL_N9 = 1, /*!< Corresponding to -9dbm */
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ESP_PWR_LVL_N6 = 2, /*!< Corresponding to -6dbm */
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ESP_PWR_LVL_N3 = 3, /*!< Corresponding to -3dbm */
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ESP_PWR_LVL_N0 = 4, /*!< Corresponding to 0dbm */
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ESP_PWR_LVL_P3 = 5, /*!< Corresponding to +3dbm */
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ESP_PWR_LVL_P6 = 6, /*!< Corresponding to +6dbm */
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ESP_PWR_LVL_P9 = 7, /*!< Corresponding to +9dbm */
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ESP_PWR_LVL_N14 = ESP_PWR_LVL_N12, /*!< Backward compatibility! Setting to -14dbm will actually result to -12dbm */
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ESP_PWR_LVL_N11 = ESP_PWR_LVL_N9, /*!< Backward compatibility! Setting to -11dbm will actually result to -9dbm */
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ESP_PWR_LVL_N8 = ESP_PWR_LVL_N6, /*!< Backward compatibility! Setting to -8dbm will actually result to -6dbm */
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ESP_PWR_LVL_N5 = ESP_PWR_LVL_N3, /*!< Backward compatibility! Setting to -5dbm will actually result to -3dbm */
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ESP_PWR_LVL_N2 = ESP_PWR_LVL_N0, /*!< Backward compatibility! Setting to -2dbm will actually result to 0dbm */
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ESP_PWR_LVL_P1 = ESP_PWR_LVL_P3, /*!< Backward compatibility! Setting to +1dbm will actually result to +3dbm */
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ESP_PWR_LVL_P4 = ESP_PWR_LVL_P6, /*!< Backward compatibility! Setting to +4dbm will actually result to +6dbm */
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ESP_PWR_LVL_P7 = ESP_PWR_LVL_P9, /*!< Backward compatibility! Setting to +7dbm will actually result to +9dbm */
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ESP_PWR_LVL_N27 = 0, /*!< Corresponding to -27dbm */
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ESP_PWR_LVL_N24 = 1, /*!< Corresponding to -24dbm */
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ESP_PWR_LVL_N21 = 2, /*!< Corresponding to -21dbm */
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ESP_PWR_LVL_N18 = 3, /*!< Corresponding to -18dbm */
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ESP_PWR_LVL_N15 = 4, /*!< Corresponding to -15dbm */
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ESP_PWR_LVL_N12 = 5, /*!< Corresponding to -12dbm */
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ESP_PWR_LVL_N9 = 6, /*!< Corresponding to -9dbm */
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ESP_PWR_LVL_N6 = 7, /*!< Corresponding to -6dbm */
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ESP_PWR_LVL_N3 = 8, /*!< Corresponding to -3dbm */
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ESP_PWR_LVL_N0 = 9, /*!< Corresponding to 0dbm */
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ESP_PWR_LVL_P3 = 10, /*!< Corresponding to +3dbm */
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ESP_PWR_LVL_P6 = 11, /*!< Corresponding to +6dbm */
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ESP_PWR_LVL_P9 = 12, /*!< Corresponding to +9dbm */
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ESP_PWR_LVL_P12 = 13, /*!< Corresponding to +12dbm */
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ESP_PWR_LVL_P15 = 14, /*!< Corresponding to +15dbm */
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ESP_PWR_LVL_P18 = 15, /*!< Corresponding to +18dbm */
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ESP_PWR_LVL_INVALID = 0xFF, /*!< Indicates an invalid value */
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} esp_power_level_t;
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/**
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